54ACT16470 [TI]

16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS; 16位寄存收发器,三态输出
54ACT16470
型号: 54ACT16470
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
16位寄存收发器,三态输出

输出元件
文件: 总9页 (文件大小:152K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
54ACT16470, 74ACT16470  
16-BIT REGISTERED TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCAS237A – JUNE 1990 – REVISED APRIL 1996  
54ACT16470 . . . WD PACKAGE  
74ACT16470 . . . DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
Inputs Are TTL-Voltage Compatible  
Flow-Through Architecture Optimizes  
PCB Layout  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
1OEAB  
1CLKAB  
1CEAB  
GND  
1OEBA  
1CLKBA  
1CEBA  
GND  
1B1  
1B2  
2
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
3
CC  
4
5
1A1  
1A2  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
6
7
V
V
CC  
CC  
500-mA Typical Latch-Up Immunity at  
125°C  
8
1A3  
1A4  
1A5  
GND  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
1B3  
1B4  
1B5  
GND  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
9
Package Options Include Shrink  
Small-Outline 300-mil (DL) Packages Using  
25-mil Center-to-Center Pin Spacings and  
380-mil Fine-Pitch Ceramic Flat (WD)  
Packages Using 25-mil Center-to-Center  
Pin Spacings  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
description  
The ’ACT16470 are 16-bit registered transceivers  
that contain two sets of D-type flip-flops for  
temporary storage of data flowing in either  
direction. They can be used as two 8-bit  
transceivers or one 16-bit transceiver. Separate  
clock (CLKAB or CLKBA) and output-enable  
(OEAB or OEBA) inputs are provided for each  
register to permit independent control in either  
direction of data flow.  
V
V
CC  
CC  
2A7  
2A8  
GND  
2B7  
2B8  
GND  
2CEBA  
2CLKBA  
2OEBA  
2CEAB  
2CLKAB  
2OEAB  
The A-to-B enable (CEAB) input must be low to  
enter data from A or to output data to B. If both  
CEAB and CLKAB are low, then B port will have  
the level of A port prior to the most recent  
low-to-high transition of CLKAB. Data flow from B  
to A is similar, but requires the use of CEBA,  
CLKBA, and OEBA inputs.  
To avoid false clocking of the flip-flops, CE should not be switched from high to low while CLK is high.  
The 74ACT16470 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and  
functionality of standard small-outline packages in the same printed-circuit-board area.  
The 54ACT16470 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
74ACT16470 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
54ACT16470, 74ACT16470  
16-BIT REGISTERED TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCAS237A – JUNE 1990 – REVISED APRIL 1996  
FUNCTION TABLE  
INPUTS  
OUTPUT  
B
CEAB  
CLKAB  
OEAB  
A
X
X
X
L
H
X
L
L
L
X
X
L
X
H
L
Z
Z
B
0
L
L
L
H
H
A-to-B data flow is shown: B-to-A flow is similar but  
uses CEBA, CLKBA, and OEBA.  
Output level before the indicated steady-state input  
conditions were established  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
54ACT16470, 74ACT16470  
16-BIT REGISTERED TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCAS237A – JUNE 1990 – REVISED APRIL 1996  
logic symbol  
56  
54  
55  
1
1OEBA  
1CEBA  
1EN3  
G1  
1CLKBA  
1OEAB  
1CEAB  
1C5  
2EN4  
G2  
3
2
1CLKAB  
2C6  
29  
31  
30  
28  
26  
27  
7EN9  
G7  
2OEBA  
2CEBA  
2CLKBA  
7C11  
8EN10  
G8  
2OEAB  
2CEAB  
2CLKAB  
8C12  
5
52  
1A1  
5D  
4
1B1  
3
1
1
6D  
6
51  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1A8  
2A1  
1B2  
49  
8
1B3  
48  
9
1B4  
47  
10  
12  
13  
14  
15  
1B5  
45  
1B6  
44  
1B7  
43  
1B8  
42  
11D  
10  
2B1  
9
1
1
12D  
16  
17  
19  
20  
21  
23  
24  
41  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
2A8  
2B2  
40  
2B3  
38  
2B4  
37  
2B5  
36  
2B6  
34  
2B7  
33  
2B8  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
54ACT16470, 74ACT16470  
16-BIT REGISTERED TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCAS237A – JUNE 1990 – REVISED APRIL 1996  
logic diagram (positive logic)  
56  
1OEBA  
54  
1CEBA  
55  
1CLKBA  
1
1OEAB  
3
1CEAB  
2
1CLKAB  
C1  
1D  
5
52  
1A1  
1B1  
C1  
1D  
To Seven Other Channels  
29  
2OEBA  
31  
2CEBA  
30  
2CLKBA  
28  
2OEAB  
26  
2CEAB  
27  
2CLKAB  
C1  
1D  
15  
42  
2A1  
2B1  
C1  
1D  
To Seven Other Channels  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
54ACT16470, 74ACT16470  
16-BIT REGISTERED TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCAS237A – JUNE 1990 – REVISED APRIL 1996  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 to V  
+ 0.5 V  
+ 0.5 V  
I
CC  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 to V  
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
IK  
I
I
CC  
Output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
Continuous current through V  
Maximum power package dissipation at T = 55°C (in still air)(see Note 2): DL package . . . . . . . . . . . 1.4 W  
Storage temperature range, T  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±400 mA  
A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.  
recommended operating conditions (see Note 3)  
54ACT16470  
MIN NOM  
74ACT16470  
MIN NOM  
UNIT  
MAX  
MAX  
V
V
V
V
V
Supply voltage  
4.5  
2
5
5.5  
4.5  
2
5
5.5  
V
V
CC  
IH  
IL  
High-level input voltage  
Low-level input voltage  
Input voltage  
0.8  
0.8  
V
0
0
V
V
0
0
V
V
V
I
CC  
CC  
Output voltage  
V
O
CC  
CC  
I
I
High-level output current  
Low-level output current  
Input transition rise or fall rate  
Operating free-air temperature  
–24  
24  
–24  
24  
mA  
mA  
ns/V  
°C  
OH  
OL  
t/v  
0
10  
0
10  
T
–55  
125  
–40  
85  
A
NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
54ACT16470, 74ACT16470  
16-BIT REGISTERED TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCAS237A – JUNE 1990 – REVISED APRIL 1996  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
A
= 25°C  
54ACT16470  
74ACT16470  
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
4.4  
TYP  
MAX  
MIN  
4.4  
MAX  
MIN  
4.4  
MAX  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
I
= –50 µA  
OH  
5.4  
5.4  
5.4  
V
3.94  
4.94  
3.8  
3.8  
V
OH  
I
I
I
= –24 mA  
= –75 mA  
= 50 µA  
OH  
OH  
OL  
4.8  
4.8  
3.85  
3.85  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
0.36  
0.36  
0.44  
0.44  
1.65  
±1  
0.44  
0.44  
1.65  
±1  
V
OL  
I
I
= 24 mA  
OL  
= 75 mA  
OL  
I
I
I
Control inputs V = V  
or GND  
±0.1  
±0.5  
8
µA  
µA  
µA  
I
I
CC  
A or B ports  
V
= V  
or GND  
±5  
±5  
OZ  
CC  
O
CC  
V = V  
or GND,  
I
O
= 0  
80  
80  
I
CC  
One input at 3.4 V,  
Other inputs at V  
§
5.5 V  
0.9  
1
1
mA  
I  
CC  
or GND  
CC  
or GND  
C
C
Control inputs V = V  
5 V  
5 V  
3
pF  
pF  
i
I
CC  
= V or GND  
CC  
A or B ports  
V
11.5  
io  
O
§
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.  
For I/O ports, the parameter I includes the input leakage current.  
OZ  
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V  
.
CC  
timing requirements over recommended operating free-air temperature range,  
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)  
V
CC  
T
= 25°C  
54ACT16470  
74ACT16470  
A
UNIT  
MHz  
ns  
MIN  
0
MAX  
MIN  
0
MAX  
MIN  
0
MAX  
f
t
Clock frequency  
Pulse duration  
55  
55  
55  
clock  
CLK high  
CLK low  
4
4
4
w
8.5  
6
8.5  
6
8.5  
6
t
t
Setup time, data before CLK↑  
Hold time, data after CLK↑  
ns  
ns  
su  
1
1
1
h
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
54ACT16470, 74ACT16470  
16-BIT REGISTERED TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCAS237A – JUNE 1990 – REVISED APRIL 1996  
switching characteristics over recommended operating free-air temperature range,  
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)  
V
CC  
T = 25°C  
A
54ACT16470  
74ACT16470  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MHz  
ns  
MIN  
55  
TYP  
MAX  
MIN  
55  
MAX  
MIN  
55  
MAX  
f
t
t
t
t
t
t
t
t
t
t
max  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
PZH  
PZL  
PHZ  
PLZ  
3.9  
3.8  
3.2  
3.6  
4.6  
4.6  
3.5  
4.2  
5.2  
5.2  
8.3  
8.4  
8.3  
9.5  
7.4  
7
10.3  
10.3  
10.5  
11.8  
9.3  
3.9  
3.8  
3.2  
3.6  
4.6  
4.6  
3.5  
4.2  
5.2  
5.2  
11.8  
11.7  
11.9  
13.4  
9.9  
3.9  
3.8  
3.2  
3.6  
4.6  
4.6  
3.5  
4.2  
5.2  
5.2  
11.8  
11.7  
11.9  
13.4  
9.9  
CLK  
A or B  
A or B  
A or B  
A or B  
A or B  
ns  
ns  
ns  
ns  
OE  
OE  
CE  
CE  
8.8  
9.5  
9.5  
8.8  
10.1  
8.3  
7.9  
10.9  
12.4  
10.3  
10  
12.5  
14.3  
11.2  
10.9  
12.5  
14.3  
11.2  
10.9  
operating characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
TEST CONDITIONS  
= 50 pF, f = 1 MHz  
L
TYP  
UNIT  
Outputs enabled  
Outputs disabled  
59  
C
Power dissipation capacitance per transceiver  
C
pF  
pd  
39  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
54ACT16470, 74ACT16470  
16-BIT REGISTERED TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCAS237A – JUNE 1990 – REVISED APRIL 1996  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
CC  
Open  
GND  
TEST  
S1  
S1  
t
/t  
Open  
PLH PHL  
/t  
500 Ω  
From Output  
Under Test  
t
2 × V  
CC  
GND  
PLZ PZL  
t
/t  
PHZ PZH  
C
= 50 pF  
L
500 Ω  
(see Note A)  
LOAD CIRCUIT  
3 V  
0 V  
Timing Input  
Data Input  
1.5 V  
t
w
t
h
t
3 V  
su  
3 V  
0 V  
Input  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
0 V  
VOLTAGE WAVEFORMS  
VOLTAGE WAVEFORMS  
Output  
Control  
(low-level  
enabling)  
3 V  
0 V  
3 V  
0 V  
Input  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
t
PZL  
t
t
PHL  
PLH  
t
PLZ  
Output  
Waveform 1  
V
OH  
V
CC  
In-Phase  
Output  
50% V  
50% V  
CC  
50% V  
50% V  
CC  
V
CC  
20% V  
S1 at 2 × V  
(see Note B)  
CC  
CC  
CC  
V
V
OL  
OL  
t
PHZ  
t
PLH  
t
t
PHL  
PZH  
Output  
Waveform 2  
S1 at GND  
V
OH  
OH  
0 V  
Out-of-Phase  
Output  
80% V  
50% V  
50% V  
CC  
CC  
CC  
V
OL  
(see Note B)  
VOLTAGE WAVEFORMS  
includes probe and jig capacitance.  
VOLTAGE WAVEFORMS  
NOTES: A.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t = 3 ns, t = 3 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1998, Texas Instruments Incorporated  

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