54ACT16541WD [TI]
16-BIT BUFFERS/DRIVERS WITH 3-STATE OUPUTS; 16位缓冲器/驱动器具有三态OUPUTS
| 型号： | 54ACT16541WD |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUPUTS |
| 文件： | 总6页 (文件大小：107K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
54ACT16541, 74ACT16541
16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUPUTS
SCAS208A – JUNE 1992 – REVISED APRIL 1996
54ACT16541 . . . WD PACKAGE
74ACT16541 . . . DL PACKAGE
(TOP VIEW)
Members of the Texas Instruments
Widebus Family
Inputs Are TTL-Voltage Compatible
Flow-Through Architecture Optimizes
PCB Layout
1OE1
1Y1
1Y2
GND
1Y3
1Y4
1OE2
1A1
1A2
GND
1A3
1A4
1
2
3
4
5
6
7
8
9
48
47
46
45
44
43
42
41
40
Distributed V
Minimizes High-Speed Switching Noise
and GND Pin Configuration
CC
EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
V
V
CC
CC
500-mA Typical Latch-Up Immunity at
125°C
1Y5
1Y6
1A5
1A6
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
GND 10
39 GND
1Y7
1Y8
1A7
1A8
11
12
38
37
2Y1 13
2Y2 14
GND 15
2Y3 16
2Y4 17
36 2A1
35 2A2
34 GND
33 2A3
32 2A4
description
V
18
19
31
30
V
The ’ACT16541 are noninverting 16-bit buffers
composed of two 8-bit sections with separate
output-enable signals. For either 8-bit buffer
section, the two output-enable (1OE1 and 1OE2
or 2OE1 and 2OE2) inputs must both be low for
the corresponding Y outputs to be active. If either
output-enable input is high, the outputs of that
8-bit buffer section are in the high-impedance
state.
CC
CC
2Y5
2A5
2Y6 20
GND 21
2Y7 22
29 2A6
28 GND
27 2A7
26 2A8
25 2OE2
2Y8 23
2OE1 24
The 74ACT16541 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and
functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16541 is characterized for operation over the full military temperature range of –55°C to 125°C. The
74ACT16541 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OUTPUT
Y
OE2
L
A
L
OE1
L
L
H
Z
Z
L
L
H
X
X
H
X
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT16541, 74ACT16541
16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUPUTS
SCAS208A – JUNE 1992 – REVISED APRIL 1996
†
logic symbol
1
&
&
1OE1
1OE2
EN1
EN2
48
24
25
2OE1
2OE2
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
2
3
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
1Y1
1Y2
1Y3
1Y4
1Y5
1Y6
1Y7
1Y8
2Y1
2Y2
2Y3
2Y4
2Y5
2Y6
2Y7
2Y8
1
1
5
6
8
9
11
12
13
14
16
17
19
20
22
23
1
2
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1
24
25
1OE1
2OE1
2OE2
48
1OE2
47
2
36
13
1A1
1Y1
2Y1
2A1
To Seven Other Channels
To Seven Other Channels
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT16541, 74ACT16541
16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUPUTS
SCAS208A – JUNE 1992 – REVISED APRIL 1996
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Maximum package power dissipation at T = 55°C (in still air) (see Note 2): DL package . . . . . . . . . . . 1.2 W
Storage temperature range, T
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±400 mA
A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150 C and a board trace length of 750 mils.
recommended operating conditions (see Note 3)
54ACT16541
MIN NOM
74ACT16541
MIN NOM
UNIT
MAX
MAX
V
V
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
0.8
0.8
V
0
0
V
V
0
0
V
V
V
I
CC
CC
Output voltage
V
O
CC
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
–24
24
–24
24
mA
mA
ns/V
°C
OH
OL
∆t/∆v
0
10
0
10
T
–55
125
–40
85
A
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT16541, 74ACT16541
16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUPUTS
SCAS208A – JUNE 1992 – REVISED APRIL 1996
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
54ACT16541
74ACT16541
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
4.4
TYP
MAX
MIN
4.4
MAX
MIN
4.4
MAX
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
I
= –50 µA
OH
5.4
5.4
5.4
V
3.9
3.8
3.8
V
OH
OL
I
I
I
= –24 mA
= –75 mA
= 50 µA
OH
OH
OL
4.94
4.8
4.8
†
3.85
3.85
0.1
0.1
0.1
0.1
0.1
0.1
V
0.36
0.36
0.44
0.44
1.65
±1
0.44
0.44
1.65
±1
V
I
I
= 24 mA
OL
†
= 75 mA
OL
I
I
I
V = V
or GND
±0.1
±0.5
8
µA
µA
µA
I
I
CC
V
= V
or GND
±5
±5
OZ
CC
O
CC
V = V
or GND,
I
O
= 0
80
80
I
CC
One input at 3.4 V,
Other inputs at V
‡
5.5 V
0.9
1
1
mA
∆I
CC
or GND
CC
or GND
C
C
V = V
5.5 V
5 V
4
pF
pF
i
I
CC
= V or GND
CC
V
13
o
O
†
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
.
CC
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
5.9
54ACT16541
74ACT16541
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
ns
MIN
3.1
2.7
2.8
3.5
4.5
4.9
MAX
7.9
MIN
3.1
2.7
2.8
3.5
4.5
4.9
MAX
9
MIN
3.1
2.7
2.8
3.5
4.5
4.9
MAX
9
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
6.3
8.3
9.2
9.7
11
9.2
9.7
11
6.5
8.9
ns
OE
OE
7.5
9.9
8.5
10.3
9.9
11.3
10.7
11.3
10.7
ns
8
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
40
UNIT
Outputs enabled
Outputs disabled
C
Power dissipation capacitance per buffer/driver
C
pF
pd
9.5
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54ACT16541, 74ACT16541
16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUPUTS
SCAS208A – JUNE 1992 – REVISED APRIL 1996
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
Open
GND
TEST
S1
S1
t
/t
Open
PLH PHL
/t
500 Ω
From Output
Under Test
t
2 × V
CC
GND
PLZ PZL
t
/t
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
LOAD CIRCUIT
Output
Control
(low-level
enabling)
3 V
0 V
1.5 V
1.5 V
t
PZL
3 V
0 V
t
PLZ
Output
Waveform 1
V
Input
CC
1.5 V
1.5 V
50% V
CC
20% V
S1 at 2 × V
(see Note B)
CC
CC
CC
V
V
OL
t
PLH
t
PHZ
t
PHL
t
PZH
Output
Waveform 2
S1 at GND
V
OH
OH
0 V
80% V
50% V
50% V
Output
CC
CC
50% V
CC
V
OL
(see Note B)
VOLTAGE WAVEFORMS
C includes probe and jig capacitance.
L
VOLTAGE WAVEFORMS
NOTES: A.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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