ICM-20600 [TDK]
High Performance 6-Axis MEMS MotionTracking Device;
| 型号： | ICM-20600 |
| 厂家： | 
TDK ELECTRONICS |
| 描述： | High Performance 6-Axis MEMS MotionTracking Device |
| 文件： | 总57页 (文件大小：1517K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICM-20600
High Performance 6-Aꢀis MEM“ MotioꢁTꢂaꢃkiꢁg™ Deꢄiꢃe iꢁ
2.5x3x0.91mm Package
GENERAL DESCRIPTION
APPLICATIONS
Smartphones and Tablets
The ICM-20600 is a 6-axis MotionTracking device that
combines a 3-axis gyroscope, 3-axis accelerometer, in a small
2.5 mm x 3 mm x 0.91 mm (14-pin LGA) package.
Wearable Sensors
IoT Applications
Motion-based game controllers
3D remote controls for Internet connected DTVs and
set top boxes, 3D mice
High performance specs
o
o
o
Gyroscope sensitivity error: ±1%
Gyroscope noise: ±4 mdps/Hz
Accelerometer noise: 100 µg/Hz
FEATURES
Includes 1 KB FIFO to reduce traffic on the serial bus
interface, and reduce power consumption by allowing
the system processor to burst read sensor data and then
go into a low-power mode
3-Axis Gyroscope with Programmable FSR of
±250 dps, ±500 dps, ±1000 dps, and ±2000 dps
3-Axis Accelerometer with Programmable FSR of ±2g,
±4g, ±8g, and ±16g
EIS FSYNC support
User-programmable interrupts
Wake-on-motion interrupt for low power operation
of applications processor
ICM-20600 includes on-chip 16-bit ADCs, programmable
digital filters, an embedded temperature sensor, and
programmable interrupts. The device features an operating
voltage range down to 1.71V. Communication ports include
I2C and high speed SPI at 10 MHz.
1 KB FIFO buffer enables the applications processor to
read the data in bursts
On-Chip 16-bit ADCs and Programmable Filters
Host interface: 10 MHz SPI or 400 kHz Fast Mode I2C
Digital-output temperature sensor
VDD operating range of 1.71 to 3.45V
MEMS structure hermetically sealed and bonded at
wafer level
ORDERING INFORMATION
PART
TEMP RANGE
PACKAGE
ICM-20600†
−ꢅꢆ°C to +ꢇꢈ°C
14-Pin LGA
RoHS and Green compliant
†Denotes RoHS and Green-Compliant Package
TYPICAL OPERATING CIRCUIT
BLOCK DIAGRAM
SDI SCLK
nCS
14
13
12
AD0 / SDO
NC
REGOUT
SDO
11
10
9
1
2
C1, 0.1 mF
FSYNC
INT2
FSYNC
INT2
ICM-20600
3
4
NC
1.71 – 3.45VDC
C4, 2.2 mF
INT1
VDD
8
INT1
5
6
7
C2, 0.1 mF
1.71 – 3.45VDC
C3, 10 nF
InvenSense Inc.
1745 Technology Drive, San Jose, CA 95110 U.S.A
+1(408) 988–7339
InvenSense reserves the right to change the detail
specifications as may be required to permit
improvements in the design of its products.
Document Number: DS-000184
Revision: 1.0
Revision Date: 10/27/2016
www.invensense.com
ICM-20600
TABLE OF CONTENTS
General Description .............................................................................................................................................1
Ordering Information...........................................................................................................................................1
Block Diagram ......................................................................................................................................................1
Applications .........................................................................................................................................................1
Features ...............................................................................................................................................................1
Typical Operating Circuit......................................................................................................................................1
Introduction......................................................................................................................................................... 7
1.1 Purpose and Scope....................................................................................................................................7
1.2 Product Overview......................................................................................................................................7
1.3 Applications...............................................................................................................................................7
Features ............................................................................................................................................................... 8
2.1 Gyroscope Features ..................................................................................................................................8
2.2 Accelerometer Features............................................................................................................................8
2.3 Additional Features...................................................................................................................................8
Electrical Characteristics...................................................................................................................................... 9
3.1 Gyroscope Specifications ..........................................................................................................................9
3.2 Accelerometer Specifications..................................................................................................................10
3.3 Electrical Specifications...........................................................................................................................11
3.4 I2C Timing Characterization.....................................................................................................................14
3.5 SPI Timing Characterization ....................................................................................................................15
3.6 Absolute Maximum Ratings ....................................................................................................................16
Applications Information ................................................................................................................................... 17
4.1 Pin Out Diagram and Signal Description .................................................................................................17
4.2 Typical Operating Circuit.........................................................................................................................18
4.3 Bill of Materials for External Components ..............................................................................................18
4.4 Block Diagram .........................................................................................................................................19
4.5 Overview .................................................................................................................................................19
4.6 Three-Axis MEMS Gyroscope with 16-bit ADCs and Signal Conditioning ...............................................19
4.7 Three-Axis MEMS Accelerometer with 16-bit ADCs and Signal Conditioning.........................................20
4.8 I2C and SPI Serial Communications Interfaces ........................................................................................20
4.9 Self-Test...................................................................................................................................................21
1
2
3
4
4.10
4.11
4.12
4.13
4.14
4.15
4.16
Clocking...............................................................................................................................................21
Sensor Data Registers .........................................................................................................................21
FIFO.....................................................................................................................................................22
Interrupts............................................................................................................................................22
Digital-Output Temperature Sensor ...................................................................................................22
Bias and LDOs .....................................................................................................................................22
Charge Pump ......................................................................................................................................22
Document Number: DS-000184
Revision: 1.0
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Revision Date: 10/27/2016
ICM-20600
4.17
Standard Power Modes ......................................................................................................................22
5
6
Programmable Interrupts .................................................................................................................................. 23
5.1 Wake-on-Motion Interrupt .....................................................................................................................23
Digital Interface ................................................................................................................................................. 24
6.1 I2C and SPI Serial Interfaces ....................................................................................................................24
6.2 I2C Interface.............................................................................................................................................24
6.3 I2C Communications Protocol .................................................................................................................24
6.4 I2C Terms .................................................................................................................................................26
6.5 SPI Interface ............................................................................................................................................26
Register Map...................................................................................................................................................... 28
Register Descriptions ......................................................................................................................................... 31
7
8
8.1
8.2
8.3
8.4
8.5
8.6
Register 04 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register 31
Register 05 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register 31
Register 07 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register 31
Register 08 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register 32
Register 10 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register 32
Register 11 – Gyroscope Low Noise to Low Power Offset Shift and Gyroscope Offset Temperature Compensation (TC) Register 32
8.7 Registers 13 to 15 – Accelerometer Self-Test Registers..........................................................................32
8.8 Register 19 – X-Gyro Offset Adjustment Register – High Byte................................................................33
8.9 Register 20 – X-Gyro Offset Adjustment Register – Low Byte ................................................................33
8.10
Register 21 – Y-Gyro Offset Adjustment Register – High Byte ...........................................................33
8.1 Register 22 – Y-Gyro Offset Adjustment Register – Low Byte.................................................................33
8.2 Register 23 – Z-Gyro Offset Adjustment Register – High Byte................................................................33
8.3 Register 24 – Z-Gyro Offset Adjustment Register – Low Byte.................................................................34
8.4 Register 25 – Sample Rate Divider ..........................................................................................................34
8.5 Register 26 – Configuration.....................................................................................................................34
8.6 Register 27 – Gyroscope Configuration ..................................................................................................35
8.7 Register 28 – Accelerometer Configuration............................................................................................35
8.8 Register 29 – Accelerometer Configuration 2.........................................................................................36
8.9 Register 30 – Gyroscope Low Power Mode Configuration .....................................................................37
8.10
8.11
8.12
8.13
8.14
8.15
8.16
8.17
8.18
Register 32 – Wake-on Motion Threshold (X-axis Accelerometer) ....................................................38
Register 33 – Wake-on Motion Threshold (Y-axis Accelerometer).....................................................38
Register 34 – Wake-on Motion Threshold (Z-axis Accelerometer).....................................................38
Register 35 – FIFO Enable ...................................................................................................................39
Register 54 – FSYNC Interrupt Status..................................................................................................39
Register 55 – INT/DRDY Pin / Bypass Enable Configuration ...............................................................39
Register 57 – FIFO Watermark Interrupt Status .................................................................................40
Register 58 – Interrupt Status.............................................................................................................40
Registers 59 to 64 – Accelerometer Measurements: X-Axis High Byte ..............................................40
Document Number: DS-000184
Revision: 1.0
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Revision Date: 10/27/2016
ICM-20600
8.19
8.20
8.21
8.22
8.23
8.24
8.25
8.26
8.27
8.28
8.29
8.30
8.31
8.32
Registers 65 and 66 – Temperature Measurement............................................................................41
Registers 67 to 72 – Gyroscope Measurements .................................................................................41
Registers 80 to 82 – Gyroscope Self-Test Registers............................................................................42
Register 96-97 – FIFO Watermark Threshold in Number of Bytes .....................................................43
Register 104 – Signal Path Reset.........................................................................................................43
Register 105 – Accelerometer Intelligence Control............................................................................44
Register 106 – User Control................................................................................................................44
Register 107 – Power Management 1 ................................................................................................45
Register 108 – Power Management 2 ................................................................................................45
Register 112 – I2C Interface ................................................................................................................46
Register 114 and 115 – FIFO Count Registers.....................................................................................46
Register 116 – FIFO Read Write..........................................................................................................46
Register 117 – Who Am I ....................................................................................................................46
Registers 119, 120, 122, 123, 125, 126 – Accelerometer Offset Registers.........................................47
9
Use Notes........................................................................................................................................................... 48
9.1 Temperature Sensor Data.......................................................................................................................48
9.2 Accelerometer-Only Low-Noise Mode....................................................................................................48
9.3 Accelerometer Low-Power Mode ...........................................................................................................48
9.4 Sensor Mode Change ..............................................................................................................................48
9.5 Temp Sensor during Gyroscope Standby Mode......................................................................................48
9.6 Gyroscope Mode Change........................................................................................................................48
9.7 Power Management 1 Register Setting ..................................................................................................48
9.8 Unlisted Register Locations.....................................................................................................................48
9.9 Clock Transition When Gyroscope is Turned Off ....................................................................................48
9.10
9.11
9.12
Sleep Mode.........................................................................................................................................48
No special operation needed for FIFO read in low power mode........................................................49
Gyroscope Standby Procedure ...........................................................................................................49
10
11
Reference........................................................................................................................................................... 50
Orientation of Axes............................................................................................................................................ 51
11.1
ICM-20600 Supported Interfaces .......................................................................................................51
12
13
14
15
Package Dimensions .......................................................................................................................................... 52
Part Number Package Marking .......................................................................................................................... 54
Environmental Compliance................................................................................................................................ 55
Revision History ................................................................................................................................................. 56
Document Number: DS-000184
Revision: 1.0
Page 4 of 57
Revision Date: 10/27/2016
ICM-20600
LIST OF FIGURES
Figure 1. I2C Bus Timing Diagram .............................................................................................................................................................14
Figure 2. SPI Bus Timing Diagram.............................................................................................................................................................15
Figure 3. Pin out Diagram for ICM-20600 2.5 mm x 3.0 mm x 0.91 mm LGA ..........................................................................................17
Figure 4. ICM-20600 LGA Application Schematic (I2C Operation)............................................................................................................18
Figure 5. ICM-20600 LGA Application Schematic (SPI Operation) ...........................................................................................................18
Figure 6. ICM-20600 Block Diagram.........................................................................................................................................................19
Figure 7. ICM-20600 Solution Using I2C Interface....................................................................................................................................20
Figure 8. ICM-20600 Solution Using SPI Interface ...................................................................................................................................21
Figure 9. START and STOP Conditions......................................................................................................................................................24
Figure 10. Acknowledge on the I2C Bus ...................................................................................................................................................25
Figure 11. Complete I2C Data Transfer.....................................................................................................................................................25
Figure. 12 Typical SPI Master / Slave Configuration ................................................................................................................................27
Figure 13. Orientation of Axes of Sensitivity and Polarity of Rotation ....................................................................................................51
Figure 14. Package Dimensions................................................................................................................................................................52
Figure 15. Part Number Package Marking ...............................................................................................................................................54
Document Number: DS-000184
Revision: 1.0
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Revision Date: 10/27/2016
ICM-20600
LIST OF TABLES
Table 1. Gyroscope Specifications .............................................................................................................................................................9
Table 2. Accelerometer Specifications.....................................................................................................................................................10
Table 3. D.C. Electrical Characteristics.....................................................................................................................................................11
Table 6. A.C. Electrical Characteristics .....................................................................................................................................................13
Table 7. Other Electrical Specifications....................................................................................................................................................13
Table 8. I2C Timing Characteristics...........................................................................................................................................................14
Table 9. SPI Timing Characteristics (7 MHz).............................................................................................................................................15
Table 10. Absolute Maximum Ratings .....................................................................................................................................................16
Table 11. Signal Descriptions ...................................................................................................................................................................17
Table 12. Bill of Materials ........................................................................................................................................................................18
Table 13. Standard Power Modes for ICM-20600....................................................................................................................................22
Table 14. Table of Interrupt Sources........................................................................................................................................................23
Table 15. Serial Interface .........................................................................................................................................................................24
Table 16. I2C Terms ..................................................................................................................................................................................26
Table 15. ICM-20600 register map...........................................................................................................................................................29
Table 17. Package Dimensions Table .......................................................................................................................................................53
Document Number: DS-000184
Revision: 1.0
Page 6 of 57
Revision Date: 10/27/2016
ICM-20600
1 INTRODUCTION
1.1 PURPOSE AND SCOPE
This document is a product specification, providing a description, specifications, and design related information on the ICM-20600™
MotionTracking device. The device is housed in a small 2.5x3x0.91mm 14-pin LGA package.
1.2 PRODUCT OVERVIEW
The ICM-20600 is a 6-axis MotionTracking device that combines a 3-axis gyroscope, and a 3-axis accelerometer in a small
2.5x3x0.91mm (14-pin LGA) package. It also features a 1K-byte FIFO that can lower the traffic on the serial bus interface, and reduce
power consumption by allowing the system processor to burst read sensor data and then go into a low-power mode. ICM-20600,
with its 6-axis integration, enables manufacturers to eliminate the costly and complex selection, qualification, and system level
integration of discrete devices, guarantee eing optimal motion performance for consumers.
The gyroscope has a programmable full-scale range of ±250, ±500, ±1000, and ±2000 degrees/sec. The accelerometer has a user-
programmable accelerometer full-scale range of ±2g, ±4g, ±8g, and ±16g. Factory-calibrated initial sensitivity of both sensors
reduces production-line calibration requirements.
Other industry-leading features include on-chip 16-bit ADCs, programmable digital filters, an embedded temperature sensor, and
programmable interrupts. The device features I2C and SPI serial interfaces, a VDD operating range of 1.71 to 3.45V, and a separate
digital IO supply, VDDIO from 1.71V to 3.45V.
Communication with all registers of the device is performed using either I2C at 400kHz or SPI at 10MHz.
By leveraging its patented and volume-proven CMOS-MEMS fabrication platform, which integrates MEMS wafers with companion
CMOS electronics through wafer-level bonding, InvenSense has driven the package size down to a footprint and thickness of
2.5x3x0.91mm (14-pin LGA), to provide a very small yet high performance low cost package. The device provides high robustness by
supporting 20,000g shock reliability.
1.3 APPLICATIONS
Smartphones and Tablets
Wearable Sensors
Document Number: DS-000184
Revision: 1.0
Page 7 of 57
Revision Date: 10/27/2016
ICM-20600
2 FEATURES
2.1 GYROSCOPE FEATURES
The triple-axis MEMS gyroscope in the ICM-20600 includes a wide range of features:
Digital-output X-, Y-, and Z-axis angular rate sensors (gyroscopes) with a user-programmable full-scale range of ±250, ±500,
±1000, and ±2000°/sec and integrated 16-bit ADCs
Digitally-programmable low-pass filter
Low-power gyroscope operation
Factory calibrated sensitivity scale factor
Self-test
2.2 ACCELEROMETER FEATURES
The triple-axis MEMS accelerometer in ICM-20600 includes a wide range of features:
Digital-output X-, Y-, and Z-axis accelerometer with a programmable full scale range of ±2g, ±4g, ±8g and ±16g and integrated
16-bit ADCs
User-programmable interrupts
Wake-on-motion interrupt for low power operation of applications processor
Self-test
2.3 ADDITIONAL FEATURES
The ICM-20600 includes the following additional features:
Smallest and thinnest LGA package for portable devices: 2.5 mm x 3 mm x 0.91 mm (14-pin LGA)
Minimal cross-axis sensitivity between the accelerometer and gyroscope axes
1 KB FIFO buffer enables the applications processor to read the data in bursts
Digital-output temperature sensor
User-programmable digital filters for gyroscope, accelerometer, and temp sensor
20,000 g shock tolerant
400 kHz Fast Mode I2C for communicating with all registers
10 MHz SPI serial interface for communicating with all registers
MEMS structure hermetically sealed and bonded at wafer level
RoHS and Green compliant
Document Number: DS-000184
Revision: 1.0
Page 8 of 57
Revision Date: 10/27/2016
ICM-20600
3 ELECTRICAL CHARACTERISTICS
3.1 GYROSCOPE SPECIFICATIONS
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
GYROSCOPE SENSITIVITY
3
3
3
3
3
3
3
3
3
1
1
Full-Scale Range
FS_SEL=0
FS_SEL=1
FS_SEL=2
FS_SEL=3
±250
±500
±1000
±2000
16
dps
dps
dps
dps
Gyroscope ADC Word Length
Sensitivity Scale Factor
bits
FS_SEL=0
FS_SEL=1
FS_SEL=2
FS_SEL=3
25°C
131
LSB/(dps)
LSB/(dps)
LSB/(dps)
LSB/(dps)
%
65.5
32.8
16.4
±1
Sensitivity Scale Factor Initial Tolerance
Sensitivity Scale Factor Variation Over
Temperature
-40°C to +85°C
±2
%
1
1
Nonlinearity
Best fit straight line; 25°C
±0.1
±1
%
%
Cross-Axis Sensitivity
ZERO-RATE OUTPUT (ZRO)
Initial ZRO Tolerance
25°C
±1
dps
1
1
ZRO Variation vs. Temperature
-40°C to +85°C
±0.01
dps/°C
GYROSCOPE NOISE PERFORMANCE (FS_SEL=0)
@10 Hz
Rate Noise Spectral Density
Total RMS Noise
0.004
0.04
27
dps/√Hz
kHz
1, 4
1, 4
2
Bandwidth = 100 Hz
Gyroscope Mechanical Frequencies
Low Pass Filter Response
25
5
29
Hz
Programmable Range
Time from gyro enable to gyro drive
ready
250
ms
3
Gyroscope Start-Up Time
Output Data Rate
35
100
Hz
1
Low-Noise mode
Low Power Mode
3.91
3.91
8000
333.33
Hz
Hz
3
3
Table 1. Gyroscope Specifications
Notes:
1. Target spec. Subject to update.
2. Tested in production.
3. Guaranteed by design.
4. Noise specifications shown are for low-noise mode.
Document Number: DS-000184
Revision: 1.0
Page 9 of 57
Revision Date: 10/27/2016
ICM-20600
3.2 ACCELEROMETER SPECIFICATIONS
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
ACCELEROMETER SENSITIVITY
Full-Scale Range
AFS_SEL=0
AFS_SEL=1
AFS_SEL=2
±2
±4
±8
g
g
g
2
2
2
AFS_SEL=3
±16
16
g
2
2
2
2
2
2
ADC Word Length
Output iꢁ tꢉoꢊs ꢃoꢋpleꢋeꢁt foꢂꢋat
AFS_SEL=0
bits
Sensitivity Scale Factor
16,384
8,192
4,096
2,048
LSB/g
LSB/g
LSB/g
LSB/g
AFS_SEL=1
AFS_SEL=2
AFS_SEL=3
Sensitivity Scale Factor Initial
Tolerance
Component-level
±1
%
%
1
1
Sensitivity Change vs. Temperature
-40°C to +85°C
±1.5
Nonlinearity
Best Fit Straight Line
±0.3
±1
%
%
1
1
Cross-Axis Sensitivity
ZERO-G OUTPUT
Component-level, all axes
Board-level, all axes
±25
±40
±0.5
±1
1
1
1
1
Initial Tolerance
mg
X & Y-axis (-40°C to +85°C)
mg/ºC
mg/ºC
Zero-G Level Change vs. Temperature
Z-axis (-40°C to +85°C)
NOISE PERFORMANCE
@ 10 Hz
Power Spectral Density
100
1.0
µg/√Hz
1, 3
RMS Noise
Bandwidth = 100 Hz
mg-rms
1, 3
2
Low-Pass Filter Response
Accelerometer Startup Time
Programmable Range
From sleep mode to valid data
Low Noise mode
5
218
20
Hz
ms
Hz
Hz
10
2
3.91
3.91
4000
500
Output Data Rate
2
Low Power Mode
Table 2. Accelerometer Specifications
Notes:
1. Target spec. Subject to update.
2. Guaranteed by design.
3. Noise specifications shown are for low-noise mode.
Document Number: DS-000184
Revision: 1.0
Page 10 of 57
Revision Date: 10/27/2016
ICM-20600
3.3 ELECTRICAL SPECIFICATIONS
D.C. Electrical Characteristics
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
PARAMETER
CONDITIONS
SUPPLY VOLTAGES
MIN
TYP
MAX
UNITS
NOTES
VDD
1.71
1.71
1.8
1.8
3.45
3.45
V
V
1
1
VDDIO
SUPPLY CURRENTS & BOOT TIME
6-Axis Gyroscope + Accelerometer
Low-Noise Mode
2.79
mA
1
3-Axis Accelerometer
3-Axis Gyroscope
321
µA
1
1
2.55
mA
Accelerometer Low -Power Mode
(Gyroscope disabled)
100 Hz ODR, 1x averaging
100 Hz ODR, 1x averaging
40
µA
1
1
Gyroscope Low-Power Mode
(Accelerometer disabled)
1.08
mA
6-Axis Low-Power Mode
(Gyroscope Low-Power Mode;
Accelerometer Low-Noise Mode)
100 Hz ODR, 1x averaging
At 25ºC
1.33
6
mA
µA
1
1
Full-Chip Sleep Mode
TEMPERATURE RANGE
Specified Temperature Range
Performance parameters are not applicable
beyond Specified Temperature Range
-40
85
°C
1
Table 3. D.C. Electrical Characteristics
Notes:
1. Derived from validation or characterization of parts, not guaranteed in production.
Document Number: DS-000184
Revision: 1.0
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Revision Date: 10/27/2016
ICM-20600
A.C. Electrical Characteristics
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
NOTE
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
S
SUPPLIES
Monotonic ramp. Ramp
rate is 10% to 90% of the
final value
Supply Ramp Time
0.01
3
ms
1
1
2
mV peak-
peak
Power Supply Noise
10
Power Supply Sequencing
Requirement Between VDD and
VDDIO
None
TEMPERATURE SENSOR
-40
Operating Range
25°C Output
ADC Resolution
Ambient
85
°C
LSB
bits
Hz
1
3
2
2
2
3
2
1
1
0
16
Without Filter
With Filter
25°C
8000
ODR
3.91
-15
1000
15
Hz
°C
Room Temperature Offset
Stabilization Time
Sensitivity
14000
µs
Untrimmed
326.8
LSB/°C
%
Sensitivity Error
-2.5
+2.5
POWER-ON RESET
Start-up time for register read/write
From power-up
AD0 = 0
AD0 = 1
2
ms
1
1101000
1101001
I2C ADDRESS
DIGITAL INPUTS (FSYNC, AD0, SCLK, SDI, CS)
VIH, High Level Input Voltage
VIL, Low Level Input Voltage
CI, Input Capacitance
0.7*VDDIO
V
V
0.3*VDDIO
1
< 10
pF
DIGITAL OUTPUT (SDO, INT)
VOH, High Level Output Voltage
VOL1, LOW-Level Output Voltage
VOL.INT, INT Low-Level Output Voltage
RLOAD=1 MΩ;
RLOAD=1 MΩ;
0.9*VDDIO
V
V
V
0.1*VDDIO
0.1
OPEN=1, 0.3 mA sink
Current
OPEN=1
1
Output Leakage Current
tINT, INT Pulse Width
100
50
nA
µs
LATCH_INT_EN=0
I2C I/O (SCL, SDA)
VIL, LOW Level Input Voltage
VIH, HIGH-Level Input Voltage
-0.5V
0.3*VDDIO
V
V
V
V
0.7*VDDIO
VDDIO + 0.5V
Vhys, Hysteresis
0.1*VDDIO
VOL, LOW-Level Output Voltage
IOL, LOW-Level Output Current
3 mA sink current
0
0.4
1
2
VOL=0.4V
VOL=0.6V
3
6
mA
mA
Output Leakage Current
100
32
nA
ns
tof, Output Fall Time from VIHmax to
VILmax
Cb bus capacitance in pf
20+0.1Cb
300
INTERNAL CLOCK SOURCE
FCHOICE_B=1,2,3;
SMPLRT_DIV=0
Sample Rate
kHz
Document Number: DS-000184
Revision: 1.0
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Revision Date: 10/27/2016
ICM-20600
NOTE
PARAMETER
CONDITIONS
FCHOICE_B=0;
DLPFCFG=0 or 7
SMPLRT_DIV=0
FCHOICE_B=0;
MIN
TYP
MAX
UNITS
S
8
kHz
kHz
2
2
DLPFCFG=1,2,3,4,5,6;
SMPLRT_DIV=0
1
CLK_SEL=0, 6 or gyro
inactive; 25°C
-3
-1
+3
+1
±2
±2
%
%
%
%
1
1
1
1
Clock Frequency Initial Tolerance
CLK_SEL=1,2,3,4,5 and gyro
active; 25°C
CLK_SEL=0,6 or gyro
inactive. (-40°C to +85°C)
CLK_SEL=1,2,3,4,5 and gyro
active
Frequency Variation over
Temperature
Table 4. A.C. Electrical Characteristics
Notes:
1. Derived from validation or characterization of parts, not guaranteed in production.
2. Guaranteed by design.
3. Production tested.
Other Electrical Specifications
Typical Operating Circuit of section Error! Reference source not found., VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
PARAMETER
CONDITIONS
SERIAL INTERFACE
MIN
TYP
MAX
UNITS
NOTES
100
0.2
100
±10%
Low Speed Characterization
High Speed Characterization
kHz
1,3
SPI Operating Frequency, All
Registers Read/Write
1
10
MHz
1, 2, 3
SPI Modes
0 and 3
All registers, Fast-mode
100
400
100
kHz
kHz
1
1
I2C Operating Frequency
All registers, Standard-mode
Table 5. Other Electrical Specifications
Notes:
1. Derived from validation or characterization of parts, not guaranteed in production.
2. SPI clock duty cycle between 45% and 55% should be used for 10 MHz operation.
3. Minimum SPI/I2C clock rate is dependent on ODR. If ODR is below 4 kHz, minimum clock rate is 100 kHz. If ODR is greater than 4 kHz, minimum clock rate is
200 kHz.
Document Number: DS-000184
Revision: 1.0
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ICM-20600
3.4 I2C TIMING CHARACTERIZATION
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
PARAMETERS
CONDITIONS
I2C FAST-MODE
MIN
TYP
MAX
UNITS
NOTES
I2C TIMING
fSCL, SCL Clock Frequency
100
0.6
400
kHz
µs
µs
µs
µs
µs
ns
ns
ns
µs
µs
1
1
1
1
1
1
1
1
1
1
1
tHD.STA, (Repeated) START Condition Hold Time
tLOW, SCL Low Period
1.3
tHIGH, SCL High Period
0.6
tSU.STA, Repeated START Condition Setup Time
tHD.DAT, SDA Data Hold Time
tSU.DAT, SDA Data Setup Time
tr, SDA and SCL Rise Time
0.6
0
100
Cb bus cap. from 10 to 400 pF
Cb bus cap. from 10 to 400 pF
20+0.1Cb
20+0.1Cb
0.6
300
300
tf, SDA and SCL Fall Time
tSU.STO, STOP Condition Setup Time
tBUF, Bus Free Time Between STOP and START
Condition
1.3
Cb, Capacitive Load for each Bus Line
tVD.DAT, Data Valid Time
< 400
pF
µs
µs
1
1
1
0.9
0.9
tVD.ACK, Data Valid Acknowledge Time
Table 6. I2C Timing Characteristics
Notes:
1. Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets
tf
tSU.DAT
tr
SDA
SCL
70%
30%
70%
30%
continued below at
9th clock cycle
A
tf
tr
tVD.DAT
70%
30%
70%
30%
tHD.DAT
tHD.STA
1/fSCL
tLOW
1st clock cycle
S
tHIGH
tBUF
SDA
SCL
70%
30%
A
tSU.STO
tSU.STA
tHD.STA
tVD.ACK
70%
30%
9th clock cycle
S
P
Sr
Figure 1. I2C Bus Timing Diagram
Document Number: DS-000184
Revision: 1.0
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Revision Date: 10/27/2016
ICM-20600
3.5 SPI TIMING CHARACTERIZATION
Typical Operating Circuit of section Error! Reference source not found., VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted.
Parameters
Conditions
Min
Typical
Max
Units
Notes
SPI TIMING
fSPC, SPC Clock Frequency
tLOW, SPC Low Period
tHIGH, SPC High Period
tSU.CS, CS Setup Time
tHD.CS, CS Hold Time
tSU.SDI, SDI Setup Time
tHD.SDI, SDI Hold Time
tVD.SDO, SDO Valid Time
tDIS.SDO, SDO Output Disable Time
10
MHz
ns
1
1
1
1
1
1
1
1
1
45
45
2
ns
ns
63
3
ns
ns
7
ns
Cload = 20 pF
40
20
ns
ns
Table 7. SPI Timing Characteristics (7 MHz)
Notes:
1. Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets
2. Based on other parameter values
CS
70%
30%
tFall
tRise
tHD;CS
tSU;CS
70%
tHIGH
1/fCLK
SCLK
30%
tSU;SDI
tHD;SDI
tLOW
70%
30%
SDI
LSB IN
MSB IN
tDIS;SDO
tVD;SDO
tHD;SDO
70%
30%
SDO
MSB OUT
LSB OUT
Figure 2. SPI Bus Timing Diagram
Document Number: DS-000184
Revision: 1.0
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Revision Date: 10/27/2016
ICM-20600
3.6 ABSOLUTE MAXIMUM RATINGS
“tꢂess aꢌoꢄe those listed as ꢍAꢌsolute Maꢀiꢋuꢋ ‘atiꢁgsꢎ ꢋaꢏ ꢃause peꢂꢋaꢁeꢁt daꢋage to the deꢄiꢃe. These aꢂe stꢂess ꢂatiꢁgs oꢁly
and functional operation of the device at these conditions is not implied. Exposure to the absolute maximum ratings conditions for
extended periods may affect device reliability.
PARAMETER
RATING
-0.5V to +4V
Supply Voltage, VDD
Supply Voltage, VDDIO
REGOUT
-0.5V to +4V
-0.5V to 2V
Input Voltage Level (AD0, FSYNC, SCL, SDA)
Acceleration (Any Axis, unpowered)
Operating Temperature Range
-0.5V to VDDIO + 0.5V
20,000g for 0.2 ms
-40°C to +85°C
-40°C to +125°C
Storage Temperature Range
2 kV (HBM);
250V (MM)
Electrostatic Discharge (ESD) Protection
Latch-up
JEDEC Class II (2),125°C
±100 mA
Table 8. Absolute Maximum Ratings
Document Number: DS-000184
Page 16 of 57
Revision: 1.0
Revision Date: 10/27/2016
ICM-20600
4 APPLICATIONS INFORMATION
4.1 PIN OUT DIAGRAM AND SIGNAL DESCRIPTION
PIN NUMBER
PIN NAME
AD0 / SDO
NC
PIN DESCRIPTION
I2C slave address LSB (AD0); SPI serial data output (SDO)
No Connect
1
2
3
NC
No Connect
4
INT1
Interrupt digital output (totem pole or open-drain)
Digital I/O supply voltage
5
VDDIO
GND
6
Power supply ground
7
RESV
Reserved, connect to ground
8
VDD
Power supply voltage
9
INT2
Interrupt digital output (totem pole or open-drain)
Frame synchronization digital input or No Connect
Regulator filter capacitor connection
Chip select (SPI mode only)
10
11
12
13
14
FSYNC / NC
REGOUT
nCS
SCL / SCLK
SDA / SDI
I2C serial clock (SCL); SPI serial clock (SCLK)
I2C serial data (SDA); SPI serial data input (SDI)
Table 9. Signal Descriptions
AD0/SDO
1
2
3
4
11
REGOUT
FSYNC/NC
INT2
+Z
10
9
NC
NC
I
C
M
-
2
0
ICM-20600
6
0
0
8
INT1
VDD
+Y
+X
Orientation of Axes of Sensitivity and Polarity of
Rotation
LGA Package (Top view)
Figure 3. Pin out Diagram for ICM-20600 2.5 mm x 3.0 mm x 0.91 mm LGA
Document Number: DS-000184
Revision: 1.0
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Revision Date: 10/27/2016
ICM-20600
4.2 TYPICAL OPERATING CIRCUIT
SCL
SDA
VDDIO
14
13
12
AD0 / SDO
AD0
REGOUT
11
10
9
1
2
C1, 0.1 mF
FSYNC
INT2
NC
NC
FSYNC
INT2
ICM-20600
3
4
1.71 – 3.45VDC
C4, 2.2 mF
INT1
INT1
VDD
8
5
6
7
C2, 0.1 mF
1.71 – 3.45VDC
C3, 10 nF
Figure 4. ICM-20600 LGA Application Schematic (I2C Operation)
Note: I2C liꢁes aꢂe opeꢁ dꢂaiꢁ aꢁd pullup ꢂesistoꢂs ꢐe.g. ꢑꢆkΩꢒ aꢂe ꢂeꢓuiꢂed.
SDI SCLK
nCS
14
13
12
AD0 / SDO
NC
REGOUT
SDO
11
10
9
1
2
C1, 0.1 mF
FSYNC
INT2
FSYNC
INT2
ICM-20600
3
4
NC
1.71 – 3.45VDC
C4, 2.2 mF
INT1
VDD
8
INT1
5
6
7
C2, 0.1 mF
1.71 – 3.45VDC
C3, 10 nF
Figure 5. ICM-20600 LGA Application Schematic (SPI Operation)
4.3 BILL OF MATERIALS FOR EXTERNAL COMPONENTS
COMPONENT
LABEL
SPECIFICATION
QUANTITY
REGOUT Capacitor
C1
X7R, 0.1 µF ±10%
1
C2
C4
X7R, 0.1 µF ±10%
X7R, 2.2 µF ±10%
1
1
VDD Bypass Capacitors
VDDIO Bypass Capacitor
C3
X7R, 10 nF ±10%
1
Table 10. Bill of Materials
Document Number: DS-000184
Revision: 1.0
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Revision Date: 10/27/2016
ICM-20600
4.4 BLOCK DIAGRAM
ICM-20600
INT1
INT2
Self
test
X Accel
ADC
ADC
Interrupt
Status
Register
nCS
Self
test
Y Accel
Slave I2C and
SPI Serial
Interface
AD0 / SDO
SCL / SCLK
SDA / SDI
FIFO
Self
test
Z Accel
X Gyro
ADC
ADC
User & Config
Registers
FSYNC
Self
test
Sensor
Registers
Self
test
Y Gyro
Z Gyro
ADC
ADC
Self
test
Temp Sensor
ADC
Bias & LDOs
Charge
Pump
VDD
GND
REGOUT
Figure 6. ICM-20600 Block Diagram
4.5 OVERVIEW
The ICM-20600 is comprised of the following key blocks and functions:
Three-axis MEMS rate gyroscope sensor with 16-bit ADCs and signal conditioning
Three-axis MEMS accelerometer sensor with 16-bit ADCs and signal conditioning
Primary I2C and SPI serial communications interfaces
Self-Test
Clocking
Sensor Data Registers
FIFO
Interrupts
Digital-Output Temperature Sensor
Bias and LDOs
Charge Pump
Standard Power Modes
4.6 THREE-AXIS MEMS GYROSCOPE WITH 16-BIT ADCS AND SIGNAL CONDITIONING
The ICM-20600 consists of three independent vibratory MEMS rate gyroscopes, which detect rotation about the X-, Y-, and Z- Axes.
When the gyros are rotated about any of the sense axes, the Coriolis Effect causes a vibration that is detected by a capacitive pickoff.
The resulting signal is amplified, demodulated, and filtered to produce a voltage that is proportional to the angular rate. This voltage
is digitized using individual on-chip 16-bit Analog-to-Digital Converters (ADCs) to sample each axis. The full-scale range of the gyro
sensors may be digitally programmed to ±250, ±500, ±1000, or ±2000 degrees per second (dps). The ADC sample rate is
programmable from 8,000 samples per second, down to 3.9 samples per second, and user-selectable low-pass filters enable a wide
range of cut-off frequencies.
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Revision: 1.0
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ICM-20600
4.7 THREE-AXIS MEMS ACCELEROMETER WITH 16-BIT ADCS AND SIGNAL CONDITIONING
The ICM-ꢔꢆꢕꢆꢆꢊs ꢖ-Axis accelerometer uses separate proof masses for each axis. Acceleration along a particular axis induces
displacement on the corresponding proof mass, and capacitive sensors detect the displacement differentially. The ICM-ꢔꢆꢕꢆꢆꢊs
architecture reduces the aꢃꢃeleꢂoꢋeteꢂsꢊ susceptibility to fabrication variations as well as to thermal drift. When the device is placed
on a flat surface, it will measure 0g on the X- and Y-axes and +1g on the Z-aꢀis. The aꢃꢃeleꢂoꢋeteꢂsꢊ sꢃale factor is calibrated at the
factory and is nominally independent of supply voltage. Each sensor has a dedicated sigma-delta ADC for providing digital outputs.
The full scale range of the digital output can be adjusted to ±2g, ±4g, ±8g, or ±16g.
4.8 I2C AND SPI SERIAL COMMUNICATIONS INTERFACES
The ICM-20600 communicates to a system processor using either a SPI or an I2C serial interface. The ICM-20600 always acts as a
slave when communicating to the system processor. The LSB of the I2C slave address is set by pin 1 (AD0).
ICM-20600 Solution Using I2C Interface
In Figure 7, the system processor is an I2C master to the ICM-20600.
Interrupt
Status
Register
I2C Processor Bus: for reading all
INT1
sensor data from MPU
INT2
ICM-20600
AD0
SCL
VDDIO or GND
Slave I2C
or SPI
Serial
SCL
SDA
System
Processor
SDA
Interface
FIFO
User & Config
Registers
Sensor
Register
Factory
Calibration
Bias & LDOs
VDD
GND
REGOUT
Figure 7. ICM-20600 Solution Using I2C Interface
ICM-20600 Solution Using SPI Interface
In Figure 8 below, the system processor is an SPI master to the ICM-20600. Pins 1, 12, 13, and 14 are used to support the SDO, nCS,
SCLK, and SDI signals for SPI communications.
Document Number: DS-000184
Revision: 1.0
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Revision Date: 10/27/2016
ICM-20600
Processor SPI Bus: for reading all
data from MPU and for configuring
MPU
Interrupt
Status
Register
INT1
INT2
nCS
nCS
SDO
ICM-20600
SDI
Slave I2C
or SPI
Serial
System
Processor
SCLK
SDI
SPC
SDO
Interface
FIFO
Config
Register
Sensor
Register
Factory
Calibration
Bias & LDOs
VDD
GND
REGOUT
Figure 8. ICM-20600 Solution Using SPI Interface
4.9 SELF-TEST
Self-test allows for the testing of the mechanical and electrical portions of the sensors. The self-test for each measurement axis can
be activated by means of the gyroscope and accelerometer self-test registers.
When the self-test is activated, the electronics cause the sensors to be actuated and produce an output signal. The output signal is
used to observe the self-test response.
The self-test response is defined as follows:
SELF-TEST RESPONSE = SENSOR OUTPUT WITH SELF-TEST ENABLED – SENSOR OUTPUT WITH SELF-TEST DISABLED
The self-test response for each gyroscope axis is defined in the gyroscope specification table, while that for each accelerometer axis
is defined in the accelerometer specification table.
When the value of the self-test response is within the specified min/max limits of the product specification, the part has passed self-
test. When the self-test response exceeds the min/max values, the part is deemed to have failed self-test.
4.10 CLOCKING
The ICM-20600 has a flexible clocking scheme, allowing a variety of internal clock sources to be used for the internal synchronous
circuitry. This synchronous circuitry includes the signal conditioning and ADCs, and various control circuits and registers. An on-chip
PLL provides flexibility in the allowable inputs for generating this clock.
Allowable internal sources for generating the internal clock are:
a) An internal relaxation oscillator
b) Auto-select between internal relaxation oscillator and gyroscope MEMS oscillator to use the best available source
The only setting supporting specified performance in all modes is option b). It is recommended that option b) be used.
4.11 SENSOR DATA REGISTERS
The sensor data registers contain the latest gyroscope, accelerometer, and temperature measurement data. They are read-only
registers, and are accessed via the serial interface. Data from these registers may be read anytime.
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Revision: 1.0
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ICM-20600
4.12 FIFO
The ICM-20600 contains a 1 KB FIFO (FIFO depth 1008 bytes) register that is accessible via the Serial Interface. The FIFO
configuration register determines which data is written into the FIFO. Possible choices include gyro data, accelerometer data,
temperature readings, and FSYNC input. A FIFO counter keeps track of how many bytes of valid data are contained in the FIFO. The
FIFO register supports burst reads. The interrupt function may be used to determine when new data is available.
The ICM-20600 allows FIFO read in low-power accelerometer mode. A programmable FIFO watermark is included, with data-ready
interrupt triggered when the watermark is reached.
4.13 INTERRUPTS
Interrupt functionality is configured via the Interrupt Configuration register. Items that are configurable include the INT1 and INT2
pins configuration, the interrupt latching and clearing method, and triggers for the interrupt. Items that can trigger an interrupt are
(1) Clock generator locked to new reference oscillator (used when switching clock sources); (2) new data is available to be read (from
the FIFO and Data registers); (3) accelerometer event interrupts; (4) FIFO overflow. The interrupt status can be read from the
Interrupt Status register.
4.14 DIGITAL-OUTPUT TEMPERATURE SENSOR
An on-chip temperature sensor and ADC are used to measure the ICM-20600 die temperature. The readings from the ADC can be
read from the FIFO or the Sensor Data registers.
4.15 BIAS AND LDOS
The bias and LDO section generates the internal supply and the reference voltages and currents required by the ICM-20600. Its two
inputs are an unregulated VDD and a VDDIO logic reference supply voltage. The LDO output is bypassed by a capacitor at REGOUT.
For further details on the capacitor, please refer to the Bill of Materials for External Components.
4.16 CHARGE PUMP
An on-chip charge pump generates the high voltage required for the MEMS oscillator.
4.17 STANDARD POWER MODES
The following table lists the user-accessible power modes for ICM-20600.
MODE
NAME
GYRO
Off
ACCEL
Off
1
2
3
4
5
6
7
8
Sleep Mode
Standby Mode
Drive On
Off
Off
Off
Duty-Cycled
Accelerometer Low-Power Mode
Accelerometer Low-Noise Mode
Gyroscope Low-Power Mode
Gyroscope Low-Noise Mode
6-Axis Low-Noise Mode
On
Off
Off
On
On
Duty-Cycled
On
On
6-Axis Low-Power Mode
Duty-Cycled
Table 11. Standard Power Modes for ICM-20600
Notes:
1. Power consumption for individual modes can be found in the D.C. Electrical Characteristics section.
Document Number: DS-000184
Revision: 1.0
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Revision Date: 10/27/2016
ICM-20600
5 PROGRAMMABLE INTERRUPTS
The ICM-20600 has a programmable interrupt system that can generate an interrupt signal on the INT pins. Status flags indicate the
source of an interrupt. Interrupt sources may be enabled and disabled individually. Interrupts carried on INT1 and INT2 pins are
shown in the table below. If INT2 is not enabled, all interrupts are mapped to INT1.
INTERRUPT NAME
Motion Detection
MODULE
INT2
FIFO Overflow
FIFO Watermark
Data Ready
FSYNC
INT2
INT1
INT1
INT2
Table 12. Table of Interrupt Sources
5.1 WAKE-ON-MOTION INTERRUPT
The ICM-20600 provides motion detection capability. A qualifying motion sample is one where the high passed sample from any axis
has an absolute value exceeding a user-programmable threshold. The following steps explain how to configure the Wake-on-Motion
Interrupt.
Step 1: Ensure that Accelerometer is running
In PWR_MGMT_1 register (0x6B) set CYCLE = 0, SLEEP = 0, and GYRO_STANDBY = 0
In PWR_MGMT_2 register (0x6C) set STBY_XA = STBY_YA = STBY_ZA = 0, and STBY_XG = STBY_YG = STBY_ZG = 1
Step 2: Accelerometer Configuration
In ACCEL_CONFIG2 register (0x1D) set ACCEL_FCHOICE_B = 1 and A_DLPF_CFG[2:0] = 1 (b001)
Step 3: Enable Motion Interrupt
In INT_ENABLE register (0x38) set WOM_X_INT_EN = WOM_Y_INT_EN = WOM_Z_INT_EN = 1 to enable motion interrupt for
X, Y, and Z axis
Step 4: Set Motion Threshold
Set the motion threshold for X-axis in ACCEL_WOM_X_THR register (0x20)
Set the motion threshold for Y-axis in ACCEL_WOM_Y_THR register (0x21)
Set the motion threshold for Z-axis in ACCEL_WOM_Z_THR register (0x22)
Step 5: Set Interrupt Mode
In ACCEL_INTEL_CTRL register (0x69) clear bit 0 (WOM_TH_MODE) to select the motion interrupt as an OR of the enabled
interrupts for X, Y, Z-axes and set bit 0 to make the interrupt an AND of the enabled interrupts for X, Y, Z axes
Step 6: Enable Accelerometer Hardware Intelligence
In ACCEL_INTEL_CTRL register (0x69) set ACCEL_INTEL_EN = ACCEL_INTEL_MODE = 1
Step 7: Set Frequency of Wake-Up
In SMPLRT_DIV register (0x19) set SMPLRT_DIV[7:0] = 3.9Hz – 500Hz
Step 8: Enable Cycle Mode (Accelerometer Low-Power Mode)
In PWR_MGMT_1 register (0x6B) set CYCLE = 1
Document Number: DS-000184
Revision: 1.0
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ICM-20600
6 DIGITAL INTERFACE
6.1 I2C AND SPI SERIAL INTERFACES
The internal registers and memory of the ICM-20600 can be accessed using either I2C at 400 kHz or SPI at 10 MHz. SPI operates in
four-wire mode.
PIN NUMBER
PIN NAME
AD0 / SDO
nCS
PIN DESCRIPTION
1
I2C Slave Address LSB (AD0); SPI serial data output (SDO)
Chip select (SPI mode only)
12
13
14
SCL / SCLK
SDA / SDI
I2C serial clock (SCL); SPI serial clock (SCLK)
I2C serial data (SDA); SPI serial data input (SDI)
Table 13. Serial Interface
Note:
To prevent switching into I2C mode when using SPI, the I2C interface should be disabled by setting the I2C_IF_DIS configuration bit. Setting this bit should be
peꢂfoꢂꢋed iꢋꢋediatelꢏ afteꢂ ꢉaitiꢁg foꢂ the tiꢋe speꢃified ꢌꢏ the ꢍ“taꢂt-Up Tiꢋe foꢂ ‘egisteꢂ ‘ead/Wꢂiteꢎ iꢁ “eꢃtioꢁ 0.
For further information regarding the I2C_IF_DIS bit, please refer to sections 7 and Error! Reference source not found. of this document.
6.2 I2C INTERFACE
I2C is a two-wire interface comprised of the signals serial data (SDA) and serial clock (SCL). In general, the lines are open-drain and bi-
directional. In a generalized I2C interface implementation, attached devices can be a master or a slave. The master device puts the
slave address on the bus, and the slave device with the matching address acknowledges the master.
The ICM-20600 always operates as a slave device when communicating to the system processor, which thus acts as the master. SDA
and SCL lines typically need pull-up resistors to VDD. The maximum bus speed is 400 kHz.
The slave address of the ICM-20600 is b110100X which is 7 bits long. The LSB bit of the 7-bit address is determined by the logic level
on pin AD0. This allows two ICM-20600s to be connected to the same I2C bus. When used in this configuration, the address of one of
the devices should be b1101000 (pin AD0 is logic low) and the address of the other should be b1101001 (pin AD0 is logic high).
6.3 I2C COMMUNICATIONS PROTOCOL
START (S) and STOP (P) Conditions
Communication on the I2C bus starts when the master puts the START condition (S) on the bus, which is defined as a HIGH-to-LOW
transition of the SDA line while SCL line is HIGH (see figure below). The bus is considered to be busy until the master puts a STOP
condition (P) on the bus, which is defined as a LOW to HIGH transition on the SDA line while SCL is HIGH (see figure below).
Additionally, the bus remains busy if a repeated START (Sr) is generated instead of a STOP condition.
SDA
SCL
S
P
START condition
STOP condition
Figure 9. START and STOP Conditions
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ICM-20600
Data Format / Acknowledge
I2C data bytes are defined to be 8-bits long. There is no restriction to the number of bytes transmitted per data transfer. Each byte
transferred must be followed by an acknowledge (ACK) signal. The clock for the acknowledge signal is generated by the master,
while the receiver generates the actual acknowledge signal by pulling down SDA and holding it low during the HIGH portion of the
acknowledge clock pulse.
If a slave is busy and cannot transmit or receive another byte of data until some other task has been performed, it can hold SCL
LOW, thus forcing the master into a wait state. Normal data transfer resumes when the slave is ready, and releases the clock line
(refer to the following figure).
DATA OUTPUT BY
TRANSMITTER (SDA)
not acknowledge
DATA OUTPUT BY
RECEIVER (SDA)
acknowledge
SCL FROM
MASTER
1
2
8
9
clock pulse for
acknowledgement
START
condition
Figure 10. Acknowledge on the I2C Bus
Communications
After beginning communications with the START condition (S), the master sends a 7-bit slave address followed by an 8th bit, the
read/write bit. The read/write bit indicates whether the master is receiving data from or is writing to the slave device. Then, the
master releases the SDA line and waits for the acknowledge signal (ACK) from the slave device. Each byte transferred must be
followed by an acknowledge bit. To acknowledge, the slave device pulls the SDA line LOW and keeps it LOW for the high period of
the SCL line. Data transmission is always terminated by the master with a STOP condition (P), thus freeing the communications line.
However, the master can generate a repeated START condition (Sr), and address another slave without first generating a STOP
condition (P). A LOW to HIGH transition on the SDA line while SCL is HIGH defines the stop condition. All SDA changes should take
place when SCL is low, with the exception of start and stop conditions.
SDA
SCL
1 – 7
8
9
1 – 7
8
9
1 – 7
8
9
S
P
START
STOP
ADDRESS
R/W
ACK
DATA
ACK
DATA
ACK
condition
condition
Figure 11. Complete I2C Data Transfer
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ICM-20600
To write the internal ICM-20600 registers, the master transmits the start condition (S), followed by the I2C address and the write bit
(0). At the 9th clock cycle (when the clock is high), the ICM-20600 acknowledges the transfer. Then the master puts the register
address (RA) on the bus. After the ICM-20600 acknowledges the reception of the register address, the master puts the register data
onto the bus. This is followed by the ACK signal, and data transfer may be concluded by the stop condition (P). To write multiple
bytes after the last ACK signal, the master can continue outputting data rather than transmitting a stop signal. In this case, the ICM-
20600 automatically increments the register address and loads the data to the appropriate register. The following figures show
single and two-byte write sequences.
Single-Byte Write Sequence
Master
Slave
S
AD+W
RA
DATA
DATA
P
ACK
ACK
ACK
Burst Write Sequence
Master
Slave
S
AD+W
RA
DATA
P
ACK
ACK
ACK
ACK
To read the internal ICM-20600 registers, the master sends a start condition, followed by the I2C address and a write bit, and then
the register address that is going to be read. Upon receiving the ACK signal from the ICM-20600, the master transmits a start signal
followed by the slave address and read bit. As a result, the ICM-20600 sends an ACK signal and the data. The communication ends
with a not acknowledge (NACK) signal and a stop bit from master. The NACK condition is defined such that the SDA line remains high
at the 9th clock cycle. The following figures show single and two-byte read sequences.
Single-Byte Read Sequence
Master
Slave
S
AD+W
RA
RA
S
AD+R
AD+R
NACK
P
ACK
ACK
ACK
ACK
ACK
DATA
Burst Read Sequence
Master
Slave
S
AD+W
S
ACK
NACK
P
ACK DATA
DATA
6.4 I2C TERMS
SIGNAL
DESCRIPTION
S
AD
Start Condition: SDA goes from high to low while SCL is high
Slave I2C address
W
Write bit (0)
R
Read bit (1)
ACK
NACK
RA
Acknowledge: SDA line is low while the SCL line is high at the 9th clock cycle
Not-Acknowledge: SDA line stays high at the 9th clock cycle
ICM-20600 internal register address
DATA
P
Transmit or received data
Stop condition: SDA going from low to high while SCL is high
Table 14. I2C Terms
6.5 SPI INTERFACE
SPI is a 4-wire synchronous serial interface that uses two control lines and two data lines. The ICM-20600 always operates as a Slave
device during standard Master-Slave SPI operation.
With respect to the Master, the Serial Clock output (SCLK), the Serial Data Output (SDO) and the Serial Data Input (SDI) are shared
among the Slave devices. Each SPI slave device requires its own Chip Select (nCS) line from the master.
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ICM-20600
nCS goes low (active) at the start of transmission and goes back high (inactive) at the end. Only one nCS line is active at a time,
ensuring that only one slave is selected at any given time. The nCS lines of the non-selected slave devices are held high, causing their
SDO lines to remain in a high-impedance (high-z) state so that they do not interfere with any active devices.
SPI Operational Features
1. Data is delivered MSB first and LSB last
2. Data is latched on the rising edge of SCLK
3. Data should be transitioned on the falling edge of SCLK
4. The maximum frequency of SCLK is 10MHz
5. SPI read and write operations are completed in 16 or more clock cycles (two or more bytes). The first byte contains the
SPI Address, and the following byte(s) contain(s) the SPI data. The first bit of the first byte contains the Read/Write bit
and indicates the Read (1) or Write (0) operation. The following 7 bits contain the Register Address. In cases of multiple-
byte Read/Writes, data is two or more bytes:
SPI Address format
MSB
LSB
R/W A6 A5 A4 A3 A2 A1 A0
SPI Data format
MSB
LSB
D7
D6 D5 D4 D3 D2 D1 D0
6. Supports Single or Burst Read/Writes.
SCLK
SDI
SPI Master
SPI Slave 1
SDO
nCS
CS1
CS2
SCLK
SDI
SDO
nCS
SPI Slave 2
Figure. 12 Typical SPI Master / Slave Configuration
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ICM-20600
7 REGISTER MAP
The following table lists the register map for the ICM-20600. Note that all registers are accessible in all modes of device operation.
Addr
(Hex)
Addr
(Dec.)
Serial
I/F
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
READ/
WRITE
04
05
07
08
0A
0B
0D
04
05
07
08
10
11
13
XG_OFFS_TC_H
XG_OFFS_LP[5:0]
XG_OFFS_TC_H [9:8]
READ/
WRITE
XG_OFFS_TC_L
YG_OFFS_TC_H
YG_OFFS_TC_L
XG_OFFS_TC_L [7:0]
YG_OFFS_TC_L [7:0]
READ/
WRITE
YG_OFFS_LP[5:0]
ZG_OFFS_LP[5:0]
YG_OFFS_TC_H [9:8]
ZG_OFFS_TC_H [9:8]
READ/
WRITE
READ/
WRITE
ZG_OFFS_TC_H
ZG_OFFS_TC_L
READ/
WRITE
ZG_OFFS_TC_L [7:0]
XA_ST_DATA[7:0]
READ/
WRITE
SELF_TEST_X_ACCEL
READ/
WRITE
0E
0F
13
14
15
16
17
18
19
1A
1B
1C
1D
1E
20
21
22
23
14
15
19
20
21
22
23
24
25
26
27
28
29
30
32
33
34
35
SELF_TEST_Y_ACCEL
SELF_TEST_Z_ACCEL
XG_OFFS_USRH
XG_OFFS_USRL
YG_OFFS_USRH
YG_OFFS_USRL
ZG_OFFS_USRH
ZG_OFFS_USRL
SMPLRT_DIV
YA_ST_DATA[7:0]
ZA_ST_DATA[7:0]
X_OFFS_USR [15:8]
X_OFFS_USR [7:0]
Y_OFFS_USR [15:8]
Y_OFFS_USR [7:0]
Z_OFFS_USR [15:8]
Z_OFFS_USR [7:0]
SMPLRT_DIV[7:0]
READ/
WRITE
READ/
WRITE
READ/
WRITE
READ/
WRITE
READ/
WRITE
READ/
WRITE
READ/
WRITE
READ/
WRITE
READ/
WRITE
FIFO_
MODE
CONFIG
-
EXT_SYNC_SET[2:0]
DLPF_CFG[2:0]
READ/
WRITE
GYRO_CONFIG
ACCEL_CONFIG
ACCEL_CONFIG 2
LP_MODE_CFG
ACCEL_WOM_X_THR
ACCEL_WOM_Y_THR
ACCEL_WOM_Z_THR
FIFO_EN
XG_ST
XA_ST
YG_ST
YA_ST
ZG_ST
FS_SEL [1:0]
-
FCHOICE_B[1:0]
READ/
WRITE
ZA_ST
ACCEL_FS_SEL[1:0]
-
READ/
WRITE
ACCEL_FCH
OICE_B
-
DEC2_CFG
A_DLPF_CFG
READ/
WRITE
GYRO_CYC
LE
G_AVGCFG[2:0]
-
READ/
WRITE
WOM_X_TH[7:0]
READ/
WRITE
WOM_Y_TH[7:0]
WOM_Z_TH[7:0]
READ/
WRITE
READ/
WRITE
ACCEL_FIF
O_EN
-
GYRO_FIFO_EN
-
READ to
CLEAR
36
37
54
55
FSYNC_INT
FSYNC_INT
INT_LEVEL
-
FSYNC
_INT_MODE
_EN
READ/
WRITE
LATCH
_INT_EN
INT_RD
_CLEAR
FSYNC_INT
_LEVEL
INT_PIN_CFG
INT_OPEN
-
-
INT2_EN
FIFO
_OFLOW
_EN
READ/
WRITE
WOM_X_I
NT_EN
WOM_Y_INT
_EN
WOM_Z_INT
_EN
FSYNC_INT
_EN
GDRIVE_INT
_EN
DATA_RDY_IN
T_EN
38
39
56
57
INT_ENABLE
READ to
CLEAR
FIFO_WM_IN
T
FIFO_WM_INT_STATUS
-
-
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ICM-20600
Addr
(Hex)
Addr
(Dec.)
Serial
I/F
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
FIFO
_OFLOW
_INT
READ to
CLEAR
WOM_X_I
NT
DATA
_RDY_INT
3A
58
INT_STATUS
WOM_Y_INT
WOM_Z_INT
-
GDRIVE_INT
-
3B
3C
3D
3E
3F
40
41
42
43
44
45
46
47
48
59
60
61
62
63
64
65
66
67
68
69
70
71
72
ACCEL_XOUT_H
ACCEL_XOUT_L
ACCEL_YOUT_H
ACCEL_YOUT_L
ACCEL_ZOUT_H
ACCEL_ZOUT_L
TEMP_OUT_H
TEMP_OUT_L
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
ACCEL_XOUT[15:8]
ACCEL_XOUT[7:0]
ACCEL_YOUT[15:8]
ACCEL_YOUT[7:0]
ACCEL_ZOUT[15:8]
ACCEL_ZOUT[7:0]
TEMP_OUT[15:8]
TEMP_OUT[7:0]
GYRO_XOUT_H
GYRO_XOUT_L
GYRO_YOUT_H
GYRO_YOUT_L
GYRO_ZOUT_H
GYRO_ZOUT_L
GYRO_XOUT[15:8]
GYRO_XOUT[7:0]
GYRO_YOUT[15:8]
GYRO_YOUT[7:0]
GYRO_ZOUT[15:8]
GYRO_ZOUT[7:0]
READ/
WRITE
50
51
52
60
61
68
69
6A
6B
6C
70
80
81
SELF_TEST_X_GYRO
SELF_TEST_Y_GYRO
SELF_TEST_Z_GYRO
FIFO_WM_TH1
FIFO_WM_TH2
SIGNAL_PATH_RESET
ACCEL_INTEL_CTRL
USER_CTRL
XG_ST_DATA[7:0]
YG_ST_DATA[7:0]
ZG_ST_DATA[7:0]
READ/
WRITE
READ/
WRITE
82
READ/
WRITE
96
-
-
FIFO_WM_TH[9:8]
READ/
WRITE
97
FIFO_WM_TH[7:0]
READ/
WRITE
ACCEL
_RST
TEMP
_RST
104
105
106
107
108
112
READ/
WRITE
ACCEL_INT
EL_EN
ACCEL_INTEL
_MODE
OUTPUT_LIMI
T
WOM_TH_MO
DE
-
READ/
WRITE
FIFO
_RST
SIG_COND
_RST
-
FIFO_EN
SLEEP
-
-
READ/
WRITE
DEVICE_RE
SET
GYRO_
STANDBY
PWR_MGMT_1
PWR_MGMT_2
I2C_IF
CYCLE
TEMP_DIS
STBY_ZA
CLKSEL[2:0]
STBY_YG
READ/
WRITE
-
STBY_XA
STBY_YA
STBY_XG
STBY_ZG
READ/
WRITE
-
I2C_IF_DIS
-
72
73
114
115
FIFO_COUNTH
FIFO_COUNTL
READ
READ
FIFO_COUNT[15:8]
FIFO_COUNT[7:0]
FIFO_DATA[7:0]
WHOAMI[7:0]
READ/
WRITE
74
75
77
116
117
119
FIFO_R_W
WHO_AM_I
XA_OFFSET_H
READ
READ/
WRITE
XA_OFFS [14:7]
READ/
WRITE
78
7A
7B
7D
7E
120
122
123
125
126
XA_OFFSET_L
YA_OFFSET_H
YA_OFFSET_L
ZA_OFFSET_H
ZA_OFFSET_L
XA_OFFS [6:0]
-
-
-
READ/
WRITE
YA_OFFS [14:7]
READ/
WRITE
YA_OFFS [6:0]
READ/
WRITE
ZA_OFFS [14:7]
READ/
WRITE
ZA_OFFS [6:0]
Table 15. ICM-20600 register map
Note: Register Names ending in _H and _L contain the high and low bytes, respectively, of an internal register value.
Document Number: DS-000184
Revision: 1.0
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ICM-20600
The reset value is 0x00 for all registers other than the registers below, also the self-test registers contain pre-programmed values
and will not be 0x00 after reset.
Register 26 (0x80) CONFIG
Register 107 (0x41) Power Management 1
Register 117 (0x11) WHO_AM_I
Document Number: DS-000184
Revision: 1.0
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ICM-20600
8 REGISTER DESCRIPTIONS
This section describes the function and contents of each register within the ICM-20600.
Note: The device will come up in sleep mode upon power-up.
8.1 REGISTER 04 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET
TEMPERATURE COMPENSATION (TC) REGISTER
Register Name: XG_OFFS_TC_H
Register Type: READ/WRITE
Register Address: 04 (Decimal); 04 (Hex)
BIT
NAME
FUNCTION
Stores the offset shift in the gyroscope output from low noise mode to low
power mode to be implemented as a ꢃoꢂꢂeꢃtioꢁ iꢁ the ꢃustoꢋeꢂ softꢉaꢂe. ꢔꢊs
complement digital code, 0.125dps/LSB from +3.875 dps to -4 dps.
Bits 9 and 8 of the 10-bit offset of X gyroscope (2ꢊs complement)
[7:2]
[1:0]
XG_OFFS_LP[5:0]
XG_OFFS_TC_H[9:8]
8.2 REGISTER 05 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET
TEMPERATURE COMPENSATION (TC) REGISTER
Register Name: XG_OFFS_TC_L
Type: READ/WRITE
Register Address: 05 (Decimal); 05 (Hex)
BIT
[7:0]
NAME
XG_OFFS_TC_L[7:0]]
FUNCTION
Bits 7 to 0 of the 10-bit offset of X gyroscope (2ꢊs complement)
Description:
The temperature compensation (TC) registers are used to reduce gyro offset variation due to temperature change.
The TC feature is always enabled. However, the compensation only happens when a TC coefficient is programed
during factory trim which gets loaded into these registers at power up or after a DEVICE_RESET. If these registers
contain a value of zero, temperature compensation has no effect on the offset of the chip. The TC registers have a
10-bit magnitude and sign adjustment in all full scale modes with a resolution of 2.52 mdps/C steps.
If these registers contain a non-zero value after power up, the user may write zeros to them to see the offset values
ꢉithout TC ꢉith teꢋpeꢂatuꢂe ꢄaꢂiatioꢁ. Note that doiꢁg so ꢋaꢏ ꢂesult iꢁ offset ꢄalues that eꢀꢃeed data sheet ꢍInitial
)‘O Toleꢂaꢁꢃeꢎ in other than normal ambient temperature (~25 °C). The TC coefficients maybe restored by the
user with a power up or a DEVICE_RESET.
The above description also applies to registers 7-8 and 10-11.
8.3 REGISTER 07 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET
TEMPERATURE COMPENSATION (TC) REGISTER
Register Name: YG_OFFS_TC_H
Register Type: READ/WRITE
Register Address: 07 (Decimal); 07 (Hex)
BIT
NAME
FUNCTION
Stores the offset shift in the gyroscope output from low noise mode to low
poꢉeꢂ ꢋode to ꢌe iꢋpleꢋeꢁted as a ꢃoꢂꢂeꢃtioꢁ iꢁ the ꢃustoꢋeꢂ softꢉaꢂe. ꢔꢊs
complement digital code, 0.125 dps/LSB from +3.875 dps to -4 dps.
Bits 9 and 8 of the 10-bit offset of Y gyroscope (2ꢊs complement)
[7:2]
[1:0]
YG_OFFS_LP[5:0]
YG_OFFS_TC_H[9:8]
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ICM-20600
8.4 REGISTER 08 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET
TEMPERATURE COMPENSATION (TC) REGISTER
Register Name: YG_OFFS_TC_L
Register Type: READ/WRITE
Register Address: 08 (Decimal); 08 (Hex)
BIT
[7:0]
NAME
YG_OFFS_TC_L[7:0]]
FUNCTION
Bits 7 to 0 of the 10-bit offset of Y gyroscope (2ꢊs complement)
8.5 REGISTER 10 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET
TEMPERATURE COMPENSATION (TC) REGISTER
Register Name: ZG_OFFS_TC_H
Register Type: READ/WRITE
Register Address: 10 (Decimal); 0A (Hex)
BIT
NAME
FUNCTION
Stores the offset shift in the gyroscope output from low noise mode to low
poꢉeꢂ ꢋode to ꢌe iꢋpleꢋeꢁted as a ꢃoꢂꢂeꢃtioꢁ iꢁ the ꢃustoꢋeꢂ softꢉaꢂe. ꢔꢊs
complement digital code, 0.125 dps/LSB from +3.875 dps to -4 dps.
Bits 9 and 8 of the 10-bit offset of Z gyroscope (2ꢊs complement)
[7:2]
[1:0]
ZG_OFFS_LP[5:0]
ZG_OFFS_TC_H[9:8]
8.6 REGISTER 11 – GYROSCOPE LOW NOISE TO LOW POWER OFFSET SHIFT AND GYROSCOPE OFFSET
TEMPERATURE COMPENSATION (TC) REGISTER
Register Name: ZG_OFFS_TC_L
Register Type: READ/WRITE
Register Address: 11 (Decimal); 0B (Hex)
BIT
[7:0]
NAME
ZG_OFFS_TC_L[7:0]]
FUNCTION
Bits 7 to 0 of the 10-bit offset of Z gyroscope (2ꢊs complement)
8.7 REGISTERS 13 TO 15 – ACCELEROMETER SELF-TEST REGISTERS
Register Name: SELF_TEST_X_ACCEL, SELF_TEST_Y_ACCEL, SELF_TEST_Z_ACCEL
Type: READ/WRITE
Register Address: 13, 14, 15 (Decimal); 0D, 0E, 0F (Hex)
REGISTER
BITS
NAME
FUNCTION
The value in this register indicates the self-test output generated
during manufacturing tests. This value is to be used to check against
subsequent self-test outputs performed by the end user.
The value in this register indicates the self-test output generated
during manufacturing tests. This value is to be used to check against
subsequent self-test outputs performed by the end user.
The value in this register indicates the self-test output generated
during manufacturing tests. This value is to be used to check against
subsequent self-test outputs performed by the end user.
SELF_TEST_X_ACCEL
[7:0]
XA_ST_DATA[7:0]
SELF_TEST_Y_ACCEL
SELF_TEST_Z_ACCEL
[7:0]
[7:0]
YA_ST_DATA[7:0]
ZA_ST_DATA[7:0]
The equation to convert self-test codes in OTP to factory self-test measurement is:
ST _OTP (2620/2FS )*1.01(ST _code1) (lsb)
where ST_OTP is the value that is stored in OTP of the device, FS is the Full Scale value, and ST_code is based on the Self-Test value
(ST_ FACꢒ deteꢂꢋiꢁed iꢁ Iꢁꢄeꢁ“eꢁseꢊs faꢃtoꢂꢏ fiꢁal test aꢁd ꢃalꢃulated ꢌased oꢁ the folloꢉiꢁg eꢓuatioꢁ:
log(ST _ FAC /(2620/2FS ))
ST _ code round(
) 1
log(1.01)
Document Number: DS-000184
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ICM-20600
8.8 REGISTER 19 – X-GYRO OFFSET ADJUSTMENT REGISTER – HIGH BYTE
Register Name: XG_OFFS_USRH
Register Type: READ/WRITE
Register Address: 19 (Decimal); 13 (Hex)
BIT
NAME
FUNCTION
Bits 15 to 8 of the 16-bit offset of X gyroscope (2ꢊs complement). This register is
used to remove DC bias from the sensor output. The value in this register is
added to the gyroscope sensor value before going into the sensor register.
[7:0]
X_OFFS_USR[15:8]
8.9 REGISTER 20 – X-GYRO OFFSET ADJUSTMENT REGISTER – LOW BYTE
Register Name: XG_OFFS_USRL
Register Type: READ/WRITE
Register Address: 20 (Decimal); 14 (Hex)
BIT
NAME
FUNCTION
Bits 7 to 0 of the 16-bit offset of X gyroscope (2ꢊs complement). This register is
used to remove DC bias from the sensor output. The value in this register is
added to the gyroscope sensor value before going into the sensor register.
[7:0]
X_OFFS_USR[7:0]
8.10 REGISTER 21 – Y-GYRO OFFSET ADJUSTMENT REGISTER – HIGH BYTE
Register Name: YG_OFFS_USRH
Register Type: READ/WRITE
Register Address: 21 (Decimal); 15 (Hex)
BIT
NAME
FUNCTION
Bits 15 to 8 of the 16-bit offset of Y gyroscope (2ꢊs complement). This register is
used to remove DC bias from the sensor output. The value in this register is
added to the gyroscope sensor value before going into the sensor register.
[7:0]
Y_OFFS_USR[15:8]
8.1 REGISTER 22 – Y-GYRO OFFSET ADJUSTMENT REGISTER – LOW BYTE
Register Name: YG_OFFS_USRL
Register Type: READ/WRITE
Register Address: 22 (Decimal); 16 (Hex)
BIT
NAME
FUNCTION
Bits 7 to 0 of the 16-bit offset of Y gyroscope (2ꢊs complement). This register is
used to remove DC bias from the sensor output. The value in this register is
added to the gyroscope sensor value before going into the sensor register.
[7:0]
Y_OFFS_USR[7:0]
8.2 REGISTER 23 – Z-GYRO OFFSET ADJUSTMENT REGISTER – HIGH BYTE
Register Name: ZG_OFFS_USRH
Register Type: READ/WRITE
Register Address: 23 (Decimal); 17 (Hex)
BIT
NAME
FUNCTION
Bits 15 to 8 of the 16-bit offset of Z gyroscope (2ꢊs complement). This register is
used to remove DC bias from the sensor output. The value in this register is
added to the gyroscope sensor value before going into the sensor register.
[7:0]
Z_OFFS_USR[15:8]
Document Number: DS-000184
Revision: 1.0
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ICM-20600
8.3 REGISTER 24 – Z-GYRO OFFSET ADJUSTMENT REGISTER – LOW BYTE
Register Name: ZG_OFFS_USRL
Register Type: READ/WRITE
Register Address: 24 (Decimal); 18 (Hex)
BIT
NAME
FUNCTION
Bits 7 to 0 of the 16-bit offset of Z gyroscope (2ꢊs complement). This register is
used to remove DC bias from the sensor output. The value in this register is
added to the gyroscope sensor value before going into the sensor register.
[7:0]
Z_OFFS_USR[7:0]
8.4 REGISTER 25 – SAMPLE RATE DIVIDER
Register Name: SMPLRT_DIV
Register Type: READ/WRITE
Register Address: 25 (Decimal); 19 (Hex)
BIT
[7:0]
NAME
SMPLRT_DIV[7:0]
FUNCTION
Divides the internal sample rate (see register CONFIG) to generate the sample rate that
controls sensor data output rate, FIFO sample rate. Note: This register is only effective when
FCHOICE_B ꢂegisteꢂ ꢌits aꢂe ꢔꢊꢌꢆꢆ, aꢁd ꢐꢆ < DLPF_CFG < ꢗꢒ.
This is the update rate of the sensor register:
SAMPLE_RATE = INTERNAL_SAMPLE_RATE / (1 + SMPLRT_DIV)
Where INTERNAL_SAMPLE_RATE = 1kHz
8.5 REGISTER 26 – CONFIGURATION
Register Name: CONFIG
Register Type: READ/WRITE
Register Address: 26 (Decimal); 1A (Hex)
BIT
[7]
[6]
NAME
FUNCTION
-
FIFO_MODE
Default configuration value is 1. User should set it to 0.
Wheꢁ set to ꢘꢑꢊ, ꢉheꢁ the FIFO is full, additioꢁal ꢉꢂites ꢉill ꢁot ꢌe ꢉꢂitteꢁ to FIFO.
Wheꢁ set to ꢘꢆꢊ, ꢉheꢁ the FIFO is full, additioꢁal ꢉꢂites ꢉill ꢌe ꢉꢂitteꢁ to the FIFO, ꢂeplaꢃiꢁg
the oldest data.
[5:3]
EXT_SYNC_SET[2:0]
Enables the FSYNC pin data to be sampled.
EXT_SYNC_SET
FSYNC bit location
function disabled
TEMP_OUT_L[0]
GYRO_XOUT_L[0]
GYRO_YOUT_L[0]
GYRO_ZOUT_L[0]
ACCEL_XOUT_L[0]
ACCEL_YOUT_L[0]
ACCEL_ZOUT_L[0]
0
1
2
3
4
5
6
7
FSYNC will be latched to capture short strobes. This will be done such that if FSYNC toggles,
the latꢃhed ꢄalue toggles, ꢌut ꢉoꢁꢊt toggle agaiꢁ uꢁtil the ꢁeꢉ latꢃhed ꢄalue is ꢃaptuꢂed ꢌꢏ
the sample rate strobe.
[2:0]
DLPF_CFG[2:0]
For the DLPF to be used, FCHOICE_B[ꢑ:ꢆ] is ꢔꢊꢌꢆꢆ.
See the table below.
The DLPF is configured by DLPF_CFG, when FCHOICE_B [ꢑ:ꢆ] = ꢔꢌꢊꢆꢆ. The gꢏꢂosꢃope aꢁd teꢋpeꢂatuꢂe seꢁsoꢂ aꢂe filteꢂed
according to the value of DLPF_CFG and FCHOICE_B as shown in the table below.
Document Number: DS-000184
Revision: 1.0
Page 34 of 57
Revision Date: 10/27/2016
ICM-20600
Temperature
Sensor
FCHOICE_B
Gyroscope
DLPF_CFG
3-dB BW
(Hz)
Noise BW
(Hz)
Rate
(kHz)
<1>
<0>
3-dB BW (Hz)
X
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
X
X
0
1
2
3
4
5
6
7
8173
3281
250
176
92
8595.1
32
4000
4000
4000
188
98
3451.0
306.6
177.0
108.6
59.0
32
8
1
1
41
42
1
20
30.5
20
1
10
15.6
10
1
5
8.0
5
1
3281
3451.0
8
4000
8.6 REGISTER 27 – GYROSCOPE CONFIGURATION
Register Name: GYRO_CONFIG
Register Type: READ/WRITE
Register Address: 27 (Decimal); 1B (Hex)
BIT
[7]
[6]
[5]
NAME
XG_ST
YG_ST
ZG_ST
FUNCTION
X Gyro self-test
Y Gyro self-test
Z Gyro self-test
Gyro Full Scale Select:
00 = ±250 dps
01= ±500 dps
10 = ±1000 dps
11 = ±2000 dps
Reserved
[4:3]
FS_SEL[1:0]
[2]
[1:0]
-
FCHOICE_B[1:0]
Used to bypass DLPF as shown in table 1 above.
8.7 REGISTER 28 – ACCELEROMETER CONFIGURATION
Register Name: ACCEL_CONFIG
Register Type: READ/WRITE
Register Address: 28 (Decimal); 1C (Hex)
BIT
[7]
[6]
[5]
NAME
XA_ST
YA_ST
ZA_ST
FUNCTION
X Accel self-test
Y Accel self-test
Z Accel self-test
Accel Full Scale Select:
±2g (00), ±4g (01), ±8g (10), ±16g (11)
Reserved
[4:3]
[2:0]
ACCEL_FS_SEL[1:0]
-
Document Number: DS-000184
Revision: 1.0
Page 35 of 57
Revision Date: 10/27/2016
ICM-20600
8.8 REGISTER 29 – ACCELEROMETER CONFIGURATION 2
Register Name: ACCEL_CONFIG2
Register Type: READ/WRITE
Register Address: 29 (Decimal); 1D (Hex)
BIT
NAME
FUNCTION
Averaging filter settings for Low Power Accelerometer mode:
0 = Average 4 samples
1 = Average 8 samples
[5:4]
DEC2_CFG[1:0]
2 = Average 16 samples
3 = Average 32 samples
[3]
[2:0]
ACCEL_FCHOICE_B
A_DLPF_CFG
Used to bypass DLPF as shown in the table below.
Accelerometer low pass filter setting as shown in table 2 below.
Accelerometer Data Rates and Bandwidths (Low-Noise Mode)
Accelerometer
ACCEL_FCHOICE_B
A_DLPF_CFG
3-dB BW
(Hz)
Noise BW
(Hz)
Rate
(kHz)
1
0
0
0
0
0
0
0
0
X
0
1
2
3
4
5
6
7
1046.0
218.1
218.1
99.0
1100.0
235.0
235.0
121.3
61.5
4
1
1
1
1
1
1
1
1
44.8
21.2
31.0
10.2
15.5
5.1
7.8
420.0
441.6
The data output rate of the DLPF filter block can be further reduced by a factor of 1/(1+SMPLRT_DIV), where SMPLRT_DIV is an 8-bit
integer. Following is a small subset of ODRs that are configurable for the accelerometer in the low-noise mode in this manner (Hz):
3.91, 7.81, 15.63, 31.25, 62.50, 125, 250, 500, 1K
The following table lists the approximate accelerometer filter bandwidths available in the low-power mode of operation for some
example ODRs.
In the low-power mode of operation, the accelerometer is duty-cycled. The following table shows some example configurations for
accelerometer low power mode.
Document Number: DS-000184
Revision: 1.0
Page 36 of 57
Revision Date: 10/27/2016
ICM-20600
Averages
ACCEL_FCHOICE_B
DEC2_CFG
1x
1
4x
0
8x
0
16x
0
32x
0
X
0
1
2
3
A_DLPF_CFG
Ton (ms)
X
7
7
7
7
1.084
1100
1046
1.84
442
420
2.84
236
219
4.84
122
111
8.84
62
56
NBW (Hz)
3-dB BW (Hz)
Noise TYP
(mg-rms)
3.3
2.1
1.5
1.1
0.8
ODR
(Hz)
Low-Power Accelerometer Mode Current Consumption
(µA)
SMPLRT_DIV
255
127
99
63
31
19
15
9
3.91
7.81
10
9.4
10.7
11.4
13.3
18.3
24.4
28.4
40.7
48.8
73.4
89.6
171.1
10.2
12.4
13.7
16.7
25.4
35.8
42.7
63.5
77.4
118.8
146.5
284.9
11.5
14.7
16.6
21.5
34.8
50.8
61.5
93.6
114.8
178.9
221.6
13.8
19.6
18.5
28.9
22.6
34.7
15.63
31.25
50
30.8
49.7
53.6
91.2
80.8
141.1
174.3
303.3
62.5
100
125
200
250
500
99.0
153.7
190.1
299.3
7
N/A
4
3
N/A
1
N/A
8.9 REGISTER 30 – GYROSCOPE LOW POWER MODE CONFIGURATION
Register Name: LP_MODE_CFG
Register Type: READ/WRITE
Register Address: 30 (Decimal); 1E (Hex)
BIT
[7]
NAME
GYRO_CYCLE
FUNCTION
Wheꢁ set to ꢘꢑꢊ loꢉ-poꢉeꢂ gꢏꢂosꢃope ꢋode is eꢁaꢌled. Default settiꢁg is ꢘꢆꢊ
Averaging filter configuration for low-power gyroscope mode. Default
settiꢁg is ꢘꢆꢆꢆꢊ
Reserved
[6:4]
[3:0]
G_AVGCFG[2:0]
-
To operate in gyroscope low-power mode or 6-axis low-poꢉeꢂ ꢋode, GY‘O_CYCLE should ꢌe set to ꢘꢑ.ꢊ Gꢏꢂosꢃope filteꢂ
configuration is determined by G_AVGCFG[2:0] that sets the averaging filter configuration. It is not dependent on DLPF_CFG[2:0].
The following table shows some example configurations for gyroscope low power mode.
Document Number: DS-000184
Revision: 1.0
Page 37 of 57
Revision Date: 10/27/2016
ICM-20600
Averages
G_AVGCFG
NBW (Hz)
1x
0
2x
1
4x
2
8x
3
16x
4
32x
5
64x
6
128x
7
650.8
407.1
224.2
117.4
60.2
30.6
15.6
8.0
3-dB BW (Hz)
Noise TYP
(dps-rms)
622
391
211
108
54
27
14
7
0.10
0.08
0.06
0.04
0.03
0.02
0.016
0.011
SMPLRT_DIV
ODR (Hz)
3.9
Low-Power Gyroscope Mode Current Consumption (mA)
255
99
65
64
33
32
19
17
16
9
0.79
0.81
0.83
0.83
0.87
0.87
0.93
0.95
0.96
1.08
1.16
1.21
1.38
1.53
1.78
0.80
0.82
0.84
0.84
0.90
0.90
0.98
1.00
1.01
1.17
1.27
1.34
1.56
1.75
2.07
0.80
0.84
0.87
0.87
0.95
0.95
1.06
1.10
1.11
1.35
1.49
1.59
1.91
2.19
N/A
0.82
0.87
0.92
0.92
1.05
1.06
1.24
1.29
1.32
1.70
1.93
2.09
N/A
N/A
N/A
0.85
0.95
1.03
1.03
1.26
1.28
1.60
1.69
1.74
2.41
N/A
N/A
N/A
N/A
N/A
0.90
1.09
1.24
1.25
1.68
1.70
2.30
2.47
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1.01
1.37
1.67
1.69
2.51
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1.23
1.94
2.53
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
10.0
15.2
15.4
29.4
30.3
50.0
55.6
58.8
100.0
125.0
142.9
200.0
250.0
333.3
7
6
4
3
2
8.10 REGISTER 32 – WAKE-ON MOTION THRESHOLD (X-AXIS ACCELEROMETER)
Register Name: ACCEL_WOM_X_THR
Register Type: READ/WRITE
Register Address: 32 (Decimal); 20 (Hex)
BIT
NAME
FUNCTION
This register holds the threshold value for the Wake on Motion Interrupt for X-axis
accelerometer.
[7:0]
WOM_X_TH[7:0]
8.11 REGISTER 33 – WAKE-ON MOTION THRESHOLD (Y-AXIS ACCELEROMETER)
Register Name: ACCEL_WOM_Y_THR
Register Type: READ/WRITE
Register Address: 33 (Decimal); 21 (Hex)
BIT
NAME
FUNCTION
This register holds the threshold value for the Wake on Motion Interrupt for Y-axis
accelerometer.
[7:0]
WOM_Y_TH[7:0]
8.12 REGISTER 34 – WAKE-ON MOTION THRESHOLD (Z-AXIS ACCELEROMETER)
Register Name: ACCEL_WOM_Z_THR
Register Type: READ/WRITE
Register Address: 34 (Decimal); 22 (Hex)
BIT
NAME
FUNCTION
This register holds the threshold value for the Wake on Motion Interrupt for Z-axis
accelerometer.
[7:0]
WOM_Z_TH[7:0]
Document Number: DS-000184
Revision: 1.0
Page 38 of 57
Revision Date: 10/27/2016
ICM-20600
8.13 REGISTER 35 – FIFO ENABLE
Register Name: FIFO_EN
Register Type: READ/WRITE
Register Address: 35 (Decimal); 23 (Hex)
NAME FUNCTION
Reserved
BIT
[7:5]
-
1 – write TEMP_OUT_H, TEMP_OUT_L, GYRO_XOUT_H, GYRO_XOUT_L, GYRO_YOUT_H,
GYRO_YOUT_L, GYRO_ZOUT_H, and GYRO_ZOUT_L to the FIFO at the sample rate; If enabled,
buffering of data occurs even if data path is in standby.
0 – function is disabled
[4]
GYRO_FIFO_EN
1 – write ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H, ACCEL_YOUT_L, ACCEL_ZOUT_H,
ACCEL_ZOUT_L, TEMP_OUT_H, and TEMP_OUT_L to the FIFO at the sample rate;
0 – function is disabled
[3]
ACCEL_FIFO_EN
-
[2:0]
Reserved
Note: If both GYRO_FIFO_EN And ACCEL_FIFO_EN are 1, write ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H, ACCEL_YOUT_L, ACCEL_ZOUT_H, ACCEL_ZOUT_L,
TEMP_OUT_H, TEMP_OUT_L, GYRO_XOUT_H, GYRO_XOUT_L, GYRO_YOUT_H, GYRO_YOUT_L, GYRO_ZOUT_H, and GYRO_ZOUT_L to the FIFO at the sample rate.
8.14 REGISTER 54 – FSYNC INTERRUPT STATUS
Register Name: FSYNC_INT
Register Type: READ to CLEAR
Register Address: 54 (Decimal); 36 (Hex)
BIT
[7]
NAME
FUNCTION
This bit automatically sets to 1 when a FSYNC interrupt has been generated. The bit
clears to 0 after the register has been read.
FSYNC_INT
8.15 REGISTER 55 – INT/DRDY PIN / BYPASS ENABLE CONFIGURATION
Register Name: INT_PIN_CFG
Register Type: READ/WRITE
Register Address: 55 (Decimal); 37 (Hex)
BIT
[7]
NAME
FUNCTION
1 – The logic level for INT/DRDY pin is active low.
0 – The logic level for INT/DRDY pin is active high.
1 – INT/DRDY pin is configured as open drain.
INT_LEVEL
[6]
[5]
[4]
[3]
INT_OPEN
0 – INT/DRDY pin is configured as push-pull.
1 – INT/DRDY pin level held until interrupt status is cleared.
0 – INT/D‘DY piꢁ iꢁdiꢃates iꢁteꢂꢂupt pulseꢊs ꢉidth is ꢈꢆus.
1 – Interrupt status is cleared if any read operation is performed.
0 – Interrupt status is cleared only by reading INT_STATUS register
1 – The logic level for the FSYNC pin as an interrupt is active low.
0 – The logic level for the FSYNC pin as an interrupt is active high.
When this bit is equal to 1, the FSYNC pin will trigger an interrupt when it transitions
to the level specified by FSYNC_INT_LEVEL. When this bit is equal to 0, the FSYNC
pin is disabled from causing an interrupt.
LATCH_INT_EN
INT_RD_CLEAR
FSYNC_INT_LEVEL
[2]
FSYNC_INT_MODE_EN
[1]
[0]
-
INT2_EN
Reserved.
Enable INT2 interrupt pin.
Document Number: DS-000184
Revision: 1.0
Page 39 of 57
Revision Date: 10/27/2016
ICM-20600
8.16 REGISTER 57 – FIFO WATERMARK INTERRUPT STATUS
Register Name: FIFO_WM_INT_STATUS
Register Type: READ to CLEAR
Register Address: 57 (Decimal); 39 (Hex)
BIT
[6]
NAME
FIFO_WM_INT
FUNCTION
FIFO Watermark interrupt status. Cleared on Read.
8.17 REGISTER 58 – INTERRUPT STATUS
Register Name: INT_STATUS
Register Type: READ to CLEAR
Register Address: 58 (Decimal); 3A (Hex)
BIT
[7]
NAME
WOM_X_INT
FUNCTION
X-axis accelerometer WoM interrupt status. Cleared on Read.
[6]
[5]
WOM_Y_INT
WOM_Z_INT
Y-axis accelerometer WoM interrupt status. Cleared on Read.
Z-axis accelerometer WoM interrupt status. Cleared on Read.
This bit automatically sets to 1 when a FIFO buffer overflow has been generated. The bit
clears to 0 after the register has been read.
Reserved.
[4]
FIFO_OFLOW_INT
[3]
[2]
[1]
-
GDRIVE_INT
-
Gyroscope Drive System Ready interrupt
Reserved
This bit automatically sets to 1 when a Data Ready interrupt is generated. The bit clears
to 0 after the register has been read.
[0]
DATA_RDY_INT
8.18 REGISTERS 59 TO 64 – ACCELEROMETER MEASUREMENTS: X-AXIS HIGH BYTE
Register Name: ACCEL_XOUT_H
Register Type: READ only
Register Address: 59 (Decimal); 3B (Hex)
BIT
[7:0]
NAME
ACCEL_XOUT[15:8]
FUNCTION
High byte of accelerometer x-axis data.
Register Name: ACCEL_XOUT_L
Register Type: READ only
Register Address: 60 (Decimal); 3C (Hex)
BIT
[7:0]
NAME
ACCEL_XOUT[7:0]
FUNCTION
Low byte of accelerometer x-axis data.
Document Number: DS-000184
Revision: 1.0
Page 40 of 57
Revision Date: 10/27/2016
ICM-20600
Register Name: ACCEL_YOUT_H
Register Type: READ only
Register Address: 61 (Decimal); 3D (Hex)
BIT
[7:0]
NAME
ACCEL_YOUT[15:8]
FUNCTION
High byte of accelerometer y-axis data.
Register Name: ACCEL_YOUT_L
Register Type: READ only
Register Address: 62 (Decimal); 3E (Hex)
BIT
[7:0]
NAME
ACCEL_YOUT[7:0]
FUNCTION
Low byte of accelerometer y-axis data.
Register Name: ACCEL_ZOUT_H
Register Type: READ only
Register Address: 63 (Decimal); 3F (Hex)
BIT
[7:0]
NAME
ACCEL_ZOUT[15:8]
FUNCTION
High byte of accelerometer z-axis data.
Register Name: ACCEL_ZOUT_L
Register Type: READ only
Register Address: 64 (Decimal); 40 (Hex)
BIT
[7:0]
NAME
ACCEL_ZOUT[7:0]
FUNCTION
Low byte of accelerometer z-axis data.
8.19 REGISTERS 65 AND 66 – TEMPERATURE MEASUREMENT
Register Name: TEMP_OUT_H
Register Type: READ only
Register Address: 65 (Decimal); 41 (Hex)
BIT
[7:0]
NAME
TEMP_OUT[15:8]
FUNCTION
Low byte of the temperature sensor output
Register Name: TEMP_OUT_L
Register Type: READ only
Register Address: 66 (Decimal); 42 (Hex)
BIT
NAME
FUNCTION
High byte of the temperature sensor output
TEMP_degC
= (TEMP_OUT[15:0]/Temp_Sensitivity) +
RoomTemp_Offset
[7:0]
TEMP_OUT[7:0]
where Temp_Sensitivity = 326.8 LSB/ºC and
RoomTemp_Offset = 25ºC
8.20 REGISTERS 67 TO 72 – GYROSCOPE MEASUREMENTS
Register Name: GYRO_XOUT_H
Register Type: READ only
Register Address: 67 (Decimal); 43 (Hex)
BIT
[7:0]
NAME
GYRO_XOUT[15:8]
FUNCTION
High byte of the X-Axis gyroscope output
Document Number: DS-000184
Revision: 1.0
Page 41 of 57
Revision Date: 10/27/2016
ICM-20600
Register Name: GYRO_XOUT_L
Register Type: READ only
Register Address: 68 (Decimal); 44 (Hex)
BIT
NAME
FUNCTION
Low byte of the X-Axis gyroscope output
GYRO_XOUT = Gyro_Sensitivity * X_angular_rate
FS_SEL = 0
[7:0]
GYRO_XOUT[7:0]
Nominal
Conditions
Gyro_Sensitivity = 131 LSB/(dps)
Register Name: GYRO_YOUT_H
Register Type: READ only
Register Address: 69 (Decimal); 45 (Hex)
BIT
[7:0]
NAME
GYRO_YOUT[15:8]
FUNCTION
High byte of the Y-Axis gyroscope output
Register Name: GYRO_YOUT_L
Register Type: READ only
Register Address: 70 (Decimal); 46 (Hex)
BIT
NAME
FUNCTION
Low byte of the Y-Axis gyroscope output
GYRO_YOUT = Gyro_Sensitivity * Y_angular_rate
[7:0]
GYRO_YOUT[7:0]
Nominal
FS_SEL = 0
Conditions
Gyro_Sensitivity = 131 LSB/(dps)
Register Name: GYRO_ZOUT_H
Register Type: READ only
Register Address: 71 (Decimal); 47 (Hex)
BIT
[7:0]
NAME
GYRO_ZOUT[15:8]
FUNCTION
High byte of the Z-Axis gyroscope output
Register Name: GYRO_ZOUT_L
Register Type: READ only
Register Address: 72 (Decimal); 48 (Hex)
BIT
NAME
FUNCTION
Low byte of the Z-Axis gyroscope output
GYRO_ZOUT = Gyro_Sensitivity * Z_angular_rate
[7:0]
GYRO_ZOUT[7:0]
Nominal
FS_SEL = 0
Conditions
Gyro_Sensitivity = 131 LSB/(dps)
8.21 REGISTERS 80 TO 82 – GYROSCOPE SELF-TEST REGISTERS
Register Name: SELF_TEST_X_GYRO, SELF_TEST_Y_GYRO, SELF_TEST_Z_GYRO
Type: READ/WRITE
Register Address: 80, 81, 82 (Decimal); 50, 51, 52 (Hex)
REGISTER
BIT
NAME
FUNCTION
The value in this register indicates the self-test output generated during
manufacturing tests. This value is to be used to check against
subsequent self-test outputs performed by the end user.
SELF_TEST_X_GYRO
[7:0]
XG_ST_DATA[7:0]
The value in this register indicates the self-test output generated during
manufacturing tests. This value is to be used to check against
subsequent self-test outputs performed by the end user.
SELF_TEST_Y_GYRO
SELF_TEST_Z_GYRO
[7:0]
[7:0]
YG_ST_DATA[7:0]
ZG_ST_DATA[7:0]
The value in this register indicates the self-test output generated during
manufacturing tests. This value is to be used to check against
subsequent self-test outputs performed by the end user.
The equation to convert self-test codes in OTP to factory self-test measurement is:
ST _OTP (2620/2FS )*1.01(ST _code1) (lsb)
Document Number: DS-000184
Revision: 1.0
Page 42 of 57
Revision Date: 10/27/2016
ICM-20600
where ST_OTP is the value that is stored in OTP of the device, FS is the Full Scale value, and ST_code is based on the Self-Test value
ꢐ“T_ FACꢒ deteꢂꢋiꢁed iꢁ Iꢁꢄeꢁ“eꢁseꢊs faꢃtoꢂꢏ fiꢁal test aꢁd ꢃalꢃulated ꢌased oꢁ the folloꢉiꢁg eꢓuatioꢁ:
log(ST _ FAC /(2620/2FS ))
ST _ code round(
) 1
log(1.01)
8.22 REGISTER 96-97 – FIFO WATERMARK THRESHOLD IN NUMBER OF BYTES
Register Name: FIFO_WM_TH1
Register Type: READ/WRITE
Register Address: 96 (Decimal); 60 (Hex)
BIT
NAME
FUNCTION
FIFO watermark threshold in number of bytes. Watermark interrupt is
disaꢌled if the thꢂeshold is set to ꢍꢆꢎ. Default ꢄalue is ꢆꢆꢆꢆꢆꢆꢆꢆ.
[1:0]
FIFO_WM_TH[9:8]
Register Name: FIFO_WM_TH2
Register Type: READ/WRITE
Register Address: 97 (Decimal); 61 (Hex)
BIT
NAME
FUNCTION
FIFO watermark threshold in number of bytes. Watermark interrupt is
disaꢌled if the thꢂeshold is set to ꢍꢆꢎ. Default value is 00000000.
[7:0]
FIFO_WM_TH[7:0]
The register FIFO_WM_TH[9:0] sets the FIFO watermark threshold level (0 - 1023). User should ensure that bit 7 of register 0x1A is
set to 0 before using this feature. When the FIFO count is at or above the watermark level (FIFO_COUNT[15:0] ≥ FIFO_WM_TH[9:0])
and the system is not in the middle of a FIFO read, an interrupt is triggered. The interrupt will set the FIFO watermark interrupt
status register field FIFO_WM_INT = 1, and the INT pin will issue a pulse if configured in pulse mode, or set to the active level if
configured in latch mode. Register bit FIFO_WM_INT is not read-to-clear, unlike the other interrupts. Rather, whenever FIFO_R_W
register is read, FIFO_WM_INT status bit is cleared automatically. At the same time, the INT pin will be cleared as well if it is
configured in latch mode.
The FIFO watermark interrupt and the INT pin are cleared upon the first read (and only the first read) of the FIFO. If, at the end of
the FIFO read, the FIFO count is at or above the watermark level, the interrupt status bit and INT pin will again be set. If the INT pin is
configured for latched operation, it will wait until the host completes the read to set to the active level.
When FIFO_WM_TH = 0, the FIFO watermark interrupt is disabled.
8.23 REGISTER 104 – SIGNAL PATH RESET
Register Name: SIGNAL_PATH_RESET
Register Type: READ/WRITE
Register Address: 104 (Decimal); 68 (Hex)
BIT
[7:2]
NAME
-
FUNCTION
Reserved
Reset accel digital signal path. Note: Sensor registers are not cleared. Use SIG_COND_RST to clear
sensor registers.
[1]
[0]
ACCEL_RST
TEMP_RST
Reset temp digital signal path. Note: Sensor registers are not cleared. Use SIG_COND_RST to clear
sensor registers.
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8.24 REGISTER 105 – ACCELEROMETER INTELLIGENCE CONTROL
Register Name: ACCEL_INTEL_CTRL
Register Type: READ/WRITE
Register Address: 105 (Decimal); 69 (Hex)
BIT
[7]
NAME
FUNCTION
ACCEL_INTEL_EN
This bit enables the Wake-on-Motion detection logic
0 – Do not use
[6]
ACCEL_INTEL_MODE
1 – Compare the current sample with the previous sample
Reserved
[5:2]
[1]
-
To avoid limiting sensor output to less than 0x7FFF, set this bit to 1. This should be done
every time the ICM-20600 is powered up.
OUTPUT_LIMIT
0 – Set WoM interrupt on the OR of all enabled accelerometer thresholds
1 – Set WoM interrupt on the AND of all enabled accelerometer threshold
Default setting is 0
[0]
WOM_TH_MODE
8.25 REGISTER 106 – USER CONTROL
Register Name: USER_CTRL
Register Type: READ/WRITE
Register Address: 106 (Decimal); 6A (Hex)
BIT
[7]
NAME
-
FUNCTION
Reserved
1 – Enable FIFO operation mode.
0 – Disable FIFO access from serial interface.
Reserved
[6]
FIFO_EN
[5]
[4]
[3]
-
-
-
Reserved
Reserved
1 – Reset FIFO module. Reset is asynchronous. This bit auto clears after one clock cycle of
the internal 20 MHz clock.
Reserved
[2]
[1]
[0]
FIFO_RST
-
1 – Reset all gyro digital signal path, accel digital signal path, and temp digital signal path.
This bit also clears all the sensor registers.
SIG_COND_RST
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8.26 REGISTER 107 – POWER MANAGEMENT 1
Register Name: PWR_MGMT_1
Register Type: READ/WRITE
Register Address: 107 (Decimal); 6B (Hex)
BIT
[7]
[6]
NAME
FUNCTION
1 – Reset the internal registers and restores the default settings. The bit automatically clears
to 0 once the reset is done.
When set to 1, the chip is set to sleep mode.
DEVICE_RESET
SLEEP
When set to 1, and SLEEP and STANDBY are not set to 1, the chip will cycle between sleep
and taking a single accelerometer sample at a rate determined by SMPLRT_DIV
Note: When all accelerometer axes are disabled via PWR_MGMT_2 register bits and cycle is enabled,
the chip will wake up at the rate determined by the respective registers above, but will not take any
samples.
[5]
CYCLE
When set, the gyro drive and pll circuitry are enabled, but the sense paths are disabled. This
is a low power mode that allows quick enabling of the gyros.
When set to 1, this bit disables the temperature sensor.
Code Clock Source
[4]
[3]
GYRO_STANDBY
TEMP_DIS
0
1
2
3
4
5
6
7
Internal 20 MHz oscillator
Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
Internal 20 MHz oscillator
[2:0]
CLKSEL[2:0]
Stops the clock and keeps timing generator in reset
Note: The default value of CLKSEL[2:0] is 001. It is required that CLKSEL[2:0] be set to 001 to achieve full gyroscope performance.
8.27 REGISTER 108 – POWER MANAGEMENT 2
Register Name: PWR_MGMT_2
Register Type: READ/WRITE
Register Address: 108 (Decimal); 6C (Hex)
BIT
[7]
[6]
NAME
FUNCTION
Reserved
Reserved
-
-
1 – X accelerometer is disabled
0 – X accelerometer is on
1 – Y accelerometer is disabled
0 – Y accelerometer is on
1 – Z accelerometer is disabled
0 – Z accelerometer is on
1 – X gyro is disabled
0 – X gyro is on
1 – Y gyro is disabled
0 – Y gyro is on
1 – Z gyro is disabled
0 – Z gyro is on
[5]
[4]
[3]
[2]
[1]
[0]
STBY_XA
STBY_YA
STBY_ZA
STBY_XG
STBY_YG
STBY_ZG
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8.28 REGISTER 112 – I2C INTERFACE
Register Name: I2C_IF
Register Type: READ/WRITE
Register Address: 112 (Decimal); 70 (Hex)
BIT
[7]
NAME
-
FUNCTION
Reserved
[6]
[5:0]
I2C_IF_DIS
-
1 – Disable I2C Slave module and put the serial interface in SPI mode only.
Reserved
8.29 REGISTER 114 AND 115 – FIFO COUNT REGISTERS
Register Name: FIFO_COUNTH
Register Type: READ Only
Register Address: 114 (Decimal); 72 (Hex)
BIT
NAME
FUNCTION
High Bits, count indicates the number of written bytes in the FIFO.
Reading this byte latches the data for both FIFO_COUNTH, and FIFO_COUNTL.
[7:0]
FIFO_COUNT[15:8]
Register Name: FIFO_COUNTL
Register Type: READ Only
Register Address: 115 (Decimal); 73 (Hex)
BIT
NAME
FUNCTION
Low Bits, count indicates the number of written bytes in the FIFO.
[7:0]
FIFO_COUNT[7:0]
Note: Must read FIFO_COUNTL to latch new data for both FIFO_COUNTH and FIFO_COUNTL.
8.30 REGISTER 116 – FIFO READ WRITE
Register Name: FIFO_R_W
Register Type: READ/WRITE
Register Address: 116 (Decimal); 74 (Hex)
BIT
[7:0]
NAME
FIFO_DATA[7:0]
FUNCTION
Read/Write command provides Read or Write operation for the FIFO.
Description:
This register is used to read and write data from the FIFO buffer.
Data is written to the FIFO in order of register number (from lowest to highest). If all the FIFO enable flags (see below) are
enabled, the contents of registers 59 through 72 will be written in order at the Sample Rate.
The contents of the sensor data registers (Registers 59 to 72) are written into the FIFO buffer when their corresponding
FIFO enable flags are set to 1 in FIFO_EN (Register 35).
If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is automatically set to 1. This bit is located in INT_STATUS
(Register 58). When the FIFO buffer has overflowed, the oldest data will be lost and new data will be written to the FIFO
unless register 26 CONFIG, bit[6] FIFO_MODE = 1.
If the FIFO buffer is empty, reading register FIFO_DATA will return a unique value of 0xFF until new data is available.
Normal data is precluded from ever indicating 0xFF, so 0xFF gives a trustworthy indication of FIFO empty.
8.31 REGISTER 117 – WHO AM I
Register Name: WHO_AM_I
Register Type: READ only
Register Address: 117 (Decimal); 75 (Hex)
BIT
[7:0]
NAME
WHOAMI
FUNCTION
Register to indicate to user which device is being accessed.
Document Number: DS-000184
Revision: 1.0
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This register is used to verify the identity of the device. The contents of WHOAMI is an 8-bit device ID. The default value of
the register is 0x11. This is different from the I2C address of the device as seen on the slave I2C controller by the applications
processor. The I2C address of the ICM-20600 is 0x68 or 0x69 depending upon the value driven on AD0 pin.
8.32 REGISTERS 119, 120, 122, 123, 125, 126 – ACCELEROMETER OFFSET REGISTERS
Register Name: XA_OFFSET_H
Register Type: READ/WRITE
Register Address: 119 (Decimal); 77 (Hex)
BIT
NAME
FUNCTION
Upper bits of the X accelerometer offset cancellation. ±16g Offset cancellation in all Full
Scale modes, 15 bit 0.98-mg steps
[7:0]
XA_OFFS[14:7]
Register Name: XA_OFFSET_L
Register Type: READ/WRITE
Register Address: 120 (Decimal); 78 (Hex)
BIT
NAME
FUNCTION
Lower bits of the X accelerometer offset cancellation. ±16g Offset cancellation in all Full
Scale modes, 15 bit 0.98-mg steps
Reserved.
[7:1]
[0]
XA_OFFS[6:0]
-
Register Name: YA_OFFSET_H
Register Type: READ/WRITE
Register Address: 122 (Decimal); 7A (Hex)
BIT
NAME
FUNCTION
Upper bits of the Y accelerometer offset cancellation. ±16g Offset cancellation in all Full
Scale modes, 15 bit 0.98-mg steps
[7:0]
YA_OFFS[14:7]
Register Name: YA_OFFSET_L
Register Type: READ/WRITE
Register Address: 123 (Decimal); 7B (Hex)
BIT
NAME
FUNCTION
Lower bits of the Y accelerometer offset cancellation. ±16g Offset cancellation in all Full
Scale modes, 15 bit 0.98-mg steps
Reserved.
[7:1]
[0]
YA_OFFS[6:0]
-
Register Name: ZA_OFFSET_H
Register Type: READ/WRITE
Register Address: 125 (Decimal); 7D (Hex)
BIT
NAME
FUNCTION
Upper bits of the Z accelerometer offset cancellation. ±16g Offset cancellation in all Full
Scale modes, 15 bit 0.98-mg steps
[7:0]
ZA_OFFS[14:7]
Register Name: ZA_OFFSET_L
Register Type: READ/WRITE
Register Address: 126 (Decimal); 7E (Hex)
BIT
NAME
FUNCTION
Lower bits of the Z accelerometer offset cancellation. ±16g Offset cancellation in all Full
Scale modes, 15 bit 0.98-mg steps
Reserved.
[7:1]
[0]
ZA_OFFS[6:0]
-
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Revision: 1.0
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9 USE NOTES
9.1 TEMPERATURE SENSOR DATA
Temperature sensor data goes into the FIFO whenever the FIFO is enabled and there is a sensor active unless the temperature is
explicitly disabled.
9.2 ACCELEROMETER-ONLY LOW-NOISE MODE
The first output sample in Accelerometer-Only Low-Noise Mode after wake up from sleep always has 1ms delay, independent of
ODR.
9.3 ACCELEROMETER LOW-POWER MODE
Changing the value of SMPLRT_DIV register in Accelerometer Low-Power mode will take effect after up to one sample at the old
ODR.
9.4 SENSOR MODE CHANGE
When switching from low-power modes to low-noise modes, unsettled output samples may be observed at the gyroscope or
accelerometer outputs due to filter switching and settling. The number of unsettled output samples depends on the filter and ODR
settings. The number of unsettled output samples is minimized by selecting the widest low-noise-mode filter bandwidth consistent
with the chosen ODR.
9.5 TEMP SENSOR DURING GYROSCOPE STANDBY MODE
During transition from Gyro Low power mode (GYRO_CYCLE=1), to Gyro Standby mode, in addition to the Gyro axis (axes) being
turned off, the Temp Sensor will also be turned off if the Accel is disabled. In order to keep the temp sensor on during Gyroscope
standby mode when Accel is disabled, the following procedure should be followed:
Set GYRO_CYCLE = 0 at least one ODR cycle prior to entering Standby mode
At least one of the Gyro axis is ON prior to entering Standby mode
Set GYRO_STANDBY = 1
9.6 GYROSCOPE MODE CHANGE
Gyroscope will take one ODR clock period to switch from Low-Noise to Low-Power mode after GYRO_CYCLE bit is set.
If GYRO_CYCLE is set to 1 prior to turning on the gyroscope, the first sample will be from low-noise mode, which may not be a
settled value. It is therefore recommended to ignore the first reading in this case.
9.7 POWER MANAGEMENT 1 REGISTER SETTING
It is required to set CLKSEL[2:0] to 001 (auto-select) for full performance.
9.8 UNLISTED REGISTER LOCATIONS
Do not read unlisted register locations in Sleep mode as this may cause the device to hang up, requiring power cycle to restore
operation.
9.9 CLOCK TRANSITION WHEN GYROSCOPE IS TURNED OFF
When the gyroscope is on, the on-chip master clock source will be the gyroscope clock (assuming CLKSEL[2:0] = 001 for auto-select
mode); otherwise, the master clock source will be the internal oscillator as long as the part is not in Sleep mode. During a power
mode transition, whenever the gyroscope is disabled and the part enters a mode other than Sleep, the on-chip master clock source
will transition from the gyroscope clock to the internal oscillator. It will take about 20 ms for this transition to complete.
9.10 SLEEP MODE
The paꢂt ꢉill oꢁlꢏ eꢁteꢂ “leep ꢋode ꢉheꢁ the “LEEP ꢌit iꢁ PW‘_MGMT_ꢔ is set to ꢘꢑꢊ. If “LEEP ꢌit is ꢘꢆꢊ aꢁd ꢌit “TBY_[X,Y,)]A and
“TBY_[X,Y,)]G aꢂe all set to ꢘꢑꢊ, aꢃꢃeleꢂometer and gyroscope will be turned off, but the on-chip master clock will still be running and
consuming power.
Document Number: DS-000184
Revision: 1.0
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9.11 NO SPECIAL OPERATION NEEDED FOR FIFO READ IN LOW POWER MODE
The use of FIFO is enabled in all modes including low power mode.
9.12 GYROSCOPE STANDBY PROCEDURE
The follow precaution and procedure must be followed while using the Gyroscope Standby mode:
Precaution to follow while entering Standby Mode:
The user will ensure that at least one gyro axis is ON when setting gyro_standby = 1.
Procedure to transition from Gyro Standby to Gyro off:
The user should set gyro_standby = 0 first
Next, turn off gyro x/y/z.
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Revision: 1.0
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10 REFERENCE
Please ꢂefeꢂ to ꢍIꢁꢄeꢁ“eꢁse MEM“ Haꢁdliꢁg Appliꢃatioꢁ Note ꢐAN-IVS-0002A-ꢆꢆꢒꢎ foꢂ the folloꢉiꢁg iꢁfoꢂꢋatioꢁ:
Manufacturing Recommendations
o
o
o
o
Assembly Guidelines and Recommendations
PCB Design Guidelines and Recommendations
MEMS Handling Instructions
ESD Considerations
o
Reflow Specification
o
Storage Specifications
o
o
o
Package Marking Specification
Tape & Reel Specification
Reel & Pizza Box Label
o
o
Packaging
Representative Shipping Carton Label
Compliance
o
o
o
Environmental Compliance
DRC Compliance
Compliance Declaration Disclaimer
Document Number: DS-000184
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11 ORIENTATION OF AXES
This section provides general guidelines for assembling InvenSense Micro Electro-Mechanical Systems (MEMS) gyros packaged in
LGA package.
11.1 ICM-20600 SUPPORTED INTERFACES
The diagram below shows the orientation of the axes of sensitivity and the polarity of rotation. Note the pin 1 identifier (•) in the
figure.
+Z
+Y
+Z
I
+Y
C
M-
2
0
6
0
0
+X
+X
Figure 13. Orientation of Axes of Sensitivity and Polarity of Rotation
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12 PACKAGE DIMENSIONS
14 Lead LGA (2.5x3x0.91) mm NiAu pad finish
Figure 14. Package Dimensions
Document Number: DS-000184
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ICM-20600
DIMENSIONS IN MILLIMETERS
SYMBOLS
MIN
NOM
0.91
MAX
0.97
REF
Total Thickness
Substrate Thickness
Mold Thickness
A
0.85
A1
A2
0.105
0.8
REF
D
E
2.5
BSC
Body Size
3
BSC
0.3
Lead Width
Lead Length
W
0.2
0.25
L
0.425
0.475
0.5
0.525
BSC
Lead Pitch
Lead Count
e
n
14
1.5
1
D1
E1
SD
BSC
BSC
BSC
Edge Ball Center to Center
Body Center to Contact Ball
0.25
SE
b
---
---
---
---
---
---
---
BSC
---
Ball Width
Ball Diameter
Ball Opening
Ball Pitch
---
---
e1
n1
Ball Count
Pre-Solder
---
Package Edge Tolerance
aaa
bbb
ddd
eee
fff
0.1
0.2
0.08
---
Mold Flatness
Coplanarity
Ball Offset (Package)
Ball Offset (Ball)
---
Table 16. Package Dimensions Table
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13 PART NUMBER PACKAGE MARKING
The part number package marking for ICM-20600 devices is summarized below:
PART NUMBER
ICM-20600
PART NUMBER PACKAGE MARKING
I2600
TOP VIEW
I2600
XXXXXX
YYWW
Part Number
Lot Traceability Code
YY = Year Code
WW = Work Week
Figure 15. Part Number Package Marking
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14 ENVIRONMENTAL COMPLIANCE
The ICM-20600 is RoHS and Green compliant.
The ICM-20600 is in full environmental compliance as evidenced in report HS-ICM-20600A, Materials Declaration Data Sheet.
Environmental Declaration Disclaimer:
InvenSense believes this environmental information to be correct but cannot guarantee accuracy or completeness. Conformity documents for the above component
constitutes are on file. InvenSense subcontracts manufacturing and the information contained herein is based on data received from vendors and suppliers, which has
not been validated by InvenSense.
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15 REVISION HISTORY
REVISION DATE REVISION
DESCRIPTION
10/27/2016
1.0
Initial Release
Document Number: DS-000184
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ICM-20600
This information furnished by InvenSense is believed to be accurate and reliable. However, no responsibility is assumed by
InvenSense for its use, or for any infringements of patents or other rights of third parties that may result from its use. Specifications
are subject to change without notice. InvenSense reserves the right to make changes to this product, including its circuits and
software, in order to improve its design and/or performance, without prior notice. InvenSense makes no warranties, neither
expressed nor implied, regarding the information and specifications contained in this document. InvenSense assumes no
responsibility for any claims or damages arising from information contained in this document, or from the use of products and
services detailed therein. This includes, but is not limited to, claims or damages based on the infringement of patents, copyrights,
mask work and/or other intellectual property rights.
Certain intellectual property owned by InvenSense and described in this document is patent protected. No license is granted by
implication or otherwise under any patent or patent rights of InvenSense. This publication supersedes and replaces all information
previously supplied. Trademarks that are registered trademarks are the property of their respective companies. InvenSense sensors
should not be used or sold in the development, storage, production or utilization of any conventional or mass-destructive weapons
or for any other weapons or life threatening applications, as well as in any other life critical applications such as medical equipment,
transportation, aerospace and nuclear instruments, undersea equipment, power plant equipment, disaster prevention and crime
prevention equipment.
©2016 InvenSense, Inc. All rights reserved. InvenSense, Sensing Everything, MotionTracking, MotionProcessing, MotionProcessor,
MotionFusion, MotionApps, Digital Motion Processor, and the InvenSense logo are trademarks of InvenSense, Inc. Other company
and product names may be trademarks of the respective companies with which they are associated.
©2016 InvenSense, Inc. All rights reserved.
Document Number: DS-000184
Revision: 1.0
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