VND830AEPTR-E [STMICROELECTRONICS]
10A BUF OR INV BASED PRPHL DRVR, PDSO24, ROHS COMPLIANT, SSOP-24;
| 型号： | VND830AEPTR-E |
| 厂家： | 
ST |
| 描述： | 10A BUF OR INV BASED PRPHL DRVR, PDSO24, ROHS COMPLIANT, SSOP-24 光电二极管 |
| 文件： | 总26页 (文件大小：280K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VND830AEP-E
Double channel high side driver
Features
Type
RDS(on)
IOUT
VCC
VND830AEP-E
1. Per each channel.
60mΩ(1)
6A(1)
36V
PowerSSO-24
■
■
■
■
■
■
■
■
■
DC short circuit current: 6A
CMOS compatible inputs
Proportional load current sense
Description
The VND830AEP-E is a monolithic device made
using| STMicroelectronics VIPower™ M0-3
Technology. The VND830AEP-E is intended for
driving any type of multiple load with one side
connected to ground.
Undervoltage and overvoltage shutdown
Overvoltage clamp
Thermal shutdown
Current limitation
The Active VCC pin voltage clamp protects the
device against low energy spikes (see ISO7637
transient compatibility table).
Very low standby power dissipation
Protection against loss of ground and loss of
VCC
Reverse battery protection(a)
This device has two channels in high side
configuration; each channel has an analog sense
output on which the sensing current is
proportional (according to a known ratio) to the
corresponding load current. Built-in thermal
shutdown and outputs current limitation protect
the chip from over temperature and short circuit.
The device automatically turns off in the case
where the ground pin becomes disconnected.
■
■
In compliance with the 2002/95/EC european
directive
a. See Application schematic on page 16
Table 1.
Device summary
Package
Order codes
Tape and reel
Tube
PowerSSO-24
VND830AEP-E
VND830AEPTR-E
September 2013
Doc ID 11038 Rev 4
1/26
www.st.com
1
Contents
VND830AEP-E
Contents
1
2
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1
2.2
2.3
2.4
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
3.1.1
3.1.2
Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 17
3.2
3.3
3.4
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Maximum demagnetization energy (V = 13.5V) . . . . . . . . . . . . . . . . . . 18
CC
4
5
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1
PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1
5.2
5.3
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26
Doc ID 11038 Rev 4
VND830AEP-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
V
CC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical transient requirements (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Electrical transient requirements (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Electrical transient requirements (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Doc ID 11038 Rev 4
3/26
List of figures
VND830AEP-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
IOUT/ISENSE versus IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 14. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 18. Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 20. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 21. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 22. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 19
Figure 23. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 20
Figure 24. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 20
Figure 25. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 27. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4/26
Doc ID 11038 Rev 4
VND830AEP-E
Block diagram and pin description
1
Block diagram and pin description
Figure 1.
Block diagram
V
CC
OVERVOLTAGE
UNDERVOLTAGE
V
CLAMP
CC
PwCLAMP 1
DRIVER 1
OUTPUT 1
I
INPUT 1
LIM1
V
dslim1
Ot1
LOGIC
Ot1
I
OUT1
CURRENT
SENSE 1
K
INPUT 2
GND
PwCLAMP 2
DRIVER 2
OUTPUT 2
I
LIM2
OVERTEMP. 1
V
dslim2
Ot2
I
Ot2
OUT2
CURRENT
SENSE 2
OVERTEMP. 2
K
Figure 2.
Configuration diagram (top view)
V
GND
NC
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
CC
INPUT2
NC
INPUT1
NC
C.SENSE1
NC
C.SENSE2
NC
V
CC
TAB = V
CC
Table 2.
Suggested connections for unused and not connected pins
Connection / pin
Current sense
N.C.
Output
Input
Floating
X
X
X
Through 1KΩ
Through 10KΩ
To ground
X
resistor
resistor
Doc ID 11038 Rev 4
5/26
Electrical specifications
VND830AEP-E
2
Electrical specifications
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 3.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VCC
DC supply voltage
41
- 0.3
V
V
- VCC Reverse DC supply voltage
- IGND DC reverse ground pin current
- 200
mA
A
IOUT
IR
DC output current
Internally limited
- 6
Reverse DC output current
DC input current
A
IIN
+/- 10
mA
- 3
15
V
V
VCSENSE Current sense maximum voltage
Electrostatic discharge (human body model:R=1.5KΩ; C=100pF)
– Input
4000
2000
5000
5000
V
V
V
V
VESD
– Current sense
– Output
– VCC
Maximum switching energy
EMAX
153
8.3
mJ
W
(L = 2.2mH; RL = 0Ω; Vbat = 13.5V; Tjstart = 150°C; IL = 10A)
Ptot
Tj
Power dissipation (per island) at Tlead = 25°C
Junction operating temperature
Case operating temperature
Internally limited °C
Tc
- 40 to 150
- 55 to 150
°C
°C
Tstg
Storage temperature
2.2
Thermal data
Table 4.
Symbol
Thermal data (per island)
Parameter
Max. value
Unit
Rthj-case Thermal resistance junction-case
1.7
°C/W
°C/W
Rthj-amb Thermal resistance junction-ambient (one chip ON)
55(1)
2
1. When mounted on a standard single-sided FR-4 board with 0.5cm of Cu (at least 35 µm thick) connected
to all Vcc pins. Horizontal mounting and no artificial air flow.
6/26
Doc ID 11038 Rev 4
VND830AEP-E
Electrical specifications
2.3
Electrical characteristics
Values specified in this section are for 8V < VCC < 36V; -40°C < Tj < 150°C, unless
otherwise stated.
Figure 3.
Current and voltage conventions
IS
VCC
VF1 (*)
VCC
IOUT1
IIN1
OUTPUT1
INPUT1
VOUT1
ISENSE1
VIN1
CURRENT SENSE 1
OUTPUT2
VSENSE1
IOUT2
IIN2
VIN2
VOUT2
INPUT2
ISENSE2
CURRENT SENSE 2
GROUND
VSENSE2
IGND
Note:
V
Fn = VCCn - VOUTn during reverse battery condition.
Table 5.
Symbol
Power output
Parameter
Test conditions
Min. Typ. Max. Unit
VCC
VUSD
VOV
Operating supply voltage
Undervoltage shutdown
Overvoltage shutdown
5.5
3
13
4
36
V
V
5.5
36
V
IOUT = 2A; Tj = 25°C
IOUT = 2A; Tj = 125°C
60
mΩ
RON
On-state resistance
120 mΩ
VCLAMP Clamp voltage
ICC = 20mA
41
48
12
55
V
Off-state; VCC = 13V;
V
IN = VOUT = 0V
40
µA
Off-state; VCC = 13V;
IN = VOUT = 0V; Tj = 25°C
IS
Supply current
V
12
25
µA
On-state; VCC = 13V; VIN = 5V;
OUT = 0A; RSENSE= 3.9KΩ
I
7
mA
µA
VIN = VOUT = 0V; VCC = 36V;
Tj = 125°C
IL(off1) Off-state output current
IL(off3) Off-state output current
IL(off4) Off-state output current
0
50
VIN = VOUT = 0V; VCC = 13V;
Tj = 125°C
5
3
µA
µA
VIN = VOUT = 0V; VCC = 13V;
Tj = 25°C
Doc ID 11038 Rev 4
7/26
Electrical specifications
VND830AEP-E
Table 6.
Symbol
Protections
Parameter
Test conditions
VCC = 13V
Min. Typ. Max. Unit
6
10
15
15
A
A
Ilim
Current limitation
5.5V < VCC < 36V
TTSD
TR
Shutdown temperature
Reset temperature
Thermal hysteresis
150
135
7
175
200
°C
°C
°C
Thyst
15
IOUT = 2A; VIN = 0V;
L = 6mH
VCC - VCC - VCC
-
Vdemag Turn-off output clamp voltage
VON
V
41
48
55
Output voltage drop limitation IOUT = 10mA
50
mV
Note:
To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
Table 7.
Symbol
VCC - output diode
Parameter
Test conditions
Min. Typ. Max. Unit
0.6
VF
Forward on voltage
- IOUT = 1.3A; Tj = 150°C
V
Table 8.
Symbol
Switching (VCC = 13V; Tj = 25°C)
Parameter
Test conditions
Min.
Typ.
Max. Unit
RL = 6.5Ω from VIN rising
edge to VOUT = 1.3V (see
Figure 5)
td(on)
Turn-on delay time
30
µs
RL = 6.5Ω from VIN falling
edge to VOUT = 11.7V
td(off)
Turn-off delay time
30
µs
(see Figure 5)
RL = 6.5Ω from VOUT = 1.3V to
VOUT = 10.4V (see Figure 5)
See
Figure 10
dVOUT/dt(on) Turn-on voltage slope
dVOUT/dt(off) Turn-off voltage slope
V/µs
V/µs
RL = 6.5Ω from VOUT = 11.7V
to VOUT = 1.3V (see Figure 5)
See
Figure 12
Table 9.
Symbol
Logic inputs
Parameter
Test conditions
Min.
Typ.
Max. Unit
VIL
IIL
Input low level
1.25
V
µA
V
Low level input current
Input high level
VIN = 1.25V
VIN = 3.25V
1
VIH
IIH
3.25
High level input current
10
µA
8/26
Doc ID 11038 Rev 4
VND830AEP-E
Electrical specifications
Table 9.
Symbol
Logic inputs (continued)
Parameter
Test conditions
Min.
Typ.
Max. Unit
VI(hyst) Input hysteresis voltage
VICL Input clamp voltage
0.5
6
V
IIN = 1mA
IIN = -1mA
6.8
8
V
V
- 0.7
Table 10. Current sense
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
IOUT1 or IOUT2 = 0.05A;
K0
IOUT SENSE
/I
600 1300 2000
VSENSE = 0.5V; other channels
open; Tj = -40°C...150°C
IOUT1 or IOUT2 = 0.25A;
K1
IOUT SENSE
/I
1000 1400 1900
V
SENSE = 0.5V; other channels
open; Tj = -40°C...150°C
IOUT1 or IOUT2 = 0.25A;
dK1/K1 Current sense ratio drift
-10
+10
%
%
%
V
SENSE = 0.5V; other channels
open; Tj = -40°C...150°C
IOUT1 or IOUT2 = 1.6A;
1280 1500 1800
1300 1500 1780
VSENSE = 4V; other channels
open; Tj = -40°C
K2
IOUT/ISENSE
Tj = 25°C...150°C
IOUT1 or IOUT2 = 1.6A;
dK2/K2 Current sense ratio drift
-6
+6
V
SENSE = 4V; other channels
open; Tj = -40°C...150°C
IOUT1 or IOUT2 = 2.5A;
1280 1500 1680
1340 1500 1600
V
SENSE = 4V; other channels
K3
IOUT/ISENSE
open; Tj = -40°C
Tj = 25°C...150°C
I
OUT1 or IOUT2 = 2.5A;
dK3/K3 Current sense ratio drift VSENSE = 4V; other channels
open; Tj = -40°C...150°C
-6
+6
VIN = 0V; IOUT = 0A; VSENSE = 0V;
Tj = -40°C...150°C
IN = 5V; IOUT = 0A; VSENSE = 0V;
0
0
5
µA
µA
Analog sense leakage
current
ISENSE
V
Tj = -40°C...150°C
10
VCC = 5.5V; IOUT1,2 = 1.3A;
RSENSE = 10kΩ
VCC > 8V, IOUT1,2 = 2.5A;
2
4
V
Max. analog sense
output voltage
VSENSE
RSENSE = 10kΩ
V
V
Sense voltage in over
temperature conditions
VSENSEH
VCC = 13V; RSENSE = 3.9kΩ
5.5
Doc ID 11038 Rev 4
9/26
Electrical specifications
VND830AEP-E
Table 10. Current sense (continued)
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
Analog sense output
RVSENSEH impedance in over
temperature condition
V
CC = 13V; Tj > TTSD
;
400
Ω
All channels open
Current sense delay
response
(1)
tDSENSE
To 90% ISENSE
500
µs
1. Current sense signal delay after positive input slope.
Figure 4.
IOUT/ISENSE versus IOUT
Iout/Isense
2250
2000
1750
1500
1250
1000
750
max Tj= -40ºC
max Tj=25...150ºC
typical value
min Tj= -40ºC
min Tj=25...150ºC
500
0
0.5
1
1.5
2
2.5
3
Iout (A)
10/26
Doc ID 11038 Rev 4
VND830AEP-E
Electrical specifications
Figure 5.
Switching characteristics
VOUT
90%
80%
tr
dVOUT/dt(off)
dVOUT/dt(on)
10%
tf
t
ISENSE
90%
t
tDSENSE
td(on)
INPUT
td(off)
t
Table 11.
Truth table
Conditions
Input
Output
Sense
L
L
0
Normal operation
Overtemperature
Undervoltage
H
H
Nominal
L
L
L
0
H
VSENSEH
L
L
L
0
0
H
L
L
L
0
0
Overvoltage
H
L
H
H
L
L
L
0
Short circuit to GND
(TJ < TTSD) 0
(TJ > TTSD) 0
L
H
H
0
Short circuit to VCC
H
< Nominal
Negative output voltage clamp
L
L
0
Doc ID 11038 Rev 4
11/26
Electrical specifications
VND830AEP-E
Table 12. Electrical transient requirements (part 1/3)
ISO T/R
7637/1
Test level
I
II
III
IV
Delays and impedance
Test pulse
1
2
- 25V
+ 25V
- 25V
- 50V
+ 50V
- 50V
- 75V
+ 75V
- 100V
+ 75V
- 6V
- 100V
+ 100V
- 150V
+ 100V
- 7V
2ms, 10Ω
0.2ms, 10Ω
0.1µs, 50Ω
0.1µs, 50Ω
100ms, 0.01Ω
400ms, 2Ω
3a
3b
4
+ 25V
- 4V
+ 50V
- 5V
5
+ 26.5V
+ 46.5V
+ 66.5V
+ 86.5V
Table 13. Electrical transient requirements (part 2/3)
ISO T/R
7637/1
Test level
I
II
III
IV
Test pulse
1
2
C
C
C
C
C
C
C
C
C
C
C
E
C
C
C
C
C
E
C
C
C
C
C
E
3a
3b
4
5
Table 14. Electrical transient requirements (part 3/3)
Class
Contents
All functions of the device are performed as designed after exposure to
disturbance.
C
One or more functions of the device is not performed as designed after exposure
and cannot be returned to proper operation without replacing the device.
E
12/26
Doc ID 11038 Rev 4
VND830AEP-E
Electrical specifications
Figure 6.
Waveforms
NORMAL OPERATION
INPUT
n
LOAD CURRENT
n
SENSE
n
UNDERVOLTAGE
V
CC
VUSDhyst
VUSD
INPUT
n
LOAD CURRENT
n
SENSE
n
OVERVOLTAGE
VOV
VCC < VOV
V
CC
VCC > VOV
INPUT
n
LOAD CURRENT
n
SENSE
n
SHORT TO GROUND
INPUT
n
LOAD CURRENT
n
LOAD VOLTAGE
n
SENSE
n
SHORT TO V
CC
INPUT
n
LOAD VOLTAGE
n
LOAD CURRENT
n
SENSE
n
<Nominal
<Nominal
OVERTEMPERATURE
TTSD
TR
T
j
INPUT
n
LOAD CURRENT
n
VSENSEH
SENSE
ISENSE=
n
RSENSE
Doc ID 11038 Rev 4
13/26
Electrical specifications
VND830AEP-E
2.4
Electrical characteristics curves
Figure 7.
Off-state output current
Figure 8.
High level input current
IL(off1) (uA)
Iih (uA)
5
4.5
4
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
Vin=3.25V
Off state
Vcc=13V
Vin=Vout=0V
3.5
3
2.5
2
1.5
1
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
Figure 9.
Input clamp voltage
Figure 10. Turn-on voltage slope
dVout/dt(on)
900
Vicl (V)
8
7.8
7.6
7.4
7.2
7
800
Iin=1mA
Vcc=13V
RI=6.5Ohm
700
600
500
400
300
200
100
6.8
6.6
6.4
6.2
6
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125 150
175
Tc (ºC)
Tc (°C)
Figure 11. Overvoltage shutdown
Figure 12. Turn-off voltage slope
Vov (V)
50
dVout/dt(off) (V/ms)
500
450
47.5
45
Vcc=13V
Rl=6.5Ohm
400
350
42.5
40
300
250
200
150
100
50
37.5
35
32.5
30
0
-50
-25
0
25
50
75
100 125 150
175
-50
-25
0
25
50
75
100 125
150
175
Tc (ºC)
Tc (ºC)
14/26
Doc ID 11038 Rev 4
VND830AEP-E
Electrical specifications
Figure 13. ILIM vs Tcase
Figure 14. On-state resistance vs VCC
Ilim (A)
20
Ron (mOhm)
100
Tc=150ºC
17.5
90
80
70
60
50
40
30
20
Vcc=13V
15
Iout=5A
12.5
10
7.5
5
Tc=25ºC
Tc= -40ºC
2.5
0
-50
-25
0
25
50
75
100 125 150
175
5
10
15
20
25
30
35
40
Tc (°C)
Vcc (V)
Figure 15. Input high level
Figure 16. Input hysteresis voltage
Vhyst (V)
1.5
Vih (V)
3.6
1.4
3.4
Vcc=13V
1.3
Vcc=13V
3.2
1.2
1.1
1
3
2.8
2.6
2.4
2.2
2
0.9
0.8
0.7
0.6
0.5
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
Figure 17. On-state resistance vs Tcase
Figure 18. Input low level
Vil (V)
2.6
Ron (mOhm)
100
90
2.4
Iout=5A
Vcc=8V & 36V
Vcc=13V
2.2
80
70
2
1.8
1.6
1.4
1.2
1
60
50
40
30
20
10
0
-50
-25
0
25
50
75
100 125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (°C)
Doc ID 11038 Rev 4
15/26
Application information
VND830AEP-E
3
Application information
Figure 19. Application schematic
+5V
Rprot
INPUT1
V
CC
Dld
OUTPUT1
Rprot
CURRENT SENSE1
INPUT2
μC
Rprot
Rprot
CURRENT SENSE2
GND
OUTPUT2
RGND
RSENSE1
VGND
RSENSE2
DGND
3.1
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1: a resistor in the ground line (R
only)
GND
This can be used with any type of load.
The following show how to dimension the RGND resistor:
1. RGND ≤ 600mV / 2 (IS(on)max
2. RGND ≥ ( - VCC) / (- IGND
)
)
where - IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:
PD = (- VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
R
GND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same RGND
.
16/26
Doc ID 11038 Rev 4
VND830AEP-E
Application information
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2
Solution 2: a diode (D
) in the ground line
GND
A resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device will be driving an
inductive load. This small signal diode can be safely shared amongst several different HSD.
Also in this case, the presence of the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.2
3.3
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC maximum DC rating. The same applies if the device is subject to transients on the VCC
line that are greater than those shown in the ISO T/R 7637/1 table.
MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the µC I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
- VCCpeak / Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax
Example
For the following conditions:
V
CCpeak = - 100V
Ilatchup ≥ 20mA
VOHμC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended values are:
R
prot = 10kΩ
Doc ID 11038 Rev 4
17/26
Application information
VND830AEP-E
3.4
Maximum demagnetization energy (V = 13.5V)
CC
Figure 20. Maximum turn-off current versus load inductance
LMAX (A)
I
100
A
10
B
C
1
0.1
1
10
L(mH)
A = single pulse at TJstart = 150ºC
B= repetitive pulse at TJstart = 100ºC
C= repetitive pulse at TJstart = 125ºC
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves B and C.
18/26
Doc ID 11038 Rev 4
VND830AEP-E
Package and PC board thermal data
4
Package and PC board thermal data
4.1
PowerSSO-24 thermal data
Figure 21. PowerSSO-24 PC board
Note:
Layout condition of Rth and Zth measurements (PCB FR4 area= 78 mm x 78 mm, PCB
thickness=2 mm, Cu thickness=70 mm (front and back side), Copper areas: from minimum
pad lay-out to 8 cm2).
Figure 22. Rthj-amb vs PCB copper area in open box free air condition (one channel ON)
RTHj_amb(°C/W)
60
55
50
45
40
0
1
2
3
4
5
6
7
8
9
PCB Cu heatsink area (cm^2)
Doc ID 11038 Rev 4
19/26
Package and PC board thermal data
VND830AEP-E
Figure 23. PowerSSO-24 thermal impedance junction ambient single pulse (one
channel ON)
ZTH(°C/W)
100
10
1
Footprint
8 cm2
0.1
0.0001
0.001
0.01
0.1
1
10
100
1000
Time (s)
Figure 24. Thermal fitting model of a double channel HSD in PowerSSO-24 (b)
Equation 1: pulse calculation formula
= R ⋅ δ + Z (1 – δ)
:
Z
THδ
TH
THtp
where δ = tP/T
b. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
20/26
Doc ID 11038 Rev 4
VND830AEP-E
Package and PC board thermal data
Table 15. Thermal parameters
Area/island (cm2)
R1 = R7 (°C/W)
R2 = R8 (°C/W)
R3 (°C/W)
Footprint
0.1
8
22
5
0.9
1
R4 (°C/W)
4
R5 (°C/W)
13.5
37
R6 (°C/W)
C1 = C7 (W.s/°C)
C2 = C8 (W.s/°C)
C3 (W.s/°C)
0.0006
0.0025
0.025
0.08
0.7
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
3
Doc ID 11038 Rev 4
21/26
Package and packing information
VND830AEP-E
5
Package and packing information
®
5.1
ECOPACK packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
PowerSSO-24 mechanical data
Figure 25. PowerSSO-24 package dimensions
22/26
Doc ID 11038 Rev 4
VND830AEP-E
Table 16. PowerSSO-24 mechanical data(1) (2)
Package and packing information
Millimeters
Typ.
Symbol
Min.
Max.
A
A2
a1
b
2.45
2.35
0.10
0.51
0.32
10.50
7.60
2.15
0
0.33
0.23
10.10
7.40
c
D(3)
E(3)
e
0.8
8.8
2.3
e3
F
G
G1
H
0.1
0.06
10.5
0.4
10.1
h
k
0°
8°
L
0.55
0.85
O
Q
S
1.2
0.8
2.9
3.65
1
T
U
N
10º
4.7
X
4.1
6.5
4.9(4)
7.1
5.5(4)
Y
1. No intrusion allowed inwards the leads.
2. Flash or bleeds on exposed die pad shall not exceed 0.4 mm per side
3. “D and E” do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15 mm.
4. Variations for small window leadframe option.
Doc ID 11038 Rev 4
23/26
Package and packing information
VND830AEP-E
5.3
Packing information
Figure 26. PowerSSO-24 tube shipment (no suffix)
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
49
1225
532
3.5
C
B
A
B
13.8
0.6
C (± 0.1)
All dimensions are in mm.
A
Figure 27. PowerSSO-24 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
1000
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
1000
330
1.5
13
20.2
24.4
100
30.4
G (+ 2 / -0)
N (min)
T (max)
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
W
24
4
Tape Hole Spacing
Component Spacing
Hole Diameter
P0 (± 0.1)
P
12
D (± 0.05)
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
1.55
1.5
11.5
2.85
2
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
End
All dimensions are in mm.
Start
No components
500mm min
Top
cover
tape
No components Components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
24/26
Doc ID 11038 Rev 4
VND830AEP-E
Revision history
6
Revision history
Table 17. Document revision history
Date
Revision
Changes
04-Feb-2005
1
Initial release.
Document reformatted and restructured.
Added list of contents, tables and figures.
Added ECOPACK® packages information.
Update PowerSSO-24 mechanical data.
27-Nov-2008
2
Updated Figure 16: PowerSSO-24 mechanical data:
– Deleted A (min) value
– Changed A (max) value from 2.50 to 2.45
– Changed A2 (max) value from 2.40 to 2.35
– Updated k values
01-Jul-2009
23-Sep-2013
3
4
– Changed L (min) value from 0.6 to 0.55
– Changed L (max) value from1 to 0.85
Updated disclaimer.
Doc ID 11038 Rev 4
25/26
VND830AEP-E
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