VND830ASP13TR [ETC]
DOUBLE CHANNEL HIGH SIDE SOLID STATE RELAY ; 双通道高侧固态继电器\n型号: | VND830ASP13TR |
厂家: | ETC |
描述: | DOUBLE CHANNEL HIGH SIDE SOLID STATE RELAY
|
文件: | 总17页 (文件大小:299K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
®
VND830ASP
DOUBLE CHANNEL HIGH SIDE SOLID STATE RELAY
TYPE
R
I
V
CC
DS(on)
OUT
VND830ASP
60 mΩ (*)
6 A (*)
36 V (*)
(*) Per channel
10
■ DC SHORT CIRCUIT CURRENT: 6A
■ CMOS COMPATIBLE INPUTS
■ PROPORTIONAL LOAD CURRENT SENSE
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUT-DOWN
1
PowerSO-10™
ORDER CODES
TUBE
■ OVERVOLTAGE CLAMP
PACKAGE
T&R
■ THERMAL SHUT-DOWN
VND830ASP VND830ASP13TR
PowerSO-10™
■ CURRENT LIMITATION
■ VERY LOW STAND-BY POWER DISSIPATION
side connected to ground. Active VCC pin voltage
clamp protects the device against low energy
spikes (see ISO7637 transient compatibility table).
This device has two channels in high side
configuration; each channel has an analog sense
output on which the sensing current is proportional
(according to a known ratio) to the corresponding
load current. Built-in thermal shut-down and
outputs current limitation protect the chip from
over temperature and short circuit. Device turns off
in case of ground pin disconnection.
■ PROTECTION AGAINST:
LOSS OF GROUND AND LOSS OF VCC
■ REVERSE BATTERY PROTECTION (**)
DESCRIPTION
The VND830ASP is a monolithic device made using
STMicroelectronics VIPower M0-3 technology. It
is intended for driving any kind of load with one
BLOCK DIAGRAM
V
CC
OVERVOLTAGE
UNDERVOLTAGE
V
CLAMP
CC
PwCLAMP 1
DRIVER 1
OUTPUT 1
I
INPUT 1
LIM1
V
dslim1
K
Ot1
LOGIC
Ot1
I
OUT1
CURRENT
SENSE 1
INPUT 2
GND
PwCLAMP 2
DRIVER 2
OUTPUT 2
I
LIM2
OVERTEMP. 1
V
dslim2
K
Ot2
I
Ot2
OUT2
CURRENT
SENSE 2
OVERTEMP. 2
(**) See application schematic at page 8
July 2003
1/17
VND830ASP
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
Unit
V
V
DC Supply Voltage
41
CC
-V
Reverse Supply Voltage
- 0.3
V
CC
GND
OUT
-I
DC Reverse Ground Pin Current
Output Current
- 200
mA
A
I
Internally Limited
I
Reverse Output Current
Input Current
- 6
+/- 10
-3
A
R
I
mA
V
IN
V
Current Sense Maximum Voltage
CSENSE
+15
V
Electrostatic Discharge (Human Body Model: R=1.5Ω; C=100pF)
- INPUT
4000
2000
5000
5000
V
V
V
V
V
- CURRENT SENSE
- OUTPUT
ESD
- V
CC
Maximum Switching Energy
(L=1.8mH; R =0Ω; V =13.5V; T
E
100
mJ
MAX
=150ºC; I =9A)
L
bat
jstart
L
P
Power Dissipation at T =25°C
74
W
°C
°C
°C
tot
C
T
Junction Operating Temperature
Case Operating Temperature
Storage Temperature
Internally Limited
- 40 to 150
j
T
c
T
- 55 to 150
stg
CONNECTION DIAGRAM (TOP VIEW)
OUTPUT 2
OUTPUT 2
N.C.
5
4
3
6
7
GROUND
INPUT2
INPUT1
C.SENSE1
C.SENSE2
8
9
OUTPUT 1
OUTPUT 1
2
1
10
11
V
CC
CURRENT AND VOLTAGE CONVENTIONS
I
S
V
CC
V
CC
I
OUT1
I
IN1
OUTPUT1
INPUT1
V
OUT1
I
V
IN1
SENSE1
CURRENT SENSE 1
OUTPUT2
V
SENSE1
I
OUT2
I
IN2
V
OUT2
SENSE2
INPUT2
I
V
IN2
CURRENT SENSE 2
GROUND
V
SENSE2
I
GND
2/17
VND830ASP
THERMAL DATA
Symbol
Parameter
Value
1.2
Unit
°C/W
°C/W
R
Thermal Resistance Junction-case
thj-case
R
Thermal Resistance Junction-ambient
51.2 (*)
thj-amb
2
(*) When mounted on a standard single-sided FR-4 board with 0.5cm of Cu (at least 35µm thick). Horizontal mounting and no artificial air
flow
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C< Tj <150°C, unless otherwise specified)
(Per each channel)
POWER OUTPUT
Symbol
Parameter
Test Conditions
Min
5.5
3
Typ
13
4
Max
36
Unit
V
V
Operating Supply Voltage
Undervoltage Shut-down
Overvoltage Shut-down
CC
V
5.5
V
USD
V
36
V
OV
I
I
I
=2A; T =25°C
60
120
55
mΩ
mΩ
V
OUT
OUT
j
R
On State Resistance
Clamp voltage
ON
=2A; T =150°C
j
V
=20 mA (see note 1)
CC
41
48
12
clamp
Off State; V =13V; V
V =0V
40
µA
CC
IN= OUT
Off State; V =13V; V
V =0V;
CC
IN= OUT
I
Supply Current
T =25°C
12
25
µA
S
j
On State; V =5V; V =13V; I
=0A;
IN
CC
OUT
R
=3.9KΩ
7
50
0
mA
µA
µA
µA
µA
SENSE
I
Off State Output Current
Off State Output Current
Off State Output Current
Off State Output Current
V
V
V
V
=V
=0V; V =36V; T =125°C
0
L(off1)
IN
IN
IN
IN
OUT
CC
j
I
=0V; V
=3.5V
-75
L(off2)
OUT
I
=V
=V
=0V; V =13V; T =125°C
5
L(off3)
OUT
OUT
CC
j
I
=0V; V =13V; T =25°C
3
L(off4)
CC
j
SWITCHING (VCC =13V)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
R =6.5Ω from V rising edge to
L
IN
t
t
Turn-on Delay Time
Turn-off Delay Time
30
µs
d(on)
d(off)
V
=1.3V
OUT
R =6.5Ω from V falling edge to
L
IN
30
µs
V
=11.7V
OUT
See
dV
dV
/dt
Turn-on Voltage Slope
Turn-off Voltage Slope
R =6.5Ω from V
=1.3V to V =10.4V
OUT
relative
diagram
V/µs
OUT (on)
L
OUT
See
relative
diagram
/dt
R =6.5Ω from V
=11.7V to V =1.3V
OUT
V/µs
OUT (off)
L
OUT
LOGIC INPUT (Channels 1,2)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
V
V
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
1.25
IL
I
V
V
=1.25V
=3.25V
1
µA
V
IL
IN
V
3.25
IH
I
10
8
µA
V
IH
IN
V
0.5
6
I(hyst)
I =1mA
6.8
V
IN
V
Input clamp voltage
ICL
I =-1mA
-0.7
V
IN
Note 1: V
and V are correlated. Typical difference is 5V.
OV
clamp
3/17
1
VND830ASP
ELECTRICAL CHARACTERISTICS (continued)
PROTECTIONS
Symbol
Parameter
Test Conditions
Min
Typ
Max
15
Unit
A
Vcc=13V
5.5V<Vcc<36V
6
9
I
Current limitation
lim
15
A
Thermal shut-down
temperature
T
150
175
200
°C
TSD
T
Thermal reset temperature
Thermal hysteresis
135
7
°C
°C
R
T
15
HYST
Turn-off output voltage
clamp
V
I
I
=2A; V =0V; L=6mH
V
-41
V
-48 V -55
V
demag
OUT
OUT
IN
CC
CC
CC
Output voltage drop
limitation
V
=10mA
50
mV
ON
CURRENT SENSE (9V≤VCC≤16V) (See figure 1)
Symbol
Parameter
Test Conditions
=0.05A; V =0.5V;
SENSE
Min
Typ
Max
Unit
I
or I
OUT1
OUT2
K
I
I
/I
OUT SENSE
600
1300
2000
0
1
other channels open; T= -40°C...150°C
j
I
or I
=0.25A; V
=0.5V;
SENSE
OUT1
OUT2
K
/I
1000
1400
1900
OUT SENSE
other channels open; T= -40°C...150°C
j
I
or I
=0.25A; V
=0.5V;
SENSE
OUT1
OUT2
dK /K
Current Sense Ratio Drift
-10
+10
%
%
1
1
other channels open; T= -40°C...150°C
j
1280
1500
1500
1800
I
or I
=1.6A; V
SENSE
=4V; other
OUT1
OUT2
channels open; T =-40°C
K
I
/I
OUT SENSE
j
2
T=25°C...150°C
1300
-6
1780
+6
j
I
or I
=1.6A; V
OUT2 SENSE
=4V; other
OUT1
dK /K
Current Sense Ratio Drift
2
2
channels open; T =-40°C...150°C
j
1280
1500
1500
1680
I
or I
=2.5A; V
SENSE
=4V; other
OUT1
OUT2
channels open; T =-40°C
K
I
/I
OUT SENSE
j
3
T=25°C...150°C
1340
-6
1600
+6
j
I
or I
=2.5A; V
OUT2 SENSE
=4V; other
OUT1
dK /K
Current Sense Ratio Drift
%
3
3
channels open; T =-40°C...150°C
j
V
=0V; I
=0A; V
=0V;
IN
OUT
SENSE
SENSE
0
0
5
µA
T=-40°C...150°C
Analog Sense Leakage
Current
j
I
SENSE
V
=5V; I
=0A; V
=0V;
IN
OUT
10
µA
T=-40°C...150°C
j
V
V
V
=5.5V; I
=1.3A; R =10kΩ
SENSE
2
4
V
V
Max Analog Sense Output
Voltage
CC
CC
CC
OUT1,2
V
SENSE
>8V, I
=2.5A; R
=10kΩ
OUT1,2
SENSE
=13V; R
=3.9kΩ
Sense Voltage in
Overtemperature conditions
SENSE
V
5.5
V
SENSEH
Analog Sense Output
Impedance in
R
V
=13V; Tj>T ; All Channels Open
TSD
400
Ω
VSENSEH
CC
Overtemperature Condition
Current sense delay
response
t
to 90% I
(see note 2)
500
µs
DSENSE
SENSE
Note 2: current sense signal delay after positive input slope.
Note: Sense pin doesn’t have to be left floating.
4/17
VND830ASP
TRUTH TABLE (per channel)
CONDITIONS
INPUT
OUTPUT
SENSE
L
H
L
L
H
L
L
L
L
L
L
L
L
L
H
H
0
Normal operation
Overtemperature
Undervoltage
Nominal
0
H
L
V
SENSEH
0
H
L
0
0
0
0
Overvoltage
H
L
Short circuit to GND
H
H
L
(T <T
) 0
) V
0
j
TSD
TSD
(T >T
j
SENSEH
Short circuit to V
CC
H
< Nominal
Negative output voltage
clamp
L
L
0
ELECTRICAL TRANSIENT REQUIREMENTS
ISO T/R 7637/1
TEST LEVELS
III
I
II
IV
Delays and
Impedance
Test Pulse
1
2
-25 V
+25 V
-25 V
-50 V
+50 V
-50 V
-75 V
+75 V
-100 V
+75 V
-6 V
-100 V
+100 V
-150 V
+100 V
-7 V
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
3a
3b
4
+25 V
-4 V
+50 V
-5 V
5
+26.5 V
+46.5 V
+66.5 V
+86.5 V
ISO T/R 7637/1
Test Pulse
TEST LEVELS RESULTS
I
II
III
C
C
C
C
C
E
IV
C
C
C
C
C
E
1
2
C
C
C
C
C
C
C
C
C
C
C
E
3a
3b
4
5
CLASS
CONTENTS
C
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
E
5/17
VND830ASP
Figure 1: IOUT SENSE versus IOUT
/I
Iout/Isense
2250
2000
1750
1500
1250
1000
750
max Tj= -40ºC
max Tj=25...150ºC
min Tj=25...150ºC
typical value
min Tj= -40ºC
500
0
0.5
1
1.5
2
2.5
3
Iout (A)
Figure 2: Switching Characteristics (Resistive load RL=6.5Ω)
VOUT
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
tf
tr
t
ISENSE
90%
t
t
DSENSE
INPUT
td(on)
td(off)
t
6/17
VND830ASP
Figure 3: Waveforms
NORMAL OPERATION
INPUT
n
LOAD CURRENT
n
SENSE
n
UNDERVOLTAGE
V
CC
V
USDhyst
V
USD
INPUT
n
LOAD CURRENT
n
SENSE
n
OVERVOLTAGE
V
OV
V
CC
V
> V
OV
V
< V
OV
CC
CC
INPUT
n
LOAD CURRENT
n
SENSE
n
SHORT TO GROUND
INPUT
n
LOAD CURRENT
n
LOAD VOLTAGE
n
SENSE
n
SHORT TO V
CC
INPUT
n
LOAD VOLTAGE
n
LOAD CURRENT
n
SENSE
n
<Nominal
<Nominal
OVERTEMPERATURE
T
TSD
T
j
T
R
INPUT
n
LOAD CURRENT
n
V
SENSEH
SENSE
I
=
SENSE
n
R
SENSE
7/17
VND830ASP
APPLICATION SCHEMATIC
+5V
R
prot
INPUT1
V
CC
D
ld
OUTPUT1
R
prot
CURRENT SENSE1
INPUT2
µC
R
prot
R
CURRENT SENSE2
prot
GND
OUTPUT2
R
GND
R
V
GND
R
SENSE1
SENSE2
D
GND
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Solution 1: Resistor in the ground line (R
can be used with any type of load.
only). This
GND
Solution 2: A diode (D
) in the ground line.
GND
A resistor (R
GND
=1kΩ) should be inserted in parallel to
GND
The following is an indication on how to dimension the
D
if the device will be driving an inductive load.
R
GND
1) R
resistor.
This small signal diode can be safely shared amongst
several different HSDs. Also in this case, the presence of
the ground network will produce a shift ( 600mV) in the
input thresholds and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
≤ 600mV / I
.
S(on)max
GND
2) R
≥ (−V ) / (-I
)
GND
GND
CC
where -I
is the DC reverse ground pin current and can
GND
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in R
(when V <0: during reverse
CC
GND
battery situations) is:
LOAD DUMP PROTECTION
2
P = (-V ) /R
D
CC
GND
D
is necessary (Voltage Transient Suppressor) if the
ld
load dump peak voltage exceeds V max DC rating. The
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
CC
same applies if the device will be subject to transients on
the V
line that are greater than the ones shown in the
calculated with formula (1) where I
becomes the
CC
S(on)max
ISO T/R 7637/1 table.
sum of the maximum on-state currents of the different
devices.
µC I/Os PROTECTION:
Please note that if the microprocessor ground is not
If a ground protection network is used and negative
common with the device ground then the R
will
GND
transient are present on the V line, the control pins will
CC
produce a shift (I
* R
) in the input thresholds
S(on)max
GND
be pulled negative. ST suggests to insert a resistor (R
)
prot
and the status output values. This shift will vary
depending on how many devices are ON in the case of
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
several high side drivers sharing the same R
.
GND
8/17
VND830ASP
HSD I/Os (Input levels compatibility) with the latch-up limit
Calculation example:
of µC I/Os.
For V
= - 100V and I
≥ 20mA; V
≥ 4.5V
CCpeak
latchup
OHµC
-V
/I
≤ R
≤ (V
-V -V
) / I
CCpeak latchup
prot
OHµC IH GND IHmax
5kΩ ≤ R
≤ 65kΩ.
prot
Recommended R
value is 10kΩ.
prot
9/17
VND830ASP
High Level Input Current
Off State Output Current
IL(off1) (uA)
Iih (uA)
8
5
7
4.5
Vin=3.25V
Off state
6
4
Vcc=13V
Vin=Vout=0V
5
3.5
3
4
3
2
1
0
2.5
2
1.5
1
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
100
100
125
125
125
150
150
150
175
175
175
Tc (ºC)
Tc (ºC)
Input Clamp Voltage
Input High Level
Vicl (V)
Vih (V)
8
3.6
7.8
3.4
Iin=1mA
Vcc=13V
7.6
3.2
3
7.4
7.2
7
2.8
2.6
2.4
2.2
2
6.8
6.6
6.4
6.2
6
-50
-25
0
25
50
75
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
Input Low Level
Input Hysteresis Voltage
Vil (V)
Vhyst (V)
1.5
2.6
1.4
2.4
Vcc=13V
Vcc=13V
1.3
2.2
1.2
1.1
1
2
1.8
1.6
1.4
1.2
1
0.9
0.8
0.7
0.6
0.5
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
Tc (ºC)
Tc (ºC)
10/17
VND830ASP
ILIM Vs Tcase
Overvoltage Shutdown
Vov (V)
Ilim (A)
50
20
47.5
45
17.5
Vcc=13V
15
12.5
10
42.5
40
37.5
35
7.5
5
32.5
30
2.5
0
-50
-25
0
25
50
75
100 125 150
175
-50
-25
0
25
50
75
100 125 150
175
Tc (ºC)
Tc (ºC)
Turn-on Voltage Slope
Turn-off Voltage Slope
dVout/dt(on) (V/ms)
dVout/dt(off) (V/ms)
600
500
450
550
Vcc=13V
Rl=6.5Ohm
Vcc=13V
Rl=6.5Ohm
400
500
350
450
400
350
300
250
200
300
250
200
150
100
50
0
-50
-25
0
25
50
75
100 125
150
175
-50
-25
0
25
50
75
100 125
150
175
Tc (ºC)
Tc (ºC)
On State Resistance Vs Tcase
On State Resistance Vs VCC
Ron (mOhm)
100
Ron (mOhm)
100
90
Tc=150ºC
90
80
Iout=5A
Vcc=8V & 36V
80
70
Iout=5A
70
60
50
40
30
20
10
0
60
50
40
30
20
Tc=25ºC
Tc= -40ºC
5
10
15
20
25
30
35
40
-50
-25
0
25
50
75
100 125
150
175
Vcc (V)
Tc (ºC)
11/17
VND830ASP
Maximum turn off current versus load inductance
LMAX (A)
I
100
10
1
A
B
C
0.1
1
10
100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
12/17
VND830ASP
PowerSO-10™ THERMAL DATA
PowerSO-10™ PC Board
Layout condition of R and Z measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
th
th
2
Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm ).
Rthj-amb Vs PCB copper area in open box free air condition
RTHjamb
55
50
45
40
35
30
25
20
0
5
10
15
20
PCB Cu heatsink area (cm2)
13/17
VND830ASP
PowerSO-10 Thermal Impedance Junction Ambient Single Pulse
100
Footprint
2
4 cm
2
8 cm
2
16 cm
10
1
0.1
0.0001 0.001
0.01
0.1
1
10
100
1000
Time (s)
Thermal fitting model of a double channel HSD
in PowerSO-10
Pulse calculation formula
ZTHδ = RTH δ + ZTHtp(1 – δ)
δ = tp ⁄ T
where
Thermal Parameter
2
Area/island (cm )
2
0.12
0.5
4
25
4
8
20
6
16
15
9
Tj_1
C1
R1
C1
R1
C2
R2
C3
R3
C4
R4
C5
R5
C6
R6
R1 (°C/W)
R2 (°C/W)
R3( °C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Pd1
0.7
C2
Tj_2
0.8
13
R2
37
Pd2
0.0006
0.0012
0.013
0.3
T_amb
0.75
3
14/17
VND830ASP
PowerSO-10™ MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
MIN.
MAX.
A
A (*)
A1
B
B (*)
C
C (*)
D
D1
E
E2
E2 (*)
E4
E4 (*)
e
F
F (*)
H
3.35
3.4
3.65
3.6
0.132
0.134
0.000
0.016
0.014
0.013
0.009
0.370
0.291
0.366
0.283
0.287
0.232
0.232
0.144
0.142
0.004
0.024
0.021
0.022
0.0126
0.378
0.300
0.374
300
0.00
0.40
0.37
0.35
0.23
9.40
7.40
9.30
7.20
7.30
5.90
5.90
0.10
0.60
0.53
0.55
0.32
9.60
7.60
9.50
7.60
7.50
6.10
6.30
0.295
0.240
0.248
1.27
0.50
0.050
0.002
1.25
1.20
13.80
13.85
1.35
1.40
14.40
14.35
0.049
0.047
0.543
0.545
0.053
0.055
0.567
0.565
H (*)
h
L
L (*)
α
1.20
0.80
0º
1.80
1.10
8º
0.047
0.031
0º
0.070
0.043
8º
α (*)
2º
8º
2º
8º
(*) Muar only POA P013P
B
0.10
A B
10
H
E
E2
E4
1
SEATING
PLANE
DETAIL "A"
e
B
A
C
0.25
D
=
=
=
h
D1
=
SEATING
PLANE
A
F
A1
L
A1
DETAIL "A"
P095A
α
15/17
VND830ASP
PowerSO-10™ SUGGESTED PAD LAYOUT
TUBE SHIPMENT (no suffix)
14.6 - 14.9
CASABLANCA
MUAR
B
10.8- 11
6.30
C
A
C
A
0.67 - 0.73
B
1
2
3
10
9
0.54 - 0.6
All dimensions are in mm.
Base Q.ty Bulk Q.ty Tube length (± 0.5)
8
9.5
7
4
5
1.27
A
B
C (± 0.1)
0.8
6
Casablanca
Muar
50
50
1000
1000
532
532
10.4 16.4
4.9 17.2
0.8
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
600
600
330
1.5
13
20.2
24.4
60
G (+ 2 / -0)
N (min)
T (max)
30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
W
P0 (± 0.1)
P
24
4
Tape Hole Spacing
Component Spacing
Hole Diameter
24
D (± 0.1/-0) 1.5
Hole Diameter
D1 (min)
F (± 0.05)
K (max)
1.5
11.5
6.5
2
Hole Position
Compartment Depth
Hole Spacing
P1 (± 0.1)
All dimensions are in mm.
End
Start
Top
No components
500mm min
Components
No components
cover
tape
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
16/17
1
VND830ASP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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17/17
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