L295 [STMICROELECTRONICS]
DUAL SWITCH-MODE SOLENOID DRIVER; 双开关式电磁驱动器
| 型号： | L295 |
| 厂家： | 
ST |
| 描述： | DUAL SWITCH-MODE SOLENOID DRIVER |
| 文件： | 总8页 (文件大小：114K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
L295
DUAL SWITCH-MODE SOLENOID DRIVER
PRELIMINARY DATA
HIGH CURRENT CAPABILITY (up to 2.5A per
channel)
HIGH VOLTAGE OPERATION (up to 46V for
power stage)
Multiwatt 15
HIGH EFFICIENCYSWITCHMODE OPERATION
REGULATED OUTPUT CURRENT (adjustable)
FEW EXTERNAL COMPONENTS
SEPARATE LOGIC SUPPLY
ORDER CODE : L295
THERMAL PROTECTION
DESCRIPTION
ing technique allowing very efficient operation.
Furthermore, it includes an enable input and dual
supplies (for interfacing with peripherals running at
a higher voltage than the logic).
The L295 is particularly suitable for applications
such as hammer driving in matrix printers, step
motor driving and electromagnet controllers.
The L295 is a monolithic integrated circuit in a 15 -
lead Multiwatt ® package; it incorporates all the
functions for direct interfacing between digital cir-
cuitry and inductive loads. The L295 is designed to
accept standard microprocessor logic levels at the
inputs andcan drive2solenoids. Theoutputcurrent
is completely controlled by means of a switch-
ABSOLUTE MAXIMUM RATINGS
Symbol
Vs
Parameter
Value
50
12
7
Unit
V
Supply voltage
Vss
Logic supply voltage
Enable and input voltage
Reference voltage
V
V
EN, Vi
Vref
Io
V
7
V
Peak output current (each channel)
- non repetitive (t = 100 µsec)
3
A
A
- repetitive (80% on - 20% off; Ton = 10 ms)
- DC operation
2.5
2
25
A
Ptot
W
°C
Total power dissipation (at Tcase = 75 °C
Storage and junction temperature
Tstg, Tj
- 40 to 150
APPLICATION CIRCUIT
March 1993
1/8
L295
CONNECTION DIAGRAM (top view)
BLOCK DIAGRAM
THERMAL DATA
Symbol
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient
Value
3
Unit
°C/W
°C/W
Rth-j-case
Rth-j-amb
max
max
35
2/8
L295
ELECTRICAL CHARACTERISTICS (Refer to the application circuit, Vss = 5V, Vs = 36V; Tj = 25°C; L =
Low; H = High; unless otherwise specified)
Symbol
Parameter
Supply Voltage
Test conditions
Min.
12
Typ.
Max.
46
Unit
V
Vs
Vss
Id
Logic Supply Voltage
4.75
10
V
Quiescent drain current
(from VSS)
VS = 46V; Vi1 = Vi2 = VEN = L
VSS = 10 V
4
mA
Iss
Quiescent drain current
(from VS)
46
mA
V
Vi1,,Vi2 Input Voltage
Low
High
Low
High
-0.3
2.2
0.8
7
VEN
Ii1, Ii2
IEN
Enable Input Voltage
-0.3
2.2
0.8
7
V
Input Current
Vi1 = Vi2 = L
-100
10
-100
10
2
µA
µA
Vi1 = Vi2 = H
VEN = L
Enable Input Current
VEN = H
Vref1
,
Input Reference Voltage
Input Reference Voltage
0.2
1.9
V
Vref2
Iref1
,
-5
µA
I
ref2m
Fosc
Ip
Oscillation Frequency
C = 3.9 nF;
Vref = 1V
25
2
KHz
A/V
R = 9.1 KΩ
Transconductance (each ch.)
2.1
Vref
Vdrop
Total output voltage drop
(each channel) (*)
Io = 2 A
2.8
3.6
2
V
V
Vsens1 External sensing resistors
Vsens2 voltage drop
(*) Vdrop = VCEsat Q1 + VCEsat Q2.
3/8
L295
APPLICATION CIRCUIT
D2, D4 = 2A High speed diodes
D1, D3 = 1A High speed diodes
)
trr ≤ 200 ns
R1 = R2 = 2Ω
L1 = L2 = 5 mH
FUNCTIONAL DESCRIPTION
The L295 incorporates two indipendent driver
channals with separate inputs and outputs, each
capable of driving an inductive load (see block
diagram).
The device is controlled by three micriprocessor
compatible digital inputs and two analog inputs.
current flows in the load according to the exponen-
tial law:
− R1 t
V
R1
I =
( 1 − e
)
L1
These inputs are:
where:
R1 and R2 are the resistance and in-
ductance of the load and V is the volt-
age available on the load (Vs - Vdrop
Vsense).
EN
chip enable (digital input, active low),
enables both channels when in the low
state.
-
Vin1, Vin2 channel inputs (digital inputs, active
high), enable each channel inde-
pendently. A channel is actived when
both EN and the appropriate channel
input are active.
Vref1, Vref2 referce voltages (analog inputs), used
to program the peak load currents.
Peak load current is proportional to Vref
.
The current increases until the voltage on the ex-
ternal sensing resistor, RS1, reaches the reference
voltage, Vref1. This peak current, Ip1, is given by:
V
ref1
Ip1
=
RS1
At this point the comparator output, Vomp1, sete
the RS flip-flop, FF1, that turns off the output tran-
sistor, Q1. The load current flowing throughD2, Q2,
RS1, decreases according to the law:
Since the two channels are identical, only channel
one will be described.
The following description applies also the channel
two, replacing FF2 for FF1, Vref for Vref1 etc.
When the channel is avtivated by low level on the
EN input and a high level on the channel input, Vin2,
the output transistors Q1 and Q2 switch on and
− R1 t
L1
V
VA
R1
A
I = (
+ I ) e
−
p1
R1
where VA = VCEsat Q2 + Vsense + VD2
4/8
L295
If the oscillator pin (9) is connected to ground the
load current falls to zero as shown in fig. 1.
At this time t2 the channel 1 is disabled, by taking
the inputs Vin1 low and/or EN high, and the output
transistor Q2 is turned off. The load current flows
through D2 and D1 according to the law:
The switching frequency depends on the value R
and C, as shown in fig. 4 and must be chosen in
the range 10 to 30 KHz.
It is possible with external hardware to change the
reference voltage Vref in order to obtain a high peak
current Ip and a lower holding current Ih (see fig. 3).
The L295 is provided with a thermal protection that
switches off all the output transistors when the
junction temperature exceeds 150°C. The pres-
enceof ahysteresiscircuitmakestheICworkagain
aftera fall of the junction temperature of about
20°C.
− R1 t
L1
V
VB
B
I = (
+ I ) e
−
T2
R1
R1
where VB = VS + VD1 + VD2
IT2 = current value at the time t2.
The analog input pins (Vref1 , Vref2) can be left open
or connected to Vss; in this case the circuit works
withaninternal referencevoltageofabout2.5Vand
thepeakcurrentintheloadisfixedonlybythevalue
of Rs:
Fig. 2 in shows the current waveform obtained with
an RC network connected between pin 9 and
ground. From to t1 the current increases as in fig.
1. A difference exists at the time t2 because the
current starts to increase again. At this time a pulse
is produced by the oscillator circuit that resets the
flip.flop, FF1, and switches on the outout transistor,
Q1. The current increases until the drop on the
sensing resistor RS1 is equal to Vref1 (t3) and the
cycle repeats.
2.5
Ip
=
RS
SIGNAL WAVEFORMS
Figure 1. Load current waveform with pin 9
connected to GND.
Figure 2. Load current waveform with external
R-C network connected between pin 9 and
ground.
5/8
L295
SIGNAL WAVEFORMS (continued)
Figure 3. With Vref changed by hardware.
Figure 4. Switching frequency vs. values of R
and C.
6/8
L295
MULTIWATT15 PACKAGE MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
5
MIN.
MAX.
A
B
0.197
0.104
0.063
2.65
1.6
C
D
1
0.039
E
0.49
0.66
1.02
17.53
19.6
0.55
0.75
0.019
0.026
0.040
0.690
0.772
0.022
0.030
0.060
0.710
F
G
1.27
1.52
0.050
0.700
G1
H1
H2
L
17.78
18.03
20.2
22.5
22.5
18.1
17.75
10.9
2.9
0.795
0.886
0.886
0.713
0.699
0.429
0.114
0.191
0.218
0.102
0.102
0.152
21.9
21.7
17.65
17.25
10.3
2.65
4.25
4.63
1.9
22.2
22.1
0.862
0.854
0.695
0.679
0.406
0.104
0.167
0.182
0.075
0.075
0.144
0.874
0.870
L1
L2
L3
L4
L7
M
17.5
10.7
0.689
0.421
4.55
5.08
4.85
5.53
2.6
0.179
0.200
M1
S
S1
Dia1
1.9
2.6
3.65
3.85
7/8
L295
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectronics.
© 1994 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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