ICX419ALL_技术文档

ICX419ALL

Diagonal 8mm (Type 1/2) CCD Image Sensor for CCIR B/W Video Cameras

Description

20 pin DIP (Cer-DIP)

The ICX419ALL is an interline CCD solid-state

image sensor suitable for CCIE B/W video cameras

with a diagonal 8mm (Type 1/2) system. Compared

with the current product ICX039DLA, basic

characteristics such as sensitivity, smear, dynamic

range and S/N are improved drastically.

This chip features a field period readout system and

an electronic shutter with variable charge-storage

time. This chip is compatible with the pins of the

ICX039DLA and has the same drive conditions.

Pin 1

2

Features

V

• High sensitivity (+5.0dB compared with the ICX039DLA)

• Low smear (–5.0dB compared with the ICX039DLA)

• High D range (+3.0dB compared with the ICX039DLA)

• High S/N

12

3

H

40

Pin 11

• High resolution and low dark current

• Excellent antiblooming characteristics

• Continuous variable-speed shutter

Optical black position

(Top View)

• Substrate bias:

Adjustment free (external adjustment also possible with 6 to 14V)

• Reset gate pulse: 5Vp-p adjustment free (drive also possible with 0 to 9V)

• Horizontal register: 5V drive

Device Structure

• Interline CCD image sensor

• Optical size:

Diagonal 8mm (Type 1/2)

• Number of effective pixels: 752 (H) × 582 (V) approx. 440K pixels

• Total number of pixels:

• Chip size:

795 (H) × 596 (V) approx. 470K pixels

7.40mm (H) × 5.95mm (V)

• Unit cell size:

• Optical black:

8.6µm (H) × 8.3µm (V)

Horizontal (H) direction: Front 3 pixels, rear 40 pixels

Vertical (V) direction:

Horizontal 22

Front 12 pixels, rear 2 pixels

• Number of dummy bits:

• Substrate material:

Vertical 1 (even fields only)

Silicon

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by

any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the

operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

– 1 –

E01506B41

ICX419ALL

USE RESTRICTION NOTICE (December 1, 2003 ver.)

This USE RESTRICTION NOTICE ("Notice") is for customers who are considering or currently using the CCD

products ("Products") set forth in this specifications book. Sony Corporation ("Sony") may, at any time, modify

this Notice which will be available to you in the latest specifications book for the Products.You should abide by

the latest version of this Notice. If a Sony subsidiary or distributor has its own use restriction notice on the

Products, such a use restriction notice will additionally apply between you and the subsidiary or distributor.You

should consult a sales representative of the subsidiary or distributor of Sony on such a use restriction notice

when you consider using the Products.

Use Restrictions

• The Products are intended for incorporation into such general electronic equipment as office products,

communication products, measurement products, and home electronics products in accordance with the

terms and conditions set forth in this specifications book and otherwise notified by Sony from time to time.

• You should not use the Products for critical applications which may pose a life- or injury- threatening risk or

are highly likely to cause significant property damage in the event of failure of the Products. You should

consult your Sony sales representative beforehand when you consider using the Products for such critical

applications. In addition, you should not use the Products in weapon or military equipment.

• Sony disclaims and does not assume any liability and damages arising out of misuse, improper use,

modification, use of the Products for the above-mentioned critical applications, weapon and military

equipment, or any deviation from the requirements set forth in this specifications book.

Design for Safety

• Sony is making continuous efforts to further improve the quality and reliability of the Products; however,

failure of a certain percentage of the Products is inevitable. Therefore, you should take sufficient care to

ensure the safe design of your products such as component redundancy, anti-conflagration features, and

features to prevent mis-operation in order to avoid accidents resulting in injury or death, fire or other social

damage as a result of such failure.

Export Control

• If the Products are controlled items under the export control laws or regulations of various countries, approval

may be required for the export of the Products under the said laws or regulations.You should be responsible

for compliance with the said laws or regulations.

No License Implied

• The technical information shown in this specifications book is for your reference purposes only. The

availability of this specifications book shall not be construed as giving any indication that Sony and its

licensors will license any intellectual property rights in such information by any implication or otherwise. Sony

will not assume responsibility for any problems in connection with your use of such information or for any

infringement of third-party rights due to the same. It is therefore your sole legal and financial responsibility to

resolve any such problems and infringement.

Governing Law

• This Notice shall be governed by and construed in accordance with the laws of Japan, without reference to

principles of conflict of laws or choice of laws. All controversies and disputes arising out of or relating to this

Notice shall be submitted to the exclusive jurisdiction of the Tokyo District Court in Japan as the court of first

instance.

Other Applicable Terms and Conditions

• The terms and conditions in the Sony additional specifications, which will be made available to you when you

order the Products, shall also be applicable to your use of the Products as well as to this specifications book.

You should review those terms and conditions when you consider purchasing and/or using the Products.

– 2 –

ICX419ALL

Block Diagram and Pin Configuration

(Top View)

10

9

8

7

6

5

4

3

2

1

Note)

Horizontal Register

Note)

: Photo sensor

11

12

13

14

15

16

17

18

19

20

Pin Description

Pin No. Symbol

Description

Pin No. Symbol

Description

1

2

Vφ4

Vertical register transfer clock

Substrate clock

11

12

13

14

15

16

17

18

19

20

NC

Vφ3

VDSUB

NC

Substrate bias circuit supply voltage

3

Vφ2

4

φSUB

GND

Vφ1

GND

RD

GND

5

GND

6

Vertical register transfer clock

Protective transistor bias

GND

Reset drain bias

Reset gate clock

7

VL

φRG

8

GND

V^DD

VOUT

NC

9

Output circuit supply voltage

Signal output

Hφ¹

Hφ2

Horizontal register transfer clock

10

– 3 –

ICX419ALL

Absolute Maximum Ratings

Item

Substrate clock φSUB – GND

Ratings

–0.3 to +50

–0.3 to +18

–55 to +10

–15 to +20

to +10

Unit

V

Remarks

VDD, VRD, VDSUB, VOUT – GND

V

Supply voltage

VDD, VRD, VDSUB, VOUT – φSUB

Vφ1, Vφ2, Vφ3, Vφ4 – GND

Vφ¹, Vφ2, Vφ3, Vφ4 – φSUB

V

Clock input voltage

V

∗¹

Voltage difference between vertical clock input pins

Voltage difference between horizontal clock input pins

Hφ¹, Hφ2 – Vφ4

to +15

V

to +17

V

–17 to +17

–10 to +15

–55 to +10

–65 to +0.3

–0.3 to +30

–30 to +80

–10 to +60

V

φRG – GND

V

φ^RG– φSUB

V

VL – φSUB

V

Pins other than GND and φSUB – VL

Storage temperature

V

°C

Operating temperature

∗1

+27V (Max.) when clock width < 10µs, clock duty factor < 0.1%.

– 4 –

ICX419ALL

Bias Conditions 1 [when used in substrate bias internal generation mode]

Item

Output circuit supply voltage

Reset drain voltage

Symbol Min.

Typ. Max. Unit

Remarks

VDD

VRD

VL

14.55 15.0 15.45 V

14.55 15.0 15.45

V

VRD = VDD

∗¹

Protective transistor bias

Substrate bias circuit supply voltage

Substrate clock

VDSUB

φSUB

14.55

15.45

15.0

∗²

∗¹

VL setting is the VVL voltage of the vertical transfer clock waveform, or the same supply voltage as the VL

power supply for the V driver should be used. (When CXD1267AN is used.)

∗2

Do not apply a DC bias to the substrate clock pin, because a DC bias is generated within the CCD.

Bias Conditions 2 [when used in substrate bias external adjustment mode]

Item

Symbol Min.

Typ. Max. Unit

Remarks

Output circuit supply voltage

Reset drain voltage

VDD

14.55 15.0 15.45 V

VRD

14.55 15.0 15.45

V

VRD = VDD

∗³

∗⁴

Protective transistor bias

VL

Substrate bias circuit supply voltage

Substrate voltage adjustment range

Substrate voltage adjustment precision

VDSUB

VSUB

∆VSUB

∗⁵

6.0

–3

14.0

+3

V

%

∗³

VL setting is the VVL voltage of the vertical transfer clock waveform, or the same supply voltage as the VL

power supply for the V driver should be used. (When CXD1267AN is used.)

Connect to GND or leave open.

∗4

∗5

The setting value of the substrate voltage (VSUB) is indicated on the back of the image sensor by a

special code. When adjusting the substrate voltage externally, adjust the substrate voltage to the indicated

voltage. The adjustment precision is ±3%. However, this setting value has not significance when used in

substrate bias internal generation mode.

VSUB code — one character indication

Code and optimal setting correspond to each other as follows.

VSUB code

E

f

G

h

J

K

L

m

N

P

Q

R

S

T

U

V

W

Optimal setting 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0

<Example> "L" → VSUB = 9.0V

DC Characteristics

Item

Symbol Min.

Typ.

5.0

Max.

10.0

Unit

mA

Remarks

Output circuit supply current

IDD

– 5 –

ICX419ALL

Clock Voltage Conditions

Waveform

diagram

Item

Symbol

Min. Typ. Max. Unit

Remarks

Readout clock voltage VVT

14.55 15.0 15.45

V

1

2

VVH1, VVH2

VVH3, VVH4

–0.05

–0.2

0

0.05

V^VH= (VVH1 + VVH2)/2

VVL1, VVL2,

VVL3, VVL4

–9.6 –9.0 –8.5

V

V^VL= (VVL3 + VVL4)/2

2

VφV

8.3

9.0 9.65 Vp-p

Vφ = VVHn – VVLn (n = 1 to 4)

V

2

3

4

5

| VVH1 – VVH2 |

VVH3 – VVH

VVH4 – VVH

VVHH

0.1

0.5

V

Vertical transfer clock

voltage

–0.25

High-level coupling

Low-level coupling

VVHL

VVLH

VVLL

VφH

4.75 5.0 5.25 Vp-p

Horizontal transfer

clock voltage

VHL

–0.05

0

0.05

V

1

∗

VRGL

Reset gate clock

VφRG

4.5

5.0

5.5 Vp-p

0.8

23.0 24.0 25.0 Vp-p

∗¹

voltage

VRGLH – VRGLL

VφSUB

V

Low-level coupling

Substrate clock voltage

∗¹

Input the reset gate clock without applying a DC bias. In addition, the reset gate clock can also be driven

with the following specifications.

Waveform

diagram

Item

Symbol

Min. Typ. Max. Unit

Remarks

VRGL

VφRG

–0.2

8.5

0

0.2

V

4

Reset gate clock

voltage

9.0

9.5 Vp-p

– 6 –

ICX419ALL

Clock Equivalent Circuit Constant

Symbol

CφV1, CφV3

CφV2, CφV4

CφV12, CφV34

CφV23, CφV41

CφH1

Typ.

3300

820

330

120

91

Item

Min.

Max. Unit

Remarks

pF

Ω

Capacitance between vertical transfer clock

and GND

Capacitance between vertical transfer clocks

Capacitance between horizontal transfer clock

and GND

CφH2

CφHH

47

Capacitance between horizontal transfer clocks

Capacitance between reset gate clock and GND

Capacitance between substrate clock and GND

CφRG

11

CφSUB

680

75

R1, R3

Vertical transfer clock series resistor

Vertical transfer clock ground resistor

Ω

R2, R4

82

Ω

RGND

68

Vφ

2

Vφ

1

CφV12

R1

R2

Hφ1

Hφ2

CφHH

CφV1

CφV2

CφV41

CφV23

CφH2

CφH1

RGND

CφV3

CφV4

R4

R3

CφV34

Vφ

4

Vφ

3

Vertical transfer clock equivalent circuit

Horizontal transfer clock equivalent circuit

– 7 –

ICX419ALL

Drive Clock Waveform Conditions

(1) Readout clock waveform

100%

90%

VVT

φM

2

10%

0%

0V

tr

twh

tf

(2) Vertical transfer clock waveform

Vφ1

Vφ3

VVH1

VVHH

VVH

VVHH

VVHL

VVH3

VVL1

VVL3

VVLH

VVLL

VVL

Vφ2

Vφ4

VVHH

VVH4

VVHH

VVH

VVHL

VVH2

VVLH

_VVL2VVLH

VVLL

VVL4

VVL

V^VH= (VVH1 + VVH2)/2

VVL = (VVL3 + VVL4)/2

VφV = VVHn – VVLn (n = 1 to 4)

– 8 –

ICX419ALL

(3) Horizontal transfer clock waveform

tr

twh

tf

90%

10%

Vφ

H

twl

VHL

tr

twh

tf

(4) Reset gate clock waveform

VRGH

twl

Vφ^RG

Point A

RG waveform

VRGL + 0.5V

VRGLH

VRGL

VRGLL

VRGLm

Hφ1

waveform

+2.5V

V^RGLHis the maximum value and VRGLL is the minimum value of the coupling waveform during the period from

Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and

VRGLL.

VRGL = (VRGLH + VRGLL)/2

Assuming VRGH is the minimum value during the period twh, then:

VφRG = VRGH – VRGL

Negative overshoot level during the falling edge of RG is VRGLm.

(5) Substrate clock waveform

100%

90%

φM

VφSUB

φM

2

10%

V^SUB

0%

tr

twh

tf

– 9 –

ICX419ALL

Clock Switching Characteristics

twh

twl

tr

tf

Symbol

V^T

Item

Unit

Remarks

Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.

Readout clock

2.3 2.5

0.5

15

µs During readout

Vertical transfer Vφ1, Vφ2,

∗1

∗2

250 ns

clock

Vφ³, Vφ4

During

imaging

Hφ

20

15 19

15 19 ns

During

parallel-serial

conversion

5.38

0.01

µs

Hφ1

Hφ2

5.38

51

0.01

ns

µs

11 13

1.5 1.8

3

Reset gate clock φRG

When draining

charge

φSUB

0.5

Substrate clock

∗¹

∗²

When vertical transfer clock driver CXD1267AN is used.

tf ≥ tr – 2ns.

two

Symbol

Item

Horizontal transfer clock

Unit Remarks

∗³

Min. Typ. Max.

16 20

Hφ1, Hφ2

ns

∗3

The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.

– 10 –

ICX419ALL

Image Sensor Characteristics

Item Symbol Min.

Sensitivity

(Ta = 25°C)

Measurement

method

Typ.

Max. Unit

Remarks

S

880

1100

mV

1

2

3

4

5

6

7

8

Saturation signal

Smear

Ysat

Sm

1000

Ta = 60°C

–115

–105

20

25

2

dB

%

Zone 0 and I

Zone 0 to II'

Ta = 60°C

SH

Video signal shading

%

Vdt

∆Vdt

F

mV

%

Dark signal

Dark signal shading

Flicker

1

Ta = 60°C

2

Lag

0.5

%

Lag

Zone Definition of Video Signal Shading

752 (H)

14

12

V

10

H

8

H

8

582 (V)

Zone 0, I

Zone II, II'

10

Ignored region

V

10

Effective pixel region

– 11 –

ICX419ALL

Image Sensor Characteristics Measurement Method

Measurement conditions

1) In the following measurements, the device drive conditions are at the typical values of the bias and clock

voltage conditions. (when used with substrate bias external adjustment, set the substrate voltage to the

value indicated on the device.)

2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical

black level (OB) is used as the reference for the signal output, which is taken as the value of Y signal output

or chroma signal output of the measurement system.

Definition of standard imaging conditions

1) Standard imaging condition I:

Use a pattern box (luminance 706cd/m², color temperature of 3200K halogen source) as a subject. (Pattern

for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and

image at F8. The luminous intensity to the sensor receiving surface at this point is defined as the standard

sensitivity testing luminous intensity.

2) Standard imaging condition II:

Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.

Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted

to the value indicated in each testing item by the lens diaphragm.

1. Sensitivity

Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of

1/250s, measure the signal output (Vs) at the center of the screen and substitute the value into the

following formula.

250

50

S = Vs ×

[mV]

2. Saturation signal

Set to standard imaging condition II. After adjusting the luminous intensity to 10 times the intensity with

average value of the signal output, 200mV, measure the minimum value of the signal output.

3. Smear

Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity to

500 times the intensity with average value of the signal output, 200mV. When the readout clock is stopped

and the charge drain is executed by the electronic shutter at the respective H blankings, measure the

maximum value VSm [mV] of the signal output and substitute the value into the following formula.

1

500

1

10

VSm

200

×

Sm = 20 × log

[dB] (1/10V method conversion value)

4. Video signal shading

Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so

that the average value of the signal output is 200mV. Then measure the maximum (Vmax [mV]) and

minimum (Vmin [mV]) values of the signal output and substitute the values into the following formula.

SH = (Vmax – Vmin)/200 × 100 [%]

– 12 –

ICX419ALL

5. Dark signal

Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60°C and

the device in the light-obstructed state, using the horizontal idle transfer level as a reference.

6. Dark signal shading

After measuring 5, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark

signal output and substitute the values into the following formula.

∆Vdt = Vdmax – Vdmin [mV]

7. Flicker

Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the signal

output is 200mV, and then measure the difference in the signal level between fields (∆Vf [mV]). Then

substitute the value into the following formula.

Fy = (∆Vf/200) × 100 [%]

10. Lag

Adjust the signal output value generated by strobe light to 200mV. After setting the strobe light so that it

strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following

formula.

Lag = (Vlag/200) × 100 [%]

FLD

V1

Light

Strobe light

timing

signal output 200mV

Ylag (lag)

Output

– 13 –

ICX419ALL

N C

D S V U B

N C

O U V T

D D V

G N D

L V

G N D

¹φ V

G N D

R D

S U φ B

^Rφ ^G

N C

¹φ H

²φ H

²φ V

³φ V

⁴φ V

– 14 –

ICX419ALL

N C

^{D S}V ^{U B}

N C

O U V T

^{D D}V

G N D

^LV

¹φ V

G N D

R D

S U φ B

^Rφ ^G

N C

¹φ H

²φ H

²φ V

³φ V

⁴φ V

– 15 –

ICX419ALL

Spectral Sensitivity Characteristics (Excludes lens characteristics and light source characteristics)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

400

500

600

700

800

900

1000

Wave Length [nm]

Sensor Readout Clock Timing Chart

V1

V2

2.5

Odd Field

V3

V4

1.5

2.6 2.5 2.5

33.6

0.2

V1

V2

Even Field

V3

V4

Unit: µs

– 16 –

ICX419ALL

3 4 0

3 3 5

3 3 0

3 2 5

3 2 0

3 1 5

3 1 0

2 5

2 0

1 5

1 0

5

4

3

2

1

6 2 5

6 2 0

– 17 –

ICX419ALL

2 0

1 0

3

2

1

3

2

1

2 2

2 0

1 0

5

3

2

1

4 0

3 0

2 0

1 0

5

3

1

7 5 2

7 5 0

7 4 5

– 18 –

ICX419ALL

Notes on Handling

1) Static charge prevention

CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following

protective measures.

a) Either handle bare handed or use non-chargeable gloves, clothes or material.

Also use conductive shoes.

b) When handling directly use an earth band.

c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.

d) Ionized air is recommended for discharge when handling CCD image sensor.

e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.

2) Soldering

a) Make sure the package temperature does not exceed 80°C.

b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W

soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently.

c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering

tool, use a thermal controller of the zero cross On/Off type and connect it to ground.

3) Dust and dirt protection

Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and

dirt. Clean glass plates with the following operation as required, and use them.

a) Perform all assembly operations in a clean room (class 1000 or less).

b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should

dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized

air is recommended.)

c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass.

d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when

moving to a room with great temperature differences.

e) When a protective tape is applied before shipping, just before use remove the tape applied for

electrostatic protection. Do not reuse the tape.

4) Installing (attaching)

a) Remain within the following limits when applying a static load to the package. Do not apply any load more

than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited

portions. (This may cause cracks in the package.)

39N

29N

0.9Nm

Upper ceramic

Low melting

point glass

Lower ceramic

Compressive strength

Shearing strength

Tensile strength

Torsional strength

b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the

package may fracture, etc., depending on the flatness of the ceramic portions. Therefore, for installation,

use either an elastic load, such as a spring plate, or an adhesive.

– 19 –

ICX419ALL

c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated

voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area,

and indicated values should be transferred to other locations as a precaution.

d) The upper and lower ceramic are joined by low melting point glass. Therefore, care should be taken not to

perform the following actions as this may cause cracks.

• Applying repeated bending stress to the outer leads.

• Heating the outer leads for an extended period with a soldering iron.

• Rapidly cooling or heating the package.

• Applying any load or impact to a limited portion of the low melting point glass using tweezers or other

sharp tools.

• Prying at the upper or lower ceramic using the low melting point glass as a fulcrum.

Note that the same cautions also apply when removing soldered products from boards.

e) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyano-

acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference)

5) Others

a) Do not expose to strong light (sun rays) for long periods. For continuous using under cruel condition

exceeding the normal using condition, consult our company.

b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or

usage in such conditions.

– 20 –

ICX419ALL

( 4 . 0 )

1 . 4

0 ˚ t o 9 ˚

3 . 2 6 ± 0 . 3

0 . 7 0

4 . 0 ± 0 . 3

1 5 . 2 4

1 . 2 7

1 5 . 1 ± 0 . 3

0 . 4

7 . 5 5

0 . 5 1

1 1 . 5 5

3

0 . 5 5

3

~

Sony Corporation

– 21 –


型号：	ICX419ALL
厂家：	SONY CORPORATION
描述：	Diagonal 8mm (Type 1/2) CCD Image Sensor for CCIR B/W Video Cameras 为CCIR B / W视频摄像机对角线8毫米（ 1/2型） CCD图像传感器传感器换能器图像传感器 CD 摄像机
文件：	总21页 (文件大小：195K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ICX419ALL [SONY]

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