ICX418AKB [SONY]
Diagonal 8mm (Type 1/2) CCD Image Sensor for NTSC Color Video Cameras; 对于NTSC彩色视频摄像机对角线8毫米( 1/2型) CCD图像传感器![ICX418AKB](http://pdffile.icpdf.com/pdf1/p00097/img/icpdf/ICX418AKB_516551_icpdf.jpg)
型号: | ICX418AKB |
厂家: | ![]() |
描述: | Diagonal 8mm (Type 1/2) CCD Image Sensor for NTSC Color Video Cameras |
文件: | 总21页 (文件大小:224K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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ICX418AKB
Diagonal 8mm (Type 1/2) CCD Image Sensor for NTSC Color Video Cameras
Description
16 pin DIP (Ceramic)
The ICX418AKB is an interline CCD solid-state
image sensor suitable for NTSC color video cameras
with a diagonal 8mm (Type 1/2) system. Compared
with the current product ICX038DNB, basic
characteristics such as sensitivity, smear, dynamic
range and S/N are improved drastically.
This chip features a field period readout system and
an electronic shutter with variable charge-storage
time. Also, this outline is miniaturized by using
Pin 1
original package. This chip is compatible with the
2
pins of the ICX038DNB and has the same drive
conditions.
V
Features
• High sensitivity (+6.0dB compared with the ICX038DNB)
• Low smear (–5.0dB compared with the ICX038DNB)
• High D range (+2.0dB compared with the ICX038DNB)
• High S/N
12
3
H
40
Pin 9
Optical black position
(Top View)
• High resolution and low dark current
• Excellent antiblooming characteristics
• Ye, Cy, Mg, and G complementary color mosaic filters on chip
• Continuous variable-speed shutter
• Substrate bias:
Adjustment free (external adjustment also possible with 6 to 14V)
5Vp-p adjustment free (drive also possible with 0 to 9V)
5V drive
• Reset gate pulse:
• Horizontal register:
• Maximum package dimensions: φ13.2mm
Device Structure
• Interline CCD image sensor
• Optical size:
Diagonal 8mm (Type 1/2)
• Number of effective pixels: 768 (H) × 494 (V) approx. 380K pixels
• Total number of pixels:
• Chip size:
811 (H) × 508 (V) approx. 410K pixels
7.40mm (H) × 5.95mm (V)
• Unit cell size:
• Optical black:
8.4µm (H) × 9.8µm (V)
Horizontal (H) direction: Front 3 pixels, rear 40 pixels
Vertical (V) direction:
Horizontal 22
Front 12 pixels, rear 2 pixels
• Number of dummy bits:
• Substrate material:
Vertical 1 (even fields only)
Silicon
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E01907A41
ICX418AKB
USE RESTRICTION NOTICE (December 1, 2003 ver.)
This USE RESTRICTION NOTICE ("Notice") is for customers who are considering or currently using the CCD
products ("Products") set forth in this specifications book. Sony Corporation ("Sony") may, at any time, modify
this Notice which will be available to you in the latest specifications book for the Products.You should abide by
the latest version of this Notice. If a Sony subsidiary or distributor has its own use restriction notice on the
Products, such a use restriction notice will additionally apply between you and the subsidiary or distributor.You
should consult a sales representative of the subsidiary or distributor of Sony on such a use restriction notice
when you consider using the Products.
Use Restrictions
• The Products are intended for incorporation into such general electronic equipment as office products,
communication products, measurement products, and home electronics products in accordance with the
terms and conditions set forth in this specifications book and otherwise notified by Sony from time to time.
• You should not use the Products for critical applications which may pose a life- or injury- threatening risk or
are highly likely to cause significant property damage in the event of failure of the Products. You should
consult your Sony sales representative beforehand when you consider using the Products for such critical
applications. In addition, you should not use the Products in weapon or military equipment.
• Sony disclaims and does not assume any liability and damages arising out of misuse, improper use,
modification, use of the Products for the above-mentioned critical applications, weapon and military
equipment, or any deviation from the requirements set forth in this specifications book.
Design for Safety
• Sony is making continuous efforts to further improve the quality and reliability of the Products; however,
failure of a certain percentage of the Products is inevitable. Therefore, you should take sufficient care to
ensure the safe design of your products such as component redundancy, anti-conflagration features, and
features to prevent mis-operation in order to avoid accidents resulting in injury or death, fire or other social
damage as a result of such failure.
Export Control
• If the Products are controlled items under the export control laws or regulations of various countries, approval
may be required for the export of the Products under the said laws or regulations. You should be responsible
for compliance with the said laws or regulations.
No License Implied
• The technical information shown in this specifications book is for your reference purposes only. The
availability of this specifications book shall not be construed as giving any indication that Sony and its
licensors will license any intellectual property rights in such information by any implication or otherwise. Sony
will not assume responsibility for any problems in connection with your use of such information or for any
infringement of third-party rights due to the same. It is therefore your sole legal and financial responsibility to
resolve any such problems and infringement.
Governing Law
• This Notice shall be governed by and construed in accordance with the laws of Japan, without reference to
principles of conflict of laws or choice of laws. All controversies and disputes arising out of or relating to this
Notice shall be submitted to the exclusive jurisdiction of the Tokyo District Court in Japan as the court of first
instance.
Other Applicable Terms and Conditions
• The terms and conditions in the Sony additional specifications, which will be made available to you when you
order the Products, shall also be applicable to your use of the Products as well as to this specifications book.
You should review those terms and conditions when you consider purchasing and/or using the Products.
– 2 –
ICX418AKB
Block Diagram and Pin Configuration
(Top View)
8
7
6
5
4
3
2
1
Ye
G
Cy
Mg
Cy
G
Ye
G
Cy
Mg
Cy
Ye
Ye
Mg
Mg
G
Cy
Mg
Ye
G
Cy
Mg
Ye
G
Note)
Horizontal Register
Note)
: Photo sensor
9
10
11
12
13
14
15
16
Pin Description
Pin No. Symbol
Description
Pin No. Symbol
Description
1
2
3
4
5
6
7
8
Vφ4
Vφ3
Vφ2
φSUB
Vφ1
VL
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Substrate clock
9
NC
10
11
12
13
14
15
16
NC
GND
RD
GND
Reset drain bias
Reset gate clock
Vertical register transfer clock
Protective transistor bias
Output circuit supply voltage
Signal output
φRG
VDSUB
Hφ1
Hφ2
Substrate bias circuit supply voltage
Horizontal register transfer clock
Horizontal register transfer clock
VDD
VOUT
– 3 –
ICX418AKB
Absolute Maximum Ratings
Item
Substrate clock φSUB – GND
Ratings
–0.3 to +50
–0.3 to +18
–55 to +10
–15 to +20
to +10
Unit
V
Remarks
VDD, VRD, VDSUB, VOUT – GND
V
Supply voltage
VDD, VRD, VDSUB, VOUT – φSUB
Vφ1, Vφ2, Vφ3, Vφ4 – GND
Vφ1, Vφ2, Vφ3, Vφ4 – φSUB
V
V
Clock input voltage
V
∗1
Voltage difference between vertical clock input pins
Voltage difference between horizontal clock input pins
Hφ1, Hφ2 – Vφ4
to +15
V
to +17
V
–17 to +17
–10 to +15
–55 to +10
–65 to +0.3
–0.3 to +30
–30 to +80
–10 to +60
V
φRG – GND
V
φRG – φSUB
V
VL – φSUB
V
Pins other than GND and φSUB – VL
Storage temperature
V
°C
°C
Operating temperature
∗1
+27V (Max.) when clock width < 10µs, clock duty factor < 0.1%.
– 4 –
ICX418AKB
Bias Conditions 1 [when used in substrate bias internal generation mode]
Item
Output circuit supply voltage
Reset drain voltage
Symbol Min.
Typ. Max. Unit
Remarks
VDD
VRD
VL
14.55 15.0 15.45 V
14.55 15.0 15.45
V
V
VRD = VDD
∗1
Protective transistor bias
Substrate bias circuit supply voltage
Substrate clock
VDSUB
φSUB
14.55
15.45
15.0
∗2
∗1
VL setting is the VVL voltage of the vertical transfer clock waveform, or the same supply voltage as the VL
power supply for the V driver should be used. (When CXD1267AN is used.)
∗2
Do not apply a DC bias to the substrate clock pin, because a DC bias is generated within the CCD.
Bias Conditions 2 [when used in substrate bias external adjustment mode]
Item
Symbol Min.
Typ. Max. Unit
Remarks
Output circuit supply voltage
Reset drain voltage
VDD
14.55 15.0 15.45 V
VRD
14.55 15.0 15.45
V
VRD = VDD
∗3
∗4
Protective transistor bias
VL
Substrate bias circuit supply voltage
Substrate voltage adjustment range
Substrate voltage adjustment precision
VDSUB
VSUB
∆VSUB
∗5
∗5
6.0
–3
14.0
+3
V
%
∗3
VL setting is the VVL voltage of the vertical transfer clock waveform, or the same supply voltage as the VL
power supply for the V driver should be used. (When CXD1267AN is used.)
Connect to GND or leave open.
∗4
∗5
The setting value of the substrate voltage (VSUB) is indicated on the back of the image sensor by a
special code. When adjusting the substrate voltage externally, adjust the substrate voltage to the indicated
voltage. The adjustment precision is ±3%. However, this setting value has not significance when used in
substrate bias internal generation mode.
VSUB code — one character indication
Code and optimal setting correspond to each other as follows.
VSUB code
E
f
G
h
J
K
L
m
N
P
Q
R
S
T
U
V
W
Optimal setting 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0
<Example> "L" → VSUB = 9.0V
DC Characteristics
Item
Symbol Min.
Typ.
5.0
Max.
10.0
Unit
mA
Remarks
Output circuit supply current
IDD
– 5 –
ICX418AKB
Clock Voltage Conditions
Waveform
diagram
Item
Symbol
Min. Typ. Max. Unit
Remarks
Readout clock voltage VVT
14.55 15.0 15.45
V
V
V
1
2
2
VVH1, VVH2
VVH3, VVH4
–0.05
–0.2
0
0
0.05
0.05
VVH = (VVH1 + VVH2)/2
VVL1, VVL2,
VVL3, VVL4
–9.6 –9.0 –8.5
V
VVL = (VVL3 + VVL4)/2
2
VφV
8.3
9.0 9.65 Vp-p
Vφ = VVHn – VVLn (n = 1 to 4)
V
2
2
2
2
2
2
2
2
3
3
4
4
4
5
| VVH1 – VVH2 |
VVH3 – VVH
VVH4 – VVH
VVHH
0.1
0.1
0.1
0.5
0.5
0.5
0.5
V
V
V
V
V
V
V
Vertical transfer clock
voltage
–0.25
–0.25
High-level coupling
High-level coupling
Low-level coupling
Low-level coupling
VVHL
VVLH
VVLL
VφH
4.75 5.0 5.25 Vp-p
Horizontal transfer
clock voltage
VHL
–0.05
0
0.05
V
V
1
∗
VRGL
Reset gate clock
VφRG
4.5
5.0
5.5 Vp-p
0.8
23.0 24.0 25.0 Vp-p
∗1
voltage
VRGLH – VRGLL
VφSUB
V
Low-level coupling
Substrate clock voltage
∗1
Input the reset gate clock without applying a DC bias. In addition, the reset gate clock can also be driven
with the following specifications.
Waveform
diagram
Item
Symbol
Min. Typ. Max. Unit
Remarks
VRGL
VφRG
–0.2
8.5
0
0.2
V
4
4
Reset gate clock
voltage
9.0
9.5 Vp-p
– 6 –
ICX418AKB
Clock Equivalent Circuit Constant
Symbol
CφV1, CφV3
CφV2, CφV4
CφV12, CφV34
CφV23, CφV41
CφH1
Typ.
2700
2700
820
330
100
91
Item
Min.
Max. Unit
Remarks
pF
pF
pF
pF
pF
pF
pF
pF
pF
Ω
Capacitance between vertical transfer clock
and GND
Capacitance between vertical transfer clocks
Capacitance between horizontal transfer clock
and GND
CφH2
CφHH
47
Capacitance between horizontal transfer clocks
Capacitance between reset gate clock and GND
Capacitance between substrate clock and GND
CφRG
11
CφSUB
680
91
R1, R3
Vertical transfer clock series resistor
Vertical transfer clock ground resistor
Ω
R2, R4
100
68
Ω
RGND
Vφ
2
Vφ
1
CφV12
R1
R2
Hφ1
Hφ2
CφHH
CφV1
CφV2
CφV41
CφV23
CφH2
CφH1
RGND
CφV3
CφV4
R4
R3
CφV34
Vφ
4
Vφ
3
Vertical transfer clock equivalent circuit
Horizontal transfer clock equivalent circuit
– 7 –
ICX418AKB
Drive Clock Waveform Conditions
(1) Readout clock waveform
100%
90%
VVT
φM
φM
2
10%
0%
0V
tr
twh
tf
(2) Vertical transfer clock waveform
Vφ1
Vφ3
VVH1
VVHH
VVHH
VVH
VVH
VVHH
VVHH
VVHL
VVHL
VVHL
VVHL
VVH3
VVL1
VVL3
VVLH
VVLH
VVLL
VVLL
VVL
VVL
Vφ2
Vφ4
VVHH
VVHH
VVH4
VVHH
VVHH
VVH
VVH
VVHL
VVHL
VVHL
VVHL
VVH2
VVLH
VVL2VVLH
VVLL
VVLL
VVL4
VVL
VVL
VVH = (VVH1 + VVH2)/2
VVL = (VVL3 + VVL4)/2
VφV = VVHn – VVLn (n = 1 to 4)
– 8 –
ICX418AKB
(3) Horizontal transfer clock waveform
tr
twh
tf
90%
10%
Vφ
H
twl
VHL
tr
twh
tf
(4) Reset gate clock waveform
VRGH
twl
VφRG
Point A
RG waveform
VRGL + 0.5V
VRGLH
VRGL
VRGLL
VRGLm
Hφ1
waveform
+2.5V
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from
Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and
VRGLL.
VRGL = (VRGLH + VRGLL)/2
Assuming VRGH is the minimum value during the period twh, then:
VφRG = VRGH – VRGL
Negative overshoot level during the falling edge of RG is VRGLm.
(5) Substrate clock waveform
100%
90%
φM
VφSUB
φM
2
10%
VSUB
0%
tr
twh
tf
– 9 –
ICX418AKB
Clock Switching Characteristics
twh
twl
tr
tf
Symbol
VT
Item
Unit
Remarks
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Readout clock
2.3 2.5
0.5
0.5
15
µs During readout
Vertical transfer Vφ1, Vφ2,
∗1
∗2
250 ns
clock
Vφ3, Vφ4
During
imaging
Hφ
20
20
15 19
15 19 ns
During
parallel-serial
conversion
5.38
0.01
0.01
0.01
µs
Hφ1
Hφ2
5.38
51
0.01
ns
µs
11 13
1.5 1.8
3
3
Reset gate clock φRG
When draining
charge
φSUB
0.5
0.5
Substrate clock
∗1
∗2
When vertical transfer clock driver CXD1267AN is used.
tf ≥ tr – 2ns.
two
Symbol
Item
Horizontal transfer clock
Unit Remarks
∗3
Min. Typ. Max.
16 20
Hφ1, Hφ2
ns
∗3
The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.
– 10 –
ICX418AKB
Image Sensor Characteristics
Item Symbol Min.
Sensitivity
(Ta = 25°C)
Measurement
method
Typ.
Max. Unit
Remarks
S
1040
1000
1300
mV
mV
1
2
3
4
4
5
5
6
7
8
8
8
9
9
9
9
10
Saturation signal
Smear
Ysat
Sm
Ta = 60°C
–115
–105
20
25
10
10
2
dB
%
Zone 0 and I
Zone 0 to II'
SHy
Video signal shading
%
∆Sr
∆Sb
Ydt
∆Ydt
Fy
%
Uniformity between
video signal channels
%
mV
mV
%
Ta = 60°C
Ta = 60°C
Dark signal
Dark signal shading
Flicker Y
1
2
Fcr
5
%
Flicker R-Y
Flicker B-Y
Line crawl R
Line crawl G
Line crawl B
Line crawl W
Lag
Fcb
Lcr
5
%
3
%
Lcg
Lcb
Lcw
Lag
3
%
3
%
3
%
0.5
%
Zone Definition of Video Signal Shading
768 (H)
14
14
12
V
10
H
8
H
8
494 (V)
Zone 0, I
Zone II, II'
10
Ignored region
Effective pixel region
V
10
Measurement System
∗
[ Y]
Y signal output
∗
[ A]
CCD signal output
LPF1
(3dB down 6.3MHz)
CCD
C.D.S
AMP
∗
[ C]
S/H
S/H
LPF2
(3dB down 1MHz)
Chroma signal output
∗
∗
∗
∗
Note) Adjust the amplifier gain so that the gain between [ A] and [ Y], and between [ A] and [ C] equals 1.
– 11 –
ICX418AKB
Image Sensor Characteristics Measurement Method
Measurement conditions
1) In the following measurements, the device drive conditions are at the typical values of the bias and clock
voltage conditions. (when used with substrate bias external adjustment, set the substrate voltage to the
value indicated on the device.)
2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical
black level (OB) is used as the reference for the signal output, which is taken as the value of Y signal output
or chroma signal output of the measurement system.
Color coding of this image sensor & Composition of luminance (Y) and chroma (color difference) signals
Cy
G
Ye
Mg
Ye
G
Cy
G
Ye
Mg
Ye
G
As shown in the left figure, fields are read out. The charge is
mixed by pairs such as A1 and A2 in the A field. (pairs such
as B in the B field)
A1
A2
B
Cy
Mg
Cy
Mg
As a result, the sequence of charges output as signals from
the horizontal shift register (Hreg) is, for line A1, (G + Cy),
(Mg + Ye), (G + Cy), and (Mg + Ye).
Hreg
Color Coding Diagram
These signals are processed to form the Y signal and chroma (color difference) signal. The Y signal is formed
by adding adjacent signals, and the chroma signal is formed by subtracting adjacent signals. In other words,
the approximation:
Y = {(G + Cy) + (Mg + Ye)} × 1/2
= 1/2 {2B + 3G + 2R}
is used for the Y signal, and the approximation:
R – Y = {(Mg + Ye) – (G + Cy)}
= {2R – G}
is used for the chroma (color difference) signal. For line A2, the signals output from Hreg in sequence are
(Mg + Cy), (G + Ye), (Mg + Cy), (G + Ye).
The Y signal is formed from these signals as follows:
Y = {(G + Ye) + (Mg + Cy)} × 1/2
= 1/2 {2B + 3G + 2R}
This is balanced since it is formed in the same way as for line A1.
In a like manner, the chroma (color difference) signal is approximated as follows:
– (B – Y) = {(G + Ye) – (Mg + Cy)}
= – {2B – G}
In other words, the chroma signal can be retrieved according to the sequence of lines from R – Y and – (B – Y)
in alternation. This is also true for the B field.
– 12 –
ICX418AKB
Definition of standard imaging conditions
1) Standard imaging condition I:
Use a pattern box (luminance 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern
for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and
image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard
sensitivity testing luminous intensity.
2) Standard imaging condition II:
Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.
Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted
to the value indicated in each testing item by the lens diaphragm.
1. Sensitivity
Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of
1/250s, measure the Y signal (Ys) at the center of the screen and substitute the value into the following
formula.
250
60
S = Ys ×
[mV]
2. Saturation signal
Set to standard imaging condition II. After adjusting the luminous intensity to 10 times the intensity with
average value of the Y signal output, 200mV, measure the minimum value of the Y signal.
3. Smear
Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity to
500 times the intensity with average value of the Y signal output, 200mV. When the readout clock is
stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure
the maximum value YSm [mV] of the Y signal output and substitute the value into the following formula.
1
500
1
10
YSm
200
Sm = 20 × log
×
×
[dB] (1/10V method conversion value)
4. Video signal shading
Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so
that the average value of the Y signal output is 200mV. Then measure the maximum (Ymax [mV]) and
minimum (Ymin [mV]) values of the Y signal and substitute the values into the following formula.
SHy = (Ymax – Ymin)/200 × 100 [%]
5. Uniformity between video signal channels
Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal
output is 200mV, and then measure the maximum (Crmax, Cbmax [mV]) and minimum (Crmin, Cbmin
[mV]) values of the R – Y and B – Y channels of the chroma signal and substitute the values into the
following formula.
∆Sr = | (Crmax – Crmin)/200 | × 100 [%]
∆Sb = | (Cbmax – Cbmin)/200 | × 100 [%]
6. Dark signal
Measure the average value of the Y signal output (Ydt [mV]) with the device ambient temperature 60°C and
the device in the light-obstructed state, using the horizontal idle transfer level as a reference.
– 13 –
ICX418AKB
7. Dark signal shading
After measuring 6, measure the maximum (Ydmax [mV]) and minimum (Ydmin [mV]) values of the dark
signal output and substitute the values into the following formula.
∆Ydt = Ydmax – Ydmin [mV]
8. Flicker
1) Fy
Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal
output is 200mV, and then measure the difference in the signal level between fields (∆Yf [mV]). Then
substitute the value into the following formula.
Fy = (∆Yf/200) × 100 [%]
2) Fcr, Fcb
Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal
output is 200mV, insert an R or B filter, and then measure both the difference in the signal level between
fields of the chroma signal (∆Cr, ∆Cb) as well as the average value of the chroma signal output (CAr, CAb).
Substitute the values into the following formula.
Fci = (∆Ci/CAi) × 100 [%] (i = r, b)
9. Line crawls
Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal
output is 200mV, and then insert a white subject and R, G, and B filters and measure the difference
between Y signal lines for the same field (∆Ylw, ∆Ylr, ∆Ylg, ∆Ylb [mV]). Substitute the values into the
following formula.
Lci = (∆Yli/200) × 100 [%] (i = w, r, g, b)
10. Lag
Adjust the Y signal output value generated by strobe light to 200mV. After setting the strobe light so that it
strobes with the following timing, measure the residual signal (Ylag). Substitute the value into the following
formula.
Lag = (Ylag/200) × 100 [%]
FLD
V1
Light
Strobe light
timing
Y signal output 200mV
Ylag (lag)
Output
– 14 –
ICX418AKB
N C
N C
O U V T
D D V
L V
G N D
R D
1 φ V
R φ G
D S V U B
S U φ B
2 φ V
3 φ V
4 φ V
1 φ H
2 φ H
– 15 –
ICX418AKB
N C
O U V T
D D V
L V
N C
G N D
R D
1 φ V
R φ G
S U φ B
2 φ V
D S V U B
1 φ H
3 φ V
4 φ V
2 φ H
– 16 –
ICX418AKB
Spectral Sensitivity Characteristics (Excludes lens characteristics and light source characteristics)
1.0
0.8
0.6
0.4
0.2
0
Cy
Ye
G
Mg
400
450
500
550
Wave Length [nm]
600
650
700
Sensor Readout Clock Timing Chart
V1
V2
2.5
Odd Field
V3
V4
1.6
2.5 2.5 2.5
33.5
0.2
V1
V2
Even Field
V3
V4
Unit: µs
– 17 –
ICX418AKB
2 8 0
2 7 5
2 7 0
2 6 5
2 6 0
2 0
1 5
1 0
5
4
3
2
1
5 2 5
5 2 0
– 18 –
ICX418AKB
2 0
1 0
3
2
1
3
2
1
2 2
2 0
1 0
5
3
2
1
4 0
3 0
2 0
1 0
5
3
2
1
7 6 8
7 6 0
– 19 –
ICX418AKB
Notes on Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non-chargeable gloves, clothes or material.
Also use conductive shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.
2) Soldering
a) Make sure the package temperature does not exceed 80°C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W
soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering
tool, use a thermal controller of the zero cross On/Off type and connect it to ground.
3) Dust and dirt protection
Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and
dirt. Clean glass plates with the following operations as required, and use them.
a) Perform all assembly operations in a clean room (class 1000 or less).
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized
air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if grease stained. Be careful not to scratch the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic
protection. Do not reuse the tape.
4) Do not expose to strong light (sun rays) for long periods, as color filters will be discolored.When high luminous
objects are imaged with the exposure level control by the electronic-iris, the luminance of the image-plane
may become excessive and discolor of the color filter will possibly be accelerated. In such a case, it is advis-
able that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be
properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult
our company.
5) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in
such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to too much mechanical shocks.
– 20 –
ICX418AKB
4 . 0
~
~
7 . 6 2
0 . 2 5
1 2 . 3 5 ± 0 . 3
1 2 . 0 ± 0 . 1 5
6 . 1 7 5
4 . 0 ± 0 . 2
1 . 0
1 3 . 2 ± 0 . 3
φ
1 . 8 4
1 . 5
~
Sony Corporation
– 21 –
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ICX424AL
Diagonal 6mm (Type 1/3) Progressive Scan CCD Solid-state Image Sensor with Square Pixel for B/W Cameras
SONY
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