ICX415AQ [SONY]

Diagonal 8mm (Type 1/2) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras; 对角线8毫米(类型1/2)与正方形像素的彩色摄像机逐行扫描CCD图像传感器
ICX415AQ
型号: ICX415AQ
厂家: SONY CORPORATION    SONY CORPORATION
描述:

Diagonal 8mm (Type 1/2) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras
对角线8毫米(类型1/2)与正方形像素的彩色摄像机逐行扫描CCD图像传感器

模拟IC 传感器 图像传感器 信号电路 CD 摄像机
文件: 总28页 (文件大小:262K)
中文:  中文翻译
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ICX415AQ  
Diagonal 8mm (Type 1/2) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras  
Description  
22 pin DIP (Cer-DIP)  
The ICX415AQ is a diagonal 8mm (Type 1/2) interline  
CCD solid-state image sensor with a square pixel  
array. Progressive scan allows all pixel's signals to be  
output independently within approximately 1/50 second.  
This chip features an electronic shutter with variable  
charge-storage time which makes it possible to  
realize full-frame still image without a mechanical  
shutter. High resolution and high color reproductivity  
are achieved through the use of R, G, B primary  
color mosaic filters. Further, high sensitivity and low  
dark current are achieved through the adoption of  
HAD (Hole-Accumulation Diode) sensors.  
This chip is suitable for applications such as FA  
and surveillance cameras.  
Pin 1  
Features  
2
Progressive scan allows individual readout of the image signals  
from all pixels.  
High vertical resolution still images without a mechanical shutter  
Square pixel  
Horizontal drive frequency: 29.5MHz  
R, G, B primary color mosaic filters on chip  
No voltage adjustments (reset gate and substrate bias are not  
adjusted.)  
V
3
8
H
38  
Pin 12  
High resolution, low dark current, high color reproductivity, high  
sensitivity  
Continuous variable-speed shutter  
Low smear  
Optical black position  
(Top View)  
Excellent anti-blooming characteristics  
Device Structure  
Interline CCD image sensor  
Image size:  
Diagonal 8mm (Type 1/2)  
Number of effective pixels: 782 (H) × 582 (V) approx. 460K pixels  
Total number of pixels:  
Chip size:  
823 (H) × 592 (V) approx. 490K pixels  
7.48mm (H) × 6.15mm (V)  
Unit cell size:  
Optical black:  
8.3µm (H) × 8.3µm (V)  
Horizontal (H) direction: Front 3 pixels, rear 38 pixels  
Vertical (V) direction:  
Horizontal 19  
Vertical 5  
Front 8 pixels, rear 2 pixels  
Number of dummy bits:  
Substrate material:  
Silicon  
Wfine CCD is trademark of Sony corporation.  
Represents a CCD adopting progressive scan, primary color filter and square pixel.  
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by  
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the  
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.  
– 1 –  
E02404B35  
ICX415AQ  
Block Diagram and Pin Configuration  
(Top View)  
11  
10  
9
8
7
6
5
4
3
2
1
R
G
R
G
R
G
R
G
B
G
B
G
B
G
B
G
R
G
R
G
G
B
G
R
G
R
B
G
Note)  
Horizontal register  
Note)  
: Photo sensor  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
Pin Description  
Pin No. Symbol  
Description  
Pin No. Symbol  
Description  
1
2
3
4
5
6
7
8
9
NC  
12  
13  
14  
15  
16  
17  
18  
19  
20  
VDD  
φRG  
VL  
Supply voltage  
NC  
Reset gate clock  
Protective transistor bias  
Substrate clock  
Vφ3  
Vφ2  
Vφ1  
NC  
Vertical register transfer clock  
Vertical register transfer clock  
Vertical register transfer clock  
φSUB  
Hφ1  
Hφ2  
NC  
Horizontal register transfer clock  
Horizontal register transfer clock  
GND  
NC  
GND  
NC  
2
VOUT  
Signal output  
CSUB  
Substrate bias  
Supply voltage for the substrate  
voltage generation  
1
10  
11  
CGG  
Output amplifier gate  
21  
22  
SUBCIR  
NC  
NC  
1
2
DC bias is applied within the CCD, so that this pin should be grounded externally through a capacitance  
of 1µF or more.  
DC bias is applied within the CCD, so that this pin should be grounded externally through a capacitance  
of 0.1µF or more.  
– 2 –  
ICX415AQ  
Absolute Maximum Ratings  
Item  
Substrate clock φSUB – GND  
Ratings  
–0.3 to +55  
–0.3 to +18  
–55 to +10  
–15 to +20  
to +10  
Unit  
V
Remarks  
VDD, VOUT, CGG, SUBCIR – GND  
V
Supply voltage  
VDD, VOUT, CGG, SUBCIR – φSUB  
Vφ1, Vφ2, Vφ3 – GND  
V
V
Clock input voltage  
Vφ1, Vφ2, Vφ3 φSUB  
V
1
Voltage difference between vertical clock input pins  
Voltage difference between horizongal clock input pins  
Hφ1, Hφ2 – Vφ3  
to +15  
V
to +17  
V
–16 to +16  
–10 to +15  
–55 to +10  
–65 to +0.3  
–0.3 to +27.5  
–0.3 to +22.5  
–0.3 to +17.5  
–30 to +80  
–10 to +60  
–10 to +75  
V
Hφ1, Hφ2 – GND  
V
Hφ1, Hφ2 φSUB  
V
VL φSUB  
V
Vφ2, Vφ3 – VL  
V
RG – GND  
V
Vφ1, Hφ1, Hφ2, GND – VL  
Storage temperature  
V
°C  
°C  
°C  
Performance guarantee temperature  
Operating temperature  
1
+27V (Max.) when clock width < 10µs, clock duty factor < 0.1%.  
+16V (Max.) is guaranteed for power-on and power-off.  
– 3 –  
ICX415AQ  
Bias Conditions  
Item  
Symbol Min.  
Typ.  
Max.  
Unit Remarks  
V
Supply voltage  
Protective transistor bias  
Substrate clock  
Reset gate clock  
1
VDD  
VL  
14.55  
15.0  
15.45  
1
2
3
φSUB  
φRG  
VL setting is the VVL voltage of the vertical transfer clock waveform, or the same voltage as the VL power  
supply for the V driver should be used.  
2
Indications of substrate voltage setting value  
Set SUBCIR pin to open when applying a DC bias the substrate clock pin.  
Adjust the substrate voltage because the setting value of the substrate voltage is indicated on the back of  
image sensor by a special code when applying a DC bias the substrate clock pin.  
VSUB code – two characters indication  
Integer portion  
Decimal portion  
The integer portion of the code and the actual value correspond to each other as follows.  
Integer portion of code  
Value  
A
5
C
6
d
7
E
8
f
G
h
J
9
10  
11  
12  
[Example] "A5" VSUB = 5.5V  
Do not apply a DC bias to the reset gate clock pins, because a DC bias is generated within the CCD.  
3
DC Characteristics  
Item  
Symbol Min.  
4.0  
Typ.  
7.0  
Max.  
9.0  
Unit Remarks  
mA  
Supply current  
IDD  
– 4 –  
ICX415AQ  
Clock Voltage Conditions  
Item  
Waveform  
Diagram  
Symbol  
Min.  
Typ.  
Max. Unit  
Remarks  
Readout clock voltage VVT  
14.55 15.0 15.45  
V
V
V
1
2
2
VVH02  
–0.05  
0
0
0.05  
0.05  
VVH = VVH02  
VVH1, VVH2, VVH3 –0.2  
VVL = (VVL1 + VVL3)/2  
(During 29.5MHz)  
VVL1, VVL2, VVL3  
VVL1, VVL2, VVL3  
–7.8  
–7.5  
–7.2  
–7.0  
V
V
2
2
VVL = (VVL1 + VVL3)/2  
(During 14.75MHz)  
–8.0  
6.8  
–7.5  
7.5  
Vertical transfer clock  
voltage  
Vφ1, Vφ2, Vφ3  
| VVL1 – VVL3 |  
VVHH  
8.05  
0.1  
V
V
V
V
V
V
V
V
V
V
V
V
V
2
2
2
2
2
2
3
3
3
4
4
4
5
0.5  
High-level coupling  
High-level coupling  
Low-level coupling  
Low-level coupling  
VVHL  
0.5  
VVLH  
0.5  
VVLL  
0.5  
VφH  
4.75  
–0.05  
0.8  
5.0  
0
5.25  
0.05  
Horizontal transfer  
clock voltage  
VHL  
VCR  
2.5  
5.0  
Cross-point voltage  
VφRG  
4.5  
5.5  
0.8  
Reset gate clock  
voltage  
VRGLH – VRGLL  
VRGL – VRGLm  
Low-level coupling  
Low-level coupling  
0.5  
Substrate clock voltage VφSUB  
21.5  
22.5  
23.5  
– 5 –  
ICX415AQ  
Clock Equivalent Circuit Constants  
Symbol  
Typ.  
3900  
3300  
3300  
2200  
2200  
1800  
47  
Item  
Min.  
Max. Unit Remarks  
CφV1  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
CφV2  
Capacitance between vertical transfer clock and GND  
Capacitance between vertical transfer clocks  
CφV3  
CφV12  
CφV23  
CφV31  
CφH1, CφH2  
CφHH  
Capacitance between horizontal transfer clock and GND  
Capacitance between horizontal transfer clocks  
Capacitance between reset gate clock and GND  
Capacitance between substrate clock and GND  
30  
CφRG  
6
CφSUB  
R1, R2  
R3  
390  
27  
Vertical transfer clock series resistor  
22  
RGND  
100  
16  
Vertical transfer clock ground resistor  
Horizontal transfer clock series resistor  
Reset gate clock series resistor  
RφH1, RφH2  
RφRG  
39  
R1  
R2  
Vφ1  
Vφ2  
CφV12  
CφV1  
CφV2  
CφV3  
RφH1  
RφH2  
Hφ2  
Hφ1  
RGND  
CφHH  
CφV31  
CφV23  
CφH2  
CφH1  
R3  
Vφ3  
Vertical transfer clock equivalent circuit  
Horizontal transfer clock equivalent circuit  
RφRG  
CφRG  
Reset gate clock equivalent circuit  
– 6 –  
ICX415AQ  
Drive Clock Waveform Conditions  
(1) Readout clock waveform  
VT  
100%  
90%  
φM  
VVT  
φM  
2
10%  
0%  
0V  
tr  
twh  
tf  
Note) Readout clock is used by composing vertical transfer clocks Vφ2 and Vφ3.  
(2) Vertical transfer clock waveform  
VVH1  
Vφ1  
VVHH  
VVH  
VVHL  
VVLH  
V
VL01  
VH02  
VVL1  
V
VL  
V
VLL  
Vφ2  
V
VH2  
V
VVHH  
VVH  
VVHL  
VVLH  
VVL2  
VVL  
VVLL  
VVH3  
Vφ3  
VVHH  
VVH  
VVHL  
VVL03  
VVLH  
VVL  
VVLL  
V
V
V
VH = VVH02  
VL = (VVL01 + VVL03)/2  
VL3 = VVL03  
VφV1 = VVH1 – VVL01  
VφV2 = VVH02 – VVL2  
VφV3 = VVH3 – VVL03  
– 7 –  
ICX415AQ  
(3) Horizontal transfer clock waveform  
tf  
tr  
Hφ1, Hφ2  
twh  
Hφ2  
90%  
VCR  
VφH  
twl  
VφH  
2
10%  
Hφ1  
VHL  
two  
Cross-point voltage for the Hφ1 rising side of the horizontal transfer clocks Hφ1 and Hφ2 waveforms is VCR.  
The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.  
(4) Reset gate clock waveform  
φRG  
tr  
twh  
tf  
VRGH  
RG waveform  
twl  
VφRG  
Point A  
V
V
V
RGLH  
RGLL  
RGLm  
V
RGL  
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from  
Point A in the above diagram until the rising edge of RG.  
In addition, VRGL is the average value of VRGLH and VRGLL.  
VRGL = (VRGLH + VRGLL)/2  
Assuming VRGH is the minimum value during the interval twh, then:  
VφRG = VRGH – VRGL  
Negative overshoot level during the falling edge of RG is VRGLm.  
(5) Substrate clock waveform  
φSUB  
100%  
90%  
φM  
VφSUB  
φM  
2
10%  
V
SUB  
0%  
(A bias generated within the CCD)  
tr  
twh  
tf  
– 8 –  
ICX415AQ  
Clock Switching Characteristics (Horizontal drive frequency: 29.5MHz)  
twh  
twl  
tr  
tf  
Item  
Symbol  
Unit Remarks  
Min. Typ. Max.Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.  
During  
readout  
Readout clock  
VT  
2.3 2.5  
0.5  
0.5  
µs  
Vertical transfer Vφ1, Vφ2,  
When using  
CXD3400N  
15  
250 ns  
clock  
Vφ3  
Hφ1  
Hφ2  
9.5 12.0  
9.5 12.0  
9.5 12.0  
9.5 12.0  
5.0 7.5  
5.0 7.5  
5.0 7.5  
5.0 7.5  
Horizontal  
transfer clock  
ns  
ns  
tf tr – 2ns  
Reset gate clock φRG  
Substrate clock φSUB  
4
7
22  
2
3
When draining  
charge  
0.7 0.8  
0.5  
0.5 µs  
two  
Min. Typ. Max.  
Item  
Symbol  
Unit Remarks  
1
Horizontal transfer clock Hφ1, Hφ2 7.5 9.5  
ns  
Clock Switching Characteristics (Horizontal drive frequency: 14.75MHz)  
twh  
twl  
tr  
tf  
Item  
Symbol  
VT  
Unit Remarks  
Min. Typ. Max.Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.  
During  
µs  
Readout clock  
4.6 5.0  
0.5  
0.5  
readout  
Vertical transfer Vφ1, Vφ2,  
When using  
CXD3400N  
15  
350 ns  
clock  
Vφ3  
Hφ1  
Hφ2  
18 23  
21 26  
21 26  
18 23  
10 17.5  
10 15  
10 17.5  
10 15  
Horizontal  
transfer clock  
ns  
ns  
tf tr – 2ns  
Reset gate clock φRG  
Substrate clock φSUB  
11 14  
1.4 1.6  
49  
2
2
When draining  
charge  
0.5  
0.4 µs  
two  
Item  
Symbol  
Unit Remarks  
Min. Typ. Max.  
20 24  
1
Horizontal transfer clock Hφ1, Hφ2  
ns  
1
The overlap period of twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.  
– 9 –  
ICX415AQ  
Image Sensor Characteristics  
(Ta = 25°C)  
Measurement  
method  
Item  
Symbol Min. Typ. Max. Unit  
Remarks  
G Sensitivity  
Sg  
570 720 940 mV  
0.4 0.55 0.7  
1
1
1
2
3
4
1/25s accumulation conversion value  
Rr  
Sensitivity  
comparison  
Rb  
0.3 0.45 0.6  
Vsat  
Sm  
SHg  
375  
mV  
Ta = 60°C  
Zone 0  
Saturation signal  
Smear  
–100 –92 dB  
25  
8
%
%
Video signal shading  
Uniformity between  
video signal  
channels  
Srg  
Sbg  
5
8
5
6
%
Ta = 60°C  
Ta = 60°C  
mV  
Dark signal  
Dark signal shading  
Lag  
2
Vdt  
Vdt  
Lag  
7
8
mV  
%
1
0.5  
Note) All image sensor characteristic data noted above is for operation in 1/50s progressive scan mode.  
Zone Definition of Video Signal Shading  
782 (H)  
6
6
2
582 (V)  
2
Zone 0  
Ignored region  
Effective pixel region  
Measurement System  
CCD signal output [ A]  
Gr/Gb  
S/H  
CCD  
C.D.S  
AMP  
Gr/Gb channel signal output [ B]  
R/B channel signal output [ C]  
R/B  
S/H  
Note) Adjust the amplifier gain so that the gain between [ A] and [ B], and between [ A] and [ C] equals 1.  
– 10 –  
ICX415AQ  
Image Sensor Characteristics Measurement Method  
Measurement conditions  
(1) In the following measurements, the device drive conditions are at the typical values of the bias and clock  
voltage conditions.  
(2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical  
black level (OB) is used as the reference for the signal output, which is taken as the value of the Gr/Gb  
channel signal output or the R/B channel signal output of the measurement system.  
(2) In the following measurements, this image sensor is operated in 1/50s all pixels progressive scan mode.  
Color coding of this image sensor & Readout  
The primary color filters of this image sensor are arranged in  
Gb  
R
B
Gr  
B
Gb  
R
B
Gr  
B
the layout shown in the figure on the left (Bayer arrangement).  
Gr and Gb denote the G signals on the same line as the R  
signal and the B signal, respectively.  
Gb  
R
Gb  
R
Gr  
Gr  
Horizontal register  
Color Coding Diagram  
All pixels' signals are output successively in a 1/50s period.  
R signal and Gr signal lines and Gb signal and B signal lines are output sequentially.  
– 11 –  
ICX415AQ  
Image sensor readout mode  
The diagram below shows the output methods for the following two readout modes.  
(1) Progressive scan mode  
G
R
G
R
G
R
B
G
B
G
VOUT  
1. Progressive scan mode  
In this mode, all pixel signals are output in non-interlace format in 1/50s.  
All pixel signals within the same exposure period are read out simultaneously, making this mode suitable for  
high resolution image capturing.  
(2) Center scan mode  
Undesired portions (Swept by vertical register high-speed transfer)  
Picture center cut-out portion  
2. Center scan mode  
This is the center scan mode using the progressive scan method.  
The undesired portions are swept by vertical register high-speed transfer, and the picture center portion is  
cut out.  
There are the mode (100 frames/s) which outputs 264 lines of an output line portion, and the mode  
(200 frames/s) which outputs 88 lines.  
– 12 –  
ICX415AQ  
Definition of standard imaging conditions  
(1) Standard imaging condition I:  
Use a pattern box (luminance: 706cd/m2, color temperature of 3200K halogen source) as a subject.  
(Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR  
cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined  
as the standard sensitivity testing luminous intensity.  
(2) Standard imaging condition II:  
Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.  
Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted  
to the value indicated in each testing item by the lens diaphragm.  
1. G Sensitivity, sensitivity comparison  
Set to the standard imaging condition I. After setting the electronic shutter mode with a shutter speed of  
1/100s, measure the signal outputs (VGR, VGb, VR and VB) at the center of each Gr, Gb, R and B channel  
screen, and substitute the values into the following formulas.  
VG = (VGr + VGb)/2  
100  
Sg = VG ×  
[mV]  
25  
Rr = VR/VG  
Rb = VB/VG  
2. Saturation signal  
Set to the standard imaging condition II. After adjusting the luminous intensity to 20 times the intensity with  
the average value of the Gr signal output, 120mV, measure the minimum values of the Gr, Gb, R and B  
signal outputs.  
3. Smear  
Set to the standard imaging condition III. With the lens diaphragm at F5.6 to F8, first adjust the average  
value of the Gr signal output to 120mV. Measure the average values of the Gr signal output, Gb signal  
output, R signal output and B signal output (Gra, Gba, Ra, Ba), and then adjust the luminous intensity to  
500 times the intensity with the average value of the Gr signal output, 120mV.  
After the readout clock is stopped and the charge drain is executed by the electronic shutter at the  
respective H blankings, measure the maximum value (Vsm [mV]) independent of the Gr, Gb, R and B  
signal outputs, and substitute the values into the following formula.  
Gra + Gba + Ra + Ba  
4
1
500  
1
10  
Sm = 20 × log Vsm ÷  
×
×
[dB] (1/10V method conversion value)  
(
)
– 13 –  
ICX415AQ  
4. Video signal shading  
Set to the standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjusting the luminous  
intensity so that the average value of the Gr signal output is 120mV. Then measure the maximum value  
(Grmax [mV]) and minimum value (Grmin [mV]) of the Gr signal output and substitute the values into the  
following formula.  
SHg = (Grmax – Grmin)/120 × 100 [%]  
5. Unifoemity between video signal channels  
After measuring 4, measure the maximum (Rmax [mV]) and minimum (Rmin [mV]) values of R signal, and  
the maximum (Bmax [mV]) and minimum (Bmin [mV]) values of B signal. Substitute the values into the  
following formula.  
Srg = (Rmax – Rmin )/120 × 100 [%]  
Sbg = (Bmax – Bmin )/120 × 100 [%]  
6. Dark signal  
Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature of 60°C  
and the device in the light-obstructed state, using the horizontal idle transfer level as a reference.  
7. Dark signal shading  
After measuring 6, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark  
signal output and substitute the values into the following formula.  
Vdt = Vdmax – Vdmin [mV]  
8. Lag  
Adjust the Gr signal output value generated by the strobe light to 120mV. After setting the strobe light so  
that it strobes with the following timing, measure the residual signal amount (Vlag). Substitute the value  
into the following formula.  
Lag = (Vlag/120) × 100 [%]  
VD  
V2  
Light  
Strobe light  
timing  
Gr signal output 120mV  
Vlag(lag)  
Output  
– 14 –  
ICX415AQ  
N C  
G G C  
O U V T  
N C  
D D V  
R φ G  
L V  
S φ U B  
G N D  
N C  
1 φ V  
1 φ H  
2 φ H  
N C  
N C  
S U C B  
2 φ V  
3 φ V  
N C  
S U B C I R  
N C  
N C  
– 15 –  
ICX415AQ  
Spectral Sensitivity Characteristics (Excludes lens characteristics and light source characteristics)  
1.0  
G
R
0.8  
B
0.6  
0.4  
0.2  
0
400  
450  
500  
550  
600  
650  
700  
Wave Length [nm]  
– 16 –  
ICX415AQ  
8
7
6
5
4
3
2
1
7
1
6 2 5  
2
1
5 9 8  
5 9 6  
5 8 2  
3
2
1
8
7
6
5
4
3
2
1
7
1
6 2 5  
5 9 8  
2
1
5 8 2  
– 17 –  
ICX415AQ  
– 18 –  
ICX415AQ  
1 6 6  
1 6 3  
1 9  
1
1 4 4  
1 0 2  
1 3 8 9 6  
1
4 2  
4
1
1
9 4 4  
– 19 –  
ICX415AQ  
8
7
6
5
4
3
2
1
1
3 1 2  
3 1 1  
3 1 0  
2 9 1  
2 9 0  
4 2 3  
4 2 2  
1 6 1  
1 6 0  
2 7  
2 4  
2 3  
8
7
6
5
4
3
2
1
1
3 1 2  
3 1 1  
3 1 0  
2 9 1  
2 9 0  
4 2 3  
4 2 2  
– 20 –  
ICX415AQ  
1 4 4  
4 2  
– 21 –  
ICX415AQ  
1 4 4  
4 2  
– 22 –  
ICX415AQ  
8
7
6
5
4
3
2
1
1
1 5 6  
1 5 5  
1 5 4  
1 2 4  
1 2 3  
3 3 5  
3 3 4  
2 4 9  
2 4 8  
3 6  
3 3  
3 2  
8
7
6
5
4
3
2
1
1
1 5 6  
1 5 5  
1 5 4  
1 2 4  
1 2 3  
3 3 5  
3 3 4  
– 23 –  
ICX415AQ  
1 4 4  
4 2  
– 24 –  
ICX415AQ  
1 4 4  
4 2  
– 25 –  
ICX415AQ  
Notes on Handling  
1) Static charge prevention  
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following  
protective measures.  
a) Either handle bare handed or use non-chargeable gloves, clothes or material.  
Also use conductive shoes.  
b) When handling directly use an earth band.  
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.  
d) Ionized air is recommended for discharge when handling CCD image sensor.  
e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.  
2) Soldering  
a) Make sure the package temperature does not exceed 80°C.  
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a 30W  
soldering iron with a ground wire and solder each pin in less than 2 seconds. For repairs and remount,  
cool sufficiently.  
c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering  
tool, use a thermal controller of the zero cross On/Off type and connect it to ground.  
3) Dust and dirt protection  
Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and  
dirt. Clean glass plates with the following operation as required, and use them.  
a) Perform all assembly operations in a clean room (class 1000 or less).  
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should  
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized  
air is recommended.)  
c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass.  
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when  
moving to a room with great temperature differences.  
e) When a protective tape is applied before shipping, just before use remove the tape applied for  
electrostatic protection. Do not reuse the tape.  
4) Installing (attaching)  
a) Remain within the following limits when applying a static load to the package. Do not apply any load more  
than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited  
portions. (This may cause cracks in the package.)  
39N  
29N  
29N  
0.9Nm  
Upper ceramic  
Low melting  
point glass  
Lower ceramic  
Compressive strength  
Shearing strength  
Tensile strength  
Torsional stregth  
b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the  
package may fracture, etc., depending on the flatness of the ceramic portions. Therefore, for installation,  
use either an elastic load, such as a spring plate, or an adhesive.  
– 26 –  
ICX415AQ  
c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated  
voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area,  
and indicated values should be transferred to other locations as a precaution.  
d) The notch of the package is used for directional index, and that can not be used for reference of fixing.  
In addition, the cover glass and seal resin may overlap with the notch of the package.  
e) If the leads are bent repeatedly and metal, etc., clash or rub against the package, the dust may be  
generated by the fragments of resin.  
f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyano-  
acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives.  
(reference)  
5) Others  
a) Do not expose to strong light (sun rays) for long periods, as color filters will be discolored. When high  
luminous objects are imaged with the exposure level controlled by the electronic iris, the luminance of the  
image-plane may become excessive and discoloring of the color filter will possibly be accelerated. In such  
a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-  
off mode should be properly arranged. For continuous using under cruel condition exceeding the normal  
using condition, consult our company.  
b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or  
usage in such conditions.  
c) Brown stains may be seen on the bottom or side of the package. But this does not affect the CCD  
characteristics.  
– 27 –  
ICX415AQ  
0 ˚ t o 9 ˚  
4 . 0 ± 0 . 3  
3 . 2 6 ± 0 . 3  
0 . 7  
1 5 . 2 4  
1 . 2 7  
1 5 . 1 ± 0 . 3  
7 . 5 5  
1 1 . 5 5  
3
3
0 . 5 5  
~
~
Sony Corporation  
– 28 –  

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