CXA3238TN [SONY]
6/4-channel Read/Write Amplifier for GMR-Ind Head Hard Disk Drive; 6/4通道的读/写放大器GMR -IND头硬盘驱动器
| 型号： | CXA3238TN |
| 厂家： | 
SONY CORPORATION |
| 描述： | 6/4-channel Read/Write Amplifier for GMR-Ind Head Hard Disk Drive |
| 文件： | 总27页 (文件大小：333K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CXA3238TN/CXA3239TN
6/4-channel Read/Write Amplifier for GMR-Ind Head Hard Disk Drive
For the availability of this product, please contact the sales office.
Description
38 pin TSSOP (Plastic)
The CXA3238TN/CXA3239TN is a Read/Write
amplifier for GMR-Ind (Giant Magneto Resistive-
Inductive) heads used in hard disk drives, and is
capable of supporting up to six channels.
Features
• +5 V and –3 V power supply.
• Current bias voltage sense type.
• Drives up to six heads (CXA3238TN)
Absolute Maximum Ratings (Ta=25 °C)
• Drives up to four heads (CXA3239TN)
• Supply voltage
• Supply voltage
• Digital input voltage
VCC
VEE
–0.3 to +6
V
V
• Low power 180 mW at Read
–4.5 to +0.3
• Differential read amplifier gain ; ×140/190
Vdi –0.3 to VCC+0.3 V
–20 to +70 °C
Tstg –55 to +150 °C
• Allowable power dissipation
(RMR=50 Ω)
• Operating temperature Topr
• Storage temperature
• Input noise of 0.77 nV/ √ Hz (typ.),
RMR=50 Ω, IB=6.0 mA.
• Recovery time write to read ; 300 nsec. (typ.)
• Write data is triggered by differential P-ECL signal.
• Servo bank write. (All channels)
TSSOP38
PD
1000
mW
Operating Conditions
• Write unsafe detection circuit.
• Supply voltage
VCC
VEE
+4.4 to +5.5
–4.0 to –2.6
V
V
…
• Serial port
Head selection
MR bias
• MR bias voltage
• Bias current
VMR –300 to +300 mV
IB
3 to 8
mA
mA
Write current
• Write current
IW
15 to 45
Applications
Hard disk drives with GMR-Ind heads.
Structure
Bipolar silicon monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E98346C8Y
CXA3238TN/CXA3239TN
Block Diagram and Pin Configuration
CXA3238TN
RS
SCLK
SDATA
WDX
38 R5Y
1
2
Bias
AMP
Serial Interface
current
source
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
R5X
W5Y
W5X
W4X
W4Y
R4X
R4Y
R3Y
R3X
W3Y
W3X
W2X
W2Y
R2X
R2Y
R1Y
R1X
W1Y
Write
current
source
3
DRIVER
4
WD BUF
WDY
5
DRIVER
VCC
6
GND
7
AMP
AMP
8
RDY
AMP
9
RDX
10
11
12
13
14
15
16
17
18
19
FLT/SE/BHV
R/XW
SDEN
CAP
DRIVER
DRIVER
VEE
W0X
DRIVER
AMP
AMP
W0Y
R0X
AMP
R0Y
W1X
DRIVER
—2—
CXA3238TN/CXA3239TN
CXA3239TN
RS
SCLK
SDATA
WDX
WDY
VCC
38 R3Y
1
2
Bias
AMP
Serial Interface
current
source
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
R3X
W3Y
W3X
W2X
W2Y
R2X
R2Y
W1X
W1Y
R1X
R1Y
R0Y
R0X
W0Y
W0X
NC
Write
current
source
3
DRIVER
4
WD BUF
5
DRIVER
6
GND
7
AMP
8
RDY
AMP
9
RDX
DRIVER
10
11
12
13
14
15
16
17
18
19
FLT/SE/BHV
NC
AMP
NC
NC
AMP
NC
NC
DRIVER
R/XW
SDEN
CAP
NC
VEE
VEE
—3—
CXA3238TN/CXA3239TN
Pin Description CXA3238TN
Pin
Symbol
No.
Equivalent circuit
Description
VCC
250
Bias current setting resister is connected
between this pin and GND.
1
1
RS
VBGR
≈1.3V
GND
VEE
VCC
2
3
2
3
SCLK
SDATA
SDEN
7.5k
Serial control signal input.
12
12
14k
VEE
2Vf
GND
VCC
100
100
4
5
WDX
WDY
4
5
Differential P-ECL write data input.
GND
VEE
6
7
VCC
5 V power supply.
Ground
GND
VCC
100
Read amplifier output with coupling
capacitors.
9
8
RDX
RDY
9
8
High impedance in the write mode.
1.8mA
GND
VEE
—4—
CXA3238TN/CXA3239TN
Pin
No.
Symbol
Equivalent circuit
Description
VCC
100 10k
Head unsafe detection output.
Servo Bank Write Enable input.
Buffered Head Voltage output.
10
10
FLT/SE/BHV
GND
VCC
VEE
100k
Read / Write control signal input.
Read when high, Write when low.
11
11
R/XW
3Vf
GND
VEE
VCC
Connect an external capacitor of Read
amplifier between this pin and VEE.
13
14
CAP
13
VEE
VEE
–3 V power supply.
15
16
19
20
26
25
27
28
34
33
35
36
W0X
W0Y
W1X
W1Y
W2X
W2Y
W3X
W3Y
W4X
W4Y
W5X
W5Y
VCC
15 19 26
27 34 35
16 20 25
28 33 36
Inductive heads for Write.
Six channels are provided.
GND
VEE
—5—
CXA3238TN/CXA3239TN
Pin
No.
Symbol
Equivalent circuit
Description
17
18
21
22
24
23
29
30
32
31
37
38
R0X
R0Y
R1X
R1Y
R2X
R2Y
R3X
R3Y
R4X
R4Y
R5X
R5Y
VCC
17 21 24
29 32 37
18 22 23
30 31 38
MR heads for Read.
Six channels are provided.
VEE
—6—
CXA3238TN/CXA3239TN
Pin Description CXA3239TN
Pin
Symbol
No.
Equivalent circuit
Description
VCC
250
Bias current setting resister is connected
between this pin and GND.
1
1
RS
VBGR
≈1.3V
GND
VEE
VCC
2
3
2
3
SCLK
SDATA
SDEN
7.5k
Serial control signal input.
17
17
14k
VEE
2Vf
GND
VCC
100
100
4
5
4
5
WDX
WDY
Differential P-ECL write data input.
GND
VEE
6
7
VCC
5 V power supply.
Ground
GND
VCC
100
Read amplifier output with coupling
capacitors.
9
8
RDX
RDY
9
8
High impedance in the write mode.
1.8mA
GND
VEE
—7—
CXA3238TN/CXA3239TN
Pin
No.
Symbol
Equivalent circuit
Description
VCC
100 10k
Head unsafe detection output.
Servo Bank Write Enable input.
Buffered Head Voltage output.
10
10
FLT/SE/BHV
GND
VEE
11
12
13
14
15
21
22
Non Connection
NC
VCC
100k
Read / Write control signal input.
Read when high, Write when low.
16
16
R/XW
3Vf
GND
VEE
VCC
Connect an external capacitor of Read
amplifier between this pin and VEE.
18
CAP
18
VEE
19, 20
VEE
–3 V power supply.
—8—
CXA3238TN/CXA3239TN
Pin
No.
Symbol
Equivalent circuit
Description
23
24
29
30
33
34
35
36
W0X
W0Y
W1Y
W1X
W2Y
W2X
W3X
W3Y
VCC
23 24 29
30 33 34
35 36
Inductive heads for Write.
Four channels are provided.
GND
VCC
VEE
25
26
27
28
31
32
37
38
R0X
R0Y
R1Y
R1X
R2Y
R2X
R3X
R3Y
MR heads for Read.
25 26 27
28 31 32
37 38
Four channels are provided.
VEE
—9—
CXA3238TN/CXA3239TN
Electrical Characteristics
(Unless otherwise specified; VCC=5 V, VEE=–3 V, Ta=25 °C, CAP=0.1 µF, RS=7.5 kΩ)
Symbol Measurement conditions Min. Typ. Max. Unit
IW=31 mA, IB=6.0 mA
No.
Item
Power Dissipation
1-1 VCC power supply current
ISP1
IID1
SLEEP mode
2.1
22
2.8
29
mA
mA
mA
mA
mA
mA
mA
mA
1-2
IDLE mode
Read mode
Write mode
IDLE mode
Read mode
Write mode
1-3
IRE1
IWR1
IID2
36
47
1-4
80
100
13
1-6 VEE power supply current
10
1-7
1-8
IRE2
IWR2
ICCBW
10
13
10
13
ICCBW=17+17×N+IW×N,
1-9 Bank write mode
Digital Inputs
300
IW=31 mA
TTL input
2-1
VIL
VIH
0
0.8
V
V
low input voltage
TTL input; R/XW
TTL input
2-2
Pull-up resister : 100 kΩ
VCC+
0.3
2.0
high input voltage
TTL input
2-3
High voltage : 5 V
Low voltage : 0 V
ITTL
–100
100
1
µA
V
input current
Serial interface input
2-4
VSIL
VSIH
IST
low input voltage
Serial input; SDATA, SCLK,
SDEN
Serial interface input
2-5
4
V
high input voltage
Serial interface input
High voltage : 5 V, Low voltage : 0 V
2-6
–1000
1000
µA
V
input current
Pull-down resister : 14 kΩ
P ECL input
3-1
VCC
VCC
VWDV
VWDA
IWD
Voltage range
–2.5
+0.3
Write data input
Input voltage : 4 V
VDD=3.3 V
P ECL input
3-2
0.3
1.5
20
V
Input amplitude
3-3 P ECL input current
–20
µA
V
P ECL input
3-4
VPIH
VPIL
Vdiff
VDD–0.2 VDD
high input voltage 2
P ECL input
3-5
2.0
V
DD–0.5VDD–0.3
V
low input voltage 2
P ECL input
3-6
(VPIH–VPIL) × 2
400
800 1300
mV
differential voltage 2
—10—
CXA3238TN/CXA3239TN
No.
4-1
Item
Bank Write Enable
voltage
Symbol
Measurement conditions
Min. Typ. Max. Unit
VCC
VCC
VSEH
V
mA
V
+1.2
+1.4
Bank Write Enable
current
4-2
ISEH
6
14
5-1 FLT output low voltage
5-2 FLT output high voltage
VFLTL External resistance=2.4 kΩ
VFLTH External resistance=2.4 kΩ
0.8
4.5
–8
V
VBHV=VCC–4×IB×(RMR+5.5 Ω)
6
BHV gain accuracy
EBHV
8
%
IB=“1,1,1”
RMR=50 Ω
Read Characteristics
R1 Low Gain
RMR=50 Ω, IB=6.0 mA
[GAIN]=0
AVL
115
155
140
190
350
200
165
225
550
V/V
V/V
RMR=50 Ω, IB=6.0 mA
[GAIN]=1
R2 High Gain
AVH
FCL
RMR=50 Ω, IB=6.0 mA
Low frequency cut-off
R3
R4
kHz
MHz
(–3 dB)
High frequency cut-off
(–3 dB)
FCH
140
Exclusive of Head noise
R5 Input reflected noise
R6 MR bias current range 1
R7 MR bias accuracy
R8 MR bias resolution
ENI
0.77 0.95 nV/ √ Hz
RMR=50 Ω, IB=6.0 mA
IBR1
3
8
mA
%
EIB
–7
+7
RIB
3 bit DAC
0.714
mA
dB
dB
dB
dB
dB
mV
Ω
VCC power supply
R9-1
Ripple voltage : 100 mVp-p
100 kHz to 50 MHz
PSRR1
PSRR2
CMRR1
CMRR2
CLRR
38
45
37
27
40
rejection ratio
VEE power supply
R9-2
Ripple voltage : 100 mVp-p
100 kHz to 10 MHz
rejection ratio
Common mode
R10-1
Ripple voltage : 100 mVp-p
100 kHz to 50 MHz
rejection ratio 1
Common mode
R10-2
Ripple voltage : 100 mVp-p
51 MHz to 80 MHz
rejection ratio 2
Control line input noise
Ripple voltage : 100 mVp-p
4 MHz to 80 MHz
R11
rejection
RDX/RDY offset difference
R12
VOFF1 Write to Read
50
magnitude
RDX/RDY output
R13
RDro Differential, read mode
30
100
impedance
—11—
CXA3238TN/CXA3239TN
No.
Item
Symbol
Measurement conditions
Min. Typ. Max. Unit
Read Safety Characteristics
P1 MR head open threshold
MRop Head X - Head Y
600
15
750
50
900
90
mV
mV
Head X - Head Y
MRsh
P2 MR head short threshold
Write Characteristics
IB= ‘000’ to ‘011’
W1 Write current range
IWR
EIW
RIW
ILEAK
RD
DAC code=× ‘0000’ to × ‘1111’
15
–7
45
+7
mA
%
W2 Write current accuracy
W3 Write current resolution
W4 Leakage current
RH=0 Ω
4 bit DAC
2
mA
µA
Ω
Unselected head
200
520
10
W6 Damping register
320
–18
420
Write current propagation
LH=0, RH=0
W7
Tpd
ns
ns
%
delay time
Write DATA to 50 % of Write current
W8 Write current rise/fall time
TR/TF RH=15 Ω, LH=150 nH, IW=31 mA
2.5
–9
VCC=3.5 V
EIE
W9 Erase current accuracy
Write Safety Characteristics
U1 Write head open threshold
0
DAC code=× ‘0101’
ROP
VG
Detect open head
1.2
1.4
0.1
1.8
V
V
Head voltage when short
U2
Detect short to GND
to GND
U3 WD frequency too low
U4 Write safety detect time
U5 Low VCC threshold
U6 Low VCC threshold
fWDL
TWS
0.5
MHz
ns
V
300
+T1
T1 : 2 transitions on WDX/WDY
VWthL Fault detected
VWthH Fault removed
Vhys
3.7
3.9
3.9
4.1
200
4.1
4.3
V
Low VCC threshold
U7
mV
hysteresis
—12—
CXA3238TN/CXA3239TN
No.
Item
Symbol
Measurement conditions
Min. Typ. Max. Unit
Switching Characteristics
IW=31 mA, IB=6 mA
Signal on WDX/WDY
S1 Write to Read
TWR
TRW
TIR
300
50
500
70
ns
ns
µs
µs
µs
90 % RD signal or 10 % IW
S2 Read to Write
S3 Idle to Read
90 % IW
90 % RD signal
1.0
90 % RD signal ,90 % IB(*1)
IB="0,1,1"
90 % RD signal ,90 % IB(*1)
S4-1 Sleep to Read(A3238)
TSR1
TSR2
600 1000
600 2000
S4-2 Sleep to Read(A3239)
Bank Write Characteristics
S5 Read to Bank Write
IB="0,1,1"
IW=31 mA, IB=6 mA
TRB
TBR
TIW
90 % IW
10 % IW
90 % IW
100
100
300
ns
ns
us
S6 Bank Write to Read
Idle to Bank Write
S7
Idle to Write
Serial port timing
Tsu
(sden)
Th
B1 Set up time
SDEN to first SCLK
10
10
ns
ns
B2 Hold time
Last SCLK to deassert SDEN
(sden)
B4 SCLK frequency
B5 SCLK pulse width
f (sclk)
30
MHz
ns
Tw
10
10
(sclk)
SCLK-SDATA
B6
Tsu (d)
Th (d)
TSL
ns
set up time
SCLK-SDATA
B7
10
ns
hold time
B8 SDEN low time
100
ns
( 1) TSR is proportional to IB and external CAP value
—13—
CXA3238TN/CXA3239TN
Serial port characteristics
ADR1
ADR0
DATA5 DATA4 DATA3 DATA2 DATA1 DATA0
0
0
1
0
1
0
XSLP
GAIN
XIDL
BHV
N/A
N/A
IW3
HS2
IB2
HS1
IB1
HS0
IB0
MROPN MRSHT
IW2
IW1
IW0
IB<2-0> bits are initialized by ‘0’ at power on
Code Description
Bit
Function
XSLP
XIDL
“0” = Set the pre-amp into low power “sleep” mode
“0” = Set preamplifier to idle mode
HS<2-0> Head select bit
GAIN
BHV
Set the pre-amp to high or low gain mode. “1” = Set preamplifier to high gain mode
Activate the BHV test point pin. “1” active.
MR bias current set
IB<2-0>
MROPN
MRSHT
“1” = Set MR head open detector active.
“1” = Set MR head short detector active.
IW<3-0> Set write current
—14—
CXA3238TN/CXA3239TN
Mode Control
SLEEP
XSLP=0
READ
IDLE
WRITE
XSLP=1
XIDL=1
R/XW=H
XSLP=1
XIDL=0
R/XW=X
XSLP=1
XIDL=1
R/XW=L
Serial Port Timing Detail
TSL
f (sclk)
Th (sden)
SDEN
SCLK
Tw (sclk)
Tsu (sden)
Th (d)
Tsu (d)
SDATA
A1
A0
D5
D4
D3
D2
D1
D0
Serial Port Timing
After the SDEN goes high, the last eight bits are transferred into the register. The SCLK will shift the data
presented at the SDATA into an internal shift register on the rising edge of each clock.
As SCLK initial condition, both of Low and High signal is acceptable.
—15—
CXA3238TN/CXA3239TN
♦ Unsafe condition
1. Write fault condition
FLT is a high level in write fault condition.
• Open write head leads. fWD < 15 MHz
• Write head leads shorted to ground.
• WD frequency is too low.
• Power supply is out of tolerance.
2. Read fault condition
FLT is a low level in read fault condition.
• Open and short MR head. (This function is set by serial register)
♦ Bank write control (refer to ‘Bank write current vs Current accuracy’ characteristic curve)
1. Set the Read mode.
2. Force a certain voltage(min.VCC+1.2V) to FLT/SE pin by using the pull-up resister(Rse=820Ω)
#This operation disables all Fault detection.
3. Set VCC at 3.5 V (in case of Erase mode only)
4. Start the write operation by setting R/XW = “L”.
5. Terminate the write operation by setting R/XW = “H”.
i) Allow 50 % write duty or less.
ii) Low voltage detector is disabled in Bank Write mode and Erase mode.
iii) Don’t change the serial register data bits in following conditions :
)
VCC=3.5 V
) On entering Write data
♦ BHV (Buffered Head Voltage)
1. Applicable within VCC=5 V±5 %
2. Turn BHV on,but turn off MROPN and MRSHT
3. VBHV is determined by basis of VCC. VBHV =VCC–4 × IB × (RMR+5.5 Ω)
♦ Head select table
6ch
Head select,
HS2
HS1
HS0
Normal operation
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
2
3
4
5
none
none
—16—
CXA3238TN/CXA3239TN
♦ Head select table
4ch
Head select,
HS2
HS1
HS0
Normal operation
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
2
3
none
none
none
none
♦ MR Bias
IB2
IB1
IB0
IB (mA)
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
3.0
3.714
4.429
5.143
5.857
6.571
7.286
8.0
—17—
CXA3238TN/CXA3239TN
♦ Write current
Write current
IW3
IW2
IW1
IW0
(mA 0-P)
15
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
(*1) Actual head current is defined by the following equation:
Ihead=Iw/ (I+Rh/Rd)
Rh : Head Resistance
Rd : Damping Resistance
(*2) Short X-Y terminal on un-used head
—18—
CXA3238TN/CXA3239TN
♦ 6ch CXA3238TN
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
1
2
RS
R5Y
R5X
W5Y
W5X
W4X
W4Y
R4X
R4Y
R3Y
R3X
W3Y
W3X
W2X
W2Y
R2X
R2Y
R1Y
R1X
SCLK
SDATA
WDX
WDY
VCC
3
4
5
6
7
GND
RDY
8
9
RDX
10
11
12
13
14
15
16
17
18
19
FLT/SE/BHV
R/XW
SDEN
CAP
VEE
W0X
W0Y
R0X
R0Y
W1X
W1Y 20
TSSOP 38Pin 0.5 mm pitch
Package dimension including leads 6.4 × 9.7 mm
—19—
CXA3238TN/CXA3239TN
♦ 4ch CXA3239TN
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
1
2
RS
R3Y
R3X
W3Y
W3X
W2X
W2Y
R2X
R2Y
W1X
W1Y
R1X
R1Y
R0Y
R0X
W0Y
W0X
NC
SCLK
SDATA
WDX
WDY
VCC
3
4
5
6
7
GND
RDY
RDX
FLT/SE/BHV
NC
8
9
10
11
12
13
14
15
16
17
18
NC
NC
NC
NC
R/XW
SDEN
CAP
NC
19 VEE
VEE 20
TSSOP 38Pin 0.5 mm pitch
Package dimension including leads 6.4 × 9.7 mm
—20—
CXA3238TN/CXA3239TN
Application Circuit
CXA3238TN
7.5kΩ
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
1
2
RS
R5Y
R5X
W5Y
W5X
W4X
W4Y
R4X
R4Y
R3Y
R3X
W3Y
W3X
W2X
W2Y
R2X
R2Y
R1Y
R1X
W1Y
SCLK
SDATA
WDX
WDY
VCC
3
4
5
5V
6
0.1µF
7
GND
RDY
8
9
RDX
10
11
12
13
14
15
16
17
18
19
FLT/SE/BHV
R/XW
SDEN
CAP
0.1µF
–3V
VEE
0.1µF
W0X
W0Y
R0X
R0Y
W1X
—21—
CXA3238TN/CXA3239TN
CXA3239TN
7.5kΩ
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
1
2
RS
R3Y
R3X
W3Y
W3X
W2X
W2Y
R2X
R2Y
W1X
W1Y
R1X
R1Y
R0Y
R0X
W0Y
W0X
NC
SCLK
SDATA
WDX
WDY
VCC
3
4
5
5V
6
0.1µF
7
GND
RDY
RDX
FLT/SE/BHV
NC
8
9
10
11
12
13
14
15
16
17
18
NC
NC
NC
NC
R/XW
SDEN
CAP
NC
0.1µF
19 VEE
VEE 20
–3V
0.1µF
—22—
CXA3238TN/CXA3239TN
Measurement Spec.Circuit
25Ω
7.5kΩ
38
1
2
RS
R5Y
37
SCLK
SDATA
WDX
WDY
VCC
R5X
25Ω
36
3
W5Y
180nH
35
4
W5X
VCC
V WDX
34
5
W4X
3300µH
V1
S7
180nH
V WDY
1000pF
1µF
33
6
W4Y
S6
25Ω
VPSRR
R13
32
7
GND
RDY
RDX
R4X
10µF
1k
25Ω
Amp1 Gain=×1
31
8
R4Y
0.1µF
25Ω
30
9
R3Y
V
VM1
CXA3238TN
VCC
2.4k
R14
1k
0.1µF
10
11
12
13
14
15
16
17
18
19
29
V
FLT/SE/BHV
R/XW
SDEN
CAP
R3X
25Ω
VSE
Amp2 Gain=×100
28
27
26
25
24
23
22
21
20
W3Y
W3X
W2X
W2Y
R2X
R2Y
R1Y
R1X
W1Y
180nH
V R/XW
3300µH
BPF
10µF
S6’
100kHz
to 50MHz
1µF
1kΩ
180nH
VPSRR’
S7’
VEE
V
VM2
S/I
0.1µF
VEE
25Ω
25Ω
W0X
180nH
W0Y
25Ω
25Ω
25Ω
R0X
R0Y
25Ω
W1X
180nH
—23—
CXA3238TN/CXA3239TN
25Ω
7.5kΩ
38
1
2
RS
R3Y
37
SCLK
SDATA
WDX
WDY
VCC
R3X
25Ω
36
3
W3Y
180nH
35
4
W3X
VCC
V1
V WDX
34
5
W2X
3300µH
S7
180nH
V WDY
1000pF
1µF
33
6
W2Y
S6
25Ω
VPSRR
32
7
GND
RDY
RDX
R2X
R13
1k
10µF
25Ω
Amp1 Gain=×1
31
8
R2Y
0.1µF
30
9
W1X
V
VM1
CXA3239TN
VCC
2.4k
R14
1k
0.1µF
180nH
10
11
12
13
14
15
16
17
18
29
V
FLT/SE/BHV
W1Y
25Ω
VSE
Amp2 Gain=×100
28
27
26
25
24
23
22
21
NC
R1X
R1Y
R0Y
R0X
W0Y
W0X
NC
25Ω
NC
BPF
100kHz
to 50MHz
25Ω
25Ω
NC
1kΩ
NC
V
VM2
S/I
NC
180nH
R/XW
SDEN
CAP
V R/XW
3300µH
10µF
S6’
NC
1µF
VPSRR’
S7’
19 VEE
VEE 20
0.1µF
VEE
—24—
CXA3238TN/CXA3239TN
Normalized bias current vs Ambient temperature
Normalized bias current vs Power supply voltage
1.04
1.02
1.04
1.02
VCC=5V
VEE=–3V
RMR=50Ω
IBn=“100”
Low gain
Ta=25°C
VEE=–3V
RMR=50Ω
IBn=“100”
Low gain
1
0.98
0.96
1
0.98
0.96
–25.0
0.0
25.0
50.0
75.0
3.5
4
4.5
5
5.5
6
6.5
Ambient temperature Ta (°C)
VCC (V)
Normalized read amplifier voltage gain
vs Ambient temperature
Normalized read amplifier voltage gain
vs Power supply voltage
1.04
1.02
1.04
1.02
VEE=–3V
RMR=50Ω
IBn=“100”
Low gain
Ta=25°C
VCC=5V
VEE=–3V
RMR=50Ω
IBn=“100”
Low gain
1
0.98
0.96
1
0.98
0.96
–25.0
0.0
25.0
50.0
75.0
3.5
4
4.5
5
5.5
6
6.5
Ambient temperature Ta (°C)
VCC (V)
Bank write current vs Current accuracy
8
6
VCC=5V
Ta=25°C
Bank Write (A3238)
Bank Write (A3239)
4
RH=0Ω
Read 170µs
Write 30µs
2
0
–2
–4
–6
–8
10
15
20
25
30
35
40
45
50
Bank write current (mA)
Deviation of Bank write current is within ±7% at basis of
the chart
—25—
CXA3238TN/CXA3239TN
Input refered noise voltage vs Ambient temperature
Normalized write current vs Ambient temperature
0.82
0.8
1.04
1.02
1
VCC=5V
VCC=5V
VEE=–3V
RMR=50Ω
IBn=“100”
VEE=–3V
IWn=“1000”
0.78
0.76
0.74
0.72
0.7
0.98
0.96
–25.0
0.0
25.0
50.0
75.0
Ambient temperature Ta (°C)
–25.0
0.0
25.0
50.0
75.0
Ambient temperature Ta (°C)
Normalized write current vs Power supply voltage
Power supply ON/OFF detector threshold voltage
vs Ambient temperature
1.04
1.02
1
4.15
4.1
ON→OFF
OFF→ON
VEE=–3V
IWn=“1000”
Ta=25°C
4.05
4
0.98
0.96
3.95
3.9
3.5
4
4.5
5
5.5
6
6.5
VCC (V)
3.85
–25.0
0.0
25.0
50.0
75.0
Ambient temperature Ta (°C)
—26—
CXA3238TN/CXA3239TN
Package Outline Unit : mm
38PIN TSSOP(PLASTIC)
1.2MAX
9.8 ± 0.2
0.1
20
38
A
1
19
0.5
0.225 ± 0.075
0.1
M
0.25
0.05MIN
0° to 10°
DETAILA
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
EPOXY RESIN
SOLDER PLATING
SONY CODE
EIAJ CODE
TSSOP-38P-L121
LEAD MATERIAL
PACKAGE MASS
COPPER ALLOY
0.1g
JEDEC CODE
—27—
相关型号：
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