STT6405 [SECOS]
P-Channel Enhancement Mode Mos.FET; P沟道增强模式Mos.FET
| 型号： | STT6405 |
| 厂家： | 
SECOS HALBLEITERTECHNOLOGIE GMBH |
| 描述： | P-Channel Enhancement Mode Mos.FET |
| 文件： | 总4页 (文件大小：954K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STT6405
-5.0 A, -30 V, RDS(ON) 50 mΩ
P-Channel Enhancement Mode Mos.FET
Elektronische Bauelemente
RoHS Compliant Product
A suffix of “-C” specifies halogen and lead-free
DESCRIPTION
The STT6405 uses advanced trench technology to provide excellent on-resistance with low gate change. The device is
suitable for use as a load switch or in PWM applications.
FEATURES
z N-Channel
z Lower Gate Charge
z Small Footprint & Low Profile Package
PACKAGE DIMENSIONS
Millimeter
Min. Max.
1.10 Max
Millimeter
Min. Max.
REF.
REF.
0.45 Ref
A
A1
A2
c
D
E
L
L1
0
0.10
1.00
0.60 Ref
0.70
0°
0.30
10°
0.12 Ref
0.50
b
e
e1
2.70
2.60
1.40
3.10
3.00
1.80
0.95 Ref
1.90 Ref
E1
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Ratings
Unit
Drain-Source Voltage
Gate-Source Voltage
VDS
VGS
-30
±12
V
V
ID @TA=25℃
ID @TA=70℃
IDM
-5.0
-4.2
-20
2
Continuous Drain Current (TJ=150℃)
A
Pulsed Drain Current
A
W
Power Dissipation
PD @TA=25℃
Linear Derating Factor
0.016
-55 ~ +150
W/℃
℃
Operating Junction and Storage Temperature Range
Tj, Tstg
Parameter
Symbol
Ratings
Unit
Thermal Resistance- Junction to Ambient3
RθJA
62.5
℃/W
Max.
01-June-2005 Rev. A
Page 1 of 4
STT6405
-5.0 A, -30 V, RDS(ON) 50 mΩ
P-Channel Enhancement Mode Mos.FET
Elektronische Bauelemente
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Parameter
Symbol Min Typ
Max Unit
Test Conditions
VGS = 0, ID= -250 uA
VDS = VGS, ID= -250 uA
Drain-Source Breakdown Voltage
Gate Threshold Voltage
BVDSS
-30
-
-
-
-
V
V
VGS(th) -1.0
-3.0
Gate-Source Leakage Current
Drain-Source Leakage Current (Tj=25℃)
Drain-Source Leakage Current (Tj=55℃)
IGSS
IDSS
-
±100 nA VGS = ±20 V
-
-
-
-
-
-
-1
-5
50
75
-
VDS = -30 V, VGS = 0
uA
VDS = -24 V, VGS = 0
VGS = -10 V, ID = -5.0 A
VGS = -4.5 V, ID = -4.0 A
VDS = -5V, ID = -5.0A
Static Drain-Source On-Resistance2
RDS(ON)
mΩ
Forward Transconductance
Total Gate Charge2
Gate-Source Charge
Gate-Drain (“Miller”) Charge
Turn-on Delay Time2
Rise Time
gfs
Qg
-
-
-
-
-
-
-
-
-
8.6
S
14.7 18
ID = -5.0 A
nC
ns
V
V
DS = -15 V
GS = -10 V
2
-
-
-
-
-
-
Qgs
Qgd
Td(on)
Tr
3.8
8.3
5
V
V
DS = -15 V
GS = -10 V
RG = 3 Ω
RL = 3 Ω
Turn-off Delay Time
Fall Time
29
14
Td(off)
Tf
Input Capacitance
Ciss
700 840
VGS = 0 V
pF
V
DS = -15 V
Output Capacitance
Coss
Crss
Rg
-
-
-
120
75
-
-
-
f = 1.0 MHz
Reverse Transfer Capacitance
Gate Resistance
10
Ω
f=1.0 MHz
SOURCE-DRAIN DIODE
Parameter
Symbol Min Typ
Max Unit
Test Conditions
Forward On Voltage2
Reverse Recovery Time2
VSD
Trr
-
-
-
-
-1.0
V
IS = -1.0 A, VGS= -0 V
23.5
13.4
-
-
ns
nC
IS = -5.0A, VGS=0V, dl/dt=
100A/us
Reverse Recovery Charge
Qrr
Notes:
1. Pulse width limited by Max. junction temperature.
2. Pulse width≦300us, duty cycle≦2%.
3. Surface mounted on 1 in2 copper pad of FR4 board; 156℃/W when mounted on Min. copper pad.
01-June-2005 Rev. A
Page 2 of 4
STT6405
-5.0 A, -30 V, RDS(ON) 50 mΩ
P-Channel Enhancement Mode Mos.FET
Elektronische Bauelemente
CHARACTERISTIC CURVES
01-June-2005 Rev. A
Page 3 of 4
STT6405
-5.0 A, -30 V, RDS(ON) 50 mΩ
P-Channel Enhancement Mode Mos.FET
Elektronische Bauelemente
CHARACTERISTIC CURVES
01-June-2005 Rev. A
Page 4 of 4
相关型号：
STT6602
N-Ch: 3.3A, 30V, RDS(ON) 65 m P-Ch: -2.3A, -30V, RDS(ON) 120 m N & P-Channel Enhancement Mode Mos.FET
SECOS
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