STT6405_09 [SECOS]

P-Channel Enhancement Mode Mos.FET; P沟道增强模式Mos.FET
STT6405_09
型号: STT6405_09
厂家: SECOS HALBLEITERTECHNOLOGIE GMBH    SECOS HALBLEITERTECHNOLOGIE GMBH
描述:

P-Channel Enhancement Mode Mos.FET
P沟道增强模式Mos.FET

文件: 总3页 (文件大小:861K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
STT6405  
-5.0 A, -30 V, RDS(ON) 50 m  
P-Channel Enhancement Mode Mos.FET  
Elektronische Bauelemente  
RoHS Compliant Product  
A suffix of “-C” specifies halogen and lead-free  
TSOP-6  
DESCRIPTION  
The STT6405 uses advanced trench technology  
to provide excellent on-resistance with low gate change.  
The device is suitable for use as a load switch or in PWM applications.  
A
E
L
B
FEATURES  
P-Channel  
Lower Gate Charge  
Small Footprint & Low Profile Package  
F
C
H
J
K
D G  
Drain  
MARKING CODE  
1256  
Millimeter  
Millimeter  
REF.  
REF.  
D 6 D 5 S 4  
Min.  
Max.  
Min.  
Max.  
A
B
C
D
E
F
2.70  
2.60  
1.40  
1.10 MAX.  
1.90 REF.  
3.10  
3.00  
1.80  
G
H
J
K
L
0
0.10  
0.60 REF.  
0.12 REF.  
0°  
3
Gate  
6 4 0 5  
10°  
ꢀꢀꢀꢀ  
= Date Code  
0.95 REF.  
0.30  
0.50  
4
Source  
1
2
3
G
D
D
ABSOLUTE MAXIMUM RATINGS  
PARAMETER  
SYMBOL  
RATINGS  
UNIT  
Drain-Source Voltage  
Gate-Source Voltage  
VDS  
VGS  
-30  
±20  
V
V
ID @TA=25  
ID @TA=70℃  
IDM  
-5.0  
-4.2  
-20  
2
Continuous Drain Current 3  
Pulsed Drain Current 1  
Power Dissipation  
A
A
W
PD @TA=25℃  
Linear Derating Factor  
0.016  
-55 ~ +150  
62.5  
W/ ℃  
/ W  
Operating Junction and Storage Temperature Range  
Tj, Tstg  
RθJA  
Thermal Resistance- Junction to Ambient3  
Max.  
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)  
PARAMETER  
SYMBOL MIN TYP MAX UNIT  
TEST CONDITIONS  
Drain-Source Breakdown Voltage  
Gate Threshold Voltage  
Forward Transconductance  
Gate-Source Leakage Current  
Drain-Source Leakage Current (Tj=25)  
Drain-Source Leakage Current (Tj=55)  
Static Drain-Source On-Resistance2  
Total Gate Charge2  
Gate-Source Charge  
Gate-Drain (“Miller”) Charge  
Turn-on Delay Time2  
Rise Time  
Turn-off Delay Time  
Fall Time  
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
BVDSS  
VGS(th)  
gfs  
-30  
-1.0  
-
-
-
V
V
S
VGS = 0, ID= -250 µA  
VDS = VGS, ID= -250µA  
VDS = -5V, ID = -5.0A  
-3.0  
-
±100  
-1  
-5  
50  
75  
18  
-
-
-
-
-
-
-
-
-
-
8.6  
IGSS  
-
-
-
-
nA VGS = ±20 V  
VDS = -30 V, VGS = 0  
IDSS  
µA  
VDS = -24 V, VGS = 0  
VGS = -10 V, ID = -5.0 A  
VGS = -4.5 V, ID = -4.0 A  
ID = -5.0 A  
RDS(ON)  
mΩ  
Qg  
Qgs  
Qgd  
Td(on)  
Tr  
Td(off)  
Tf  
Ciss  
Coss  
Crss  
Rg  
-
-
-
-
-
-
-
-
-
-
-
14.7  
2
3.8  
8.3  
5
nC VDS = -15 V  
VGS = -10 V  
VDS = -15 V  
VGS = -10 V  
RG = 3Ω  
RL = 3Ω  
ns  
29  
14  
-
700 840  
120  
75  
V
GS = 0 V  
pF VDS = -15 V  
f = 1.0 MHz  
-
-
-
10  
f=1.0 MHz  
SOURCE-DRAIN DIODE  
Forward On Voltage2  
VSD  
Trr  
-
-
-
-
-1.0  
-
-
V
ns  
nC  
IS = -1.0 A, VGS= 0 V  
IS = -5.0A, VGS=0V,  
dl/dt= 100A/µs  
Reverse Recovery Time2  
Reverse Recovery Charge  
23.5  
13.4  
Qrr  
Notes:  
1. Pulse width limited by Max. junction temperature.  
2. Pulse width300µs, duty cycle2%.  
3. Surface mounted on 1 in2 copper pad of FR4 board; 156/W when mounted on Min. copper pad.  
28-Oct-2009 Rev. B  
Page 1 of 3  
STT6405  
-5.0 A, -30 V, RDS(ON) 50 mΩ  
P-Channel Enhancement Mode Mos.FET  
Elektronische Bauelemente  
CHARACTERISTIC CURVES  
28-Oct-2009 Rev. B  
Page 2 of 3  
STT6405  
-5.0 A, -30 V, RDS(ON) 50 mΩ  
P-Channel Enhancement Mode Mos.FET  
Elektronische Bauelemente  
CHARACTERISTIC CURVES  
28-Oct-2009 Rev. B  
Page 3 of 3  

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