LV8136V [SANYO]
Bi-CMOS IC For Brushless Motor Drive Direct PWM Drive, Quiet Predriver IC; BI - CMOS IC的无刷电机驱动器直接PWM驱动，静音预驱动器IC
| 型号： | LV8136V |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | Bi-CMOS IC For Brushless Motor Drive Direct PWM Drive, Quiet Predriver IC |
| 文件： | 总19页 (文件大小：231K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA2005
Bi-CMOS IC
For Brushless Motor Drive
LV8136V
Direct PWM Drive, Quiet Predriver IC
Overview
The LV8136V is a PWM system predriver IC designed for three-phase brushless motors.
This IC reduces motor driving noise by using a high-efficiency, quiet PWM drive (150-degree drive system).
It incorporates a full complement of protection circuits and, by combining it with a hybrid IC in the STK611 or STK5C4
series, the number of components used can be reduced and a high level of reliability can be achieved. Furthermore, its
power-saving mode enables the power consumption in the standby mode to be reduced to zero. This IC is optimally
suited for driving various large-size motors such as those used in air conditioners and hot-water heaters.
Features
• Three-phase bipolar drive
• Quiet PWM drive (150-degree current-carrying)
• Supports drive phase control (15-degree lead angle for 150-degree current-carrying drive. From this state, a lead angle
from 0 to 28 degrees can be set in 16 steps)
• Supports power saving mode(power saving mode at CTL pin voltage of 1.0V (typ) or less; I
off)
= 0mA, HB pin turned
CC
• Supports bootstrap (maximum duty limit)
• Automatic recovery type constraint protection circuit
• Forward/reverse switching circuit, Hall bias pin
• Current limiter circuit, low-voltage protection circuit, and thermal shutdown protection circuit
• FG1 and FG3 output (360-degree electrical angle/1 pulse and 3 pulses)
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment. The products mentioned herein
shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life,
aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system,
safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives
in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any
guarantee thereof. If you should intend to use our products for new introduction or other application different
from current conditions on the usage of automotive device, communication device, office equipment, industrial
equipment etc. , please consult with us about usage condition (temperature, operation time etc.) prior to the
intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely
responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
's products or
equipment.
20812 SY PC 20120119-S000021 No.A2005-1/19
LV8136V
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
V
Supply voltage
V
I
max
V
pin
CC
18
15
CC
Output current
max
mA
W
W
V
O
Allowable power dissipation
Pd max1
Pd max2
Independent IC
0.45
1.05
18
Mounted on a specified circuit board.*
CTL pin applied voltage
V
max
CTL
FG1,FG3 pin applied voltage
V
V
1 max
18
V
FG
FG
3 max
Junction temperature
Operating temperature
Storage temperature
Tj max
Topr
150
-40 to +105
-55 to +150
°C
°C
°C
Tstg
* Specified circuit board : 114.3mm × 76.1mm × 1.6mm, glass epoxy
Note 1) Absolute maximum ratings represent the values that cannot be exceeded for any length of time.
Note 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current,
high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for further details.
Allowable Operating range at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
V
Supply voltage range
V
I
9.5 to 16.5
CC
5V constant voltage output current
HB pin output current
10
30
10
mA
mA
mA
REG
HB
I
I
FG1,FG3 pin output current
1, I 3
FG FG
Electrical Characteristics at Ta = 25°C, V
= 15V
CC
Ratings
typ
Parameter
Symbol
1
Conditions
Unit
min
max
8.0
20
Supply current 1
I
I
5.0
mA
CC
Supply current 2
2
At stop CTL ≤ 1.0V typ
0
μA
CC
Output Block
High level output voltage
Low level output voltage
Lower output ON resistance
Upper output ON resistance
Output leakage current
Minimum output pulse width
Output minimum dead time
5V Constant Voltage Output
Output voltage
V
V
I
I
I
I
= -10mA
= 10mA
= 10mA
= -10mA
VREG-0.35 VREG-0.15
V
V
HO
O
O
O
O
0.15
15
0.3
30
LO
R
R
L
Ω
ON
H
15
35
Ω
ON
I
leak
10
μA
μs
μs
O
Tmin
Tdt
2.0
2.0
4.0
4.0
VREG
I
= -5mA
4.7
5.0
5.3
100
100
V
O
Voltage fluctuation
ΔV (REG1)
ΔV (REG2)
V
= 9.5 to 16.5V, I = -5mA
mV
mV
CC
I = -5 to -10mA
O
O
Load fluctuation
Hall Amplifier
Input bias current
IB (HA)
VICM1
VICM2
-2
0.3
0
0
VREG-1.7
VREG
μA
V
Common-mode input voltage range 1
Common-mode input voltage range 2
When a Hall element is used
Single-sided input bias mode
(when a Hall IC is used)
Sine wave,
V
Hall input sensitivity
VHIN
80
mVp-p
Hall element offset = 0V
Hysteresis width
ΔV (HA)
9
5
20
11
40
19
-5
mV
mV
mV
IN
Input voltage Low Æ High
Input voltage High Æ Low
VSLH
VSHL
-19
-11
Continued on next page.
No.A2005-2/19
LV8136V
Continued from preceding page.
Ratings
typ
Parameter
Symbol
(CSD)
Conditions
Unit
min
max
CSD Oscillator Circuit
High level output voltage
Low level output voltage
Amplitude
V
V
2.7
0.8
3.0
3.3
1.2
V
V
OH
(CSD)
1.0
2.0
-10
10
OL
V (CSD)
1.75
-17
4
2.25
-4
Vp-p
μA
μA
External capacitor charging current
ICHG1 (CSD)
ICHG2 (CSD)
VCHG1 = 2.0V
External capacitor discharging
current
VCHG2 = 2.0V
17
Oscillation frequency
f (CSD)
C = 0.22μF (design target value)
113.6
Hz
PWM Oscillator (PWM pin)
High level output voltage
Low level output voltage
Amplitude
V
V
(PWM)
(PWM)
3.3
1.3
3.5
1.5
2.0
17
3.8
1.7
V
V
OH
OL
V (PWM)
f (PWM)
1.78
2.22
Vp-p
kHz
Oscillation frequency
C = 2200pF, R = 15kΩ
(design target value)
Current Limiter Operation
Limiter voltage
VRF
0.225
150
0.25
0.275
V
Thermal Shutdown Protection Operation
Thermal shutdown protection
operating temperature
Hysteresis width
TSD
* Design target value
(junction temperature)
* Design target value
(junction temperature)
175
35
°C
°C
ΔTSD
TH pin
Protection start voltage
Hysteresis width
HB pin
VTH
0.25
0.2
0.6
0.4
1.05
0.6
V
V
ΔVTH
Output ON resistance
Output leakage current
R
(HB)
IHB = 10mA
15
30
10
Ω
ON
(HB)
I
Power saving mode V
= 15V
μA
L
CC
Low Voltage Protection Circuit (detecting V
voltage)
CC
VSD
ΔVSD
Operation voltage
7.0
8.0
0.5
9.0
V
V
Hysteresis width
0.25
0.75
FG1 FG3 Pin
Output ON resistance
Output leakage current
CTL Amplifier (drive mode)
Input voltage range
High level input voltage
Middle level input voltage
CTL Amplifier (power saving mode)
Low level input voltage
Hysteresis width
R
(FG)
IFG = 5mA
VFG = 18V
40
60
10
Ω
ON
(FG)
I
μA
L
V
V
V
(CTL)
(CTL)
(CTLI)
0
5.1
1.8
VCC
5.7
V
V
V
IN
IH
IM
PWM ON duty 90%
PWM ON duty 0%
5.4
2.1
2.4
V
1 (CTL)
Power saving mode
CTL = 3.5V
1.0
0.5
18
1.5
0.85
26
V
V
IL
ΔCTL
0.15
10
Input current
I
(CTLI)
μA
IH
F/R Pin
High level input voltage
Low level input voltage
Input open voltage
V
V
V
V
(FR)
3.0
0
VREG
0.7
V
V
IH
(FR)
(FR)
(FR)
IL
0
0.31
50
0.3
V
IO
IS
Hysteresis width
0.21
10
0.41
100
+10
V
High level input current
Low level input current
I
I
(FR)
(FR)
VF/R = VREG
VF/R = 0V
μA
μA
IH
IL
-10
0
Continued on next page.
No.A2005-3/19
LV8136V
Continued from preceding page.
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
FAULT Pin
Drive stop voltage
VFOF
VFON
(FLT)
0
3.0
4.6
0.35
V
V
Drive start voltage
VREG
Input open voltage
V
VREG
0
V
IO
High level input current
Low level input current
ADP1 Pin (drive phase adjustment)
Minimum lead angle
Maximum lead angle
I
I
(FLT)
VFLT=VREG
10
μA
μA
IH
IL
(FLT)
VFLT=0V
-250
-160
-70
Vadp01
Vadp16
ADP
ADP1 pin = 0V
0
28
2
2
Deg
Deg
A/A
ADP1 pin = VREG
CTL = 3.75V, IADP1/IADP2
26
Current ratio with the ADP2 pin
current
1.45
2.55
ADP2 Pin (drive phase adjustment)
High level output voltage
Low level output voltage
VADP2H
VADP2L
CTL = 5.4V
CTL = 0V
1.95
0
2.5
3.05
0.51
V
V
DPL Pin (drive-phase-adjustment limit setting pin)
Lead angle limit high level voltage
Lead angle limit low level voltage
VDPLH
VDPLL
3.3
1.3
3.5
1.5
3.8
1.7
V
V
* These are design target values and no measurements are made.
No.A2005-4/19
LV8136V
Package Dimensions
unit : mm (typ)
3191C
Pd max – Ta
1.5
1.0
Specified circuit board : 114.3 × 76.1 × 1.6mm3
glass epoxy
9.75
30
Mounted on a specified circuit board.
Independent IC
0.5
1
0.38
0.65
0.22
0.15
(0.33)
0.16
0
--40
--20
0
20
40
60
80
100
120
Ambient temperature, Ta -- °C
SANYO : SSOP30(275mil)
Pin Assignment
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
LV8136V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Top view
No.A2005-5/19
LV8136V
Sample Application Circuit 1 (Hall element, HIC)
No.A2005-6/19
LV8136V
Sample Application Circuit 2 (Hall IC, HIC)
Note : The Hall IC to be used must be of open collector or open drain type (no internal pull-up resistor connected to the
output).
No.A2005-7/19
LV8136V
Sample Application Circuit 3 (Hall element, FET)
No.A2005-8/19
LV8136V
Sample Application Circuit 4 (Hall IC, FET)
Note: The Hall IC to be used must be of open collector or open drain type (no internal pull-up resistor connected to the
output).
No.A2005-9/19
LV8136V
Pin Functions
Pin No.
Pin Name
+
IN1
Pin function
Hall signal input pins.
Equivalent Circuit
1
2
3
4
5
6
VREG
-
+
IN1
IN2
IN2
IN3
IN3
The high state is when IN is greater
+
-
-
than IN , and the low state is the
reverse.
+
-
An amplitude of at least 100mVp-p
(differential) is desirable for the Hall
signal inputs. If noise on the Hall signals
is a problem, insert capacitors between
500Ω
500Ω
+
-
IN and IN pins.
1
3
5
2
4
6
If input is provided from a Hall IC, the
common-mode input range can be
expanded by biasing either + or -.
7
8
GND
Ground pin of the control circuit block.
V
Power supply pin for control.
CC
Insert a capacitor between this pin and
ground to prevent the influence of noise,
etc.
9
CTL
Control input pin. When CTL pin voltage
rises, the IC changes the output signal
PWM duty to increase the torque output.
VREG
VREG
VREG
V
CC
65kΩ
9
125kΩ
10
DPL
Setting pin for drive phase adjustment
limit.
This pin is used to limit the lead angle of
the drive phase. The lead angle is
limited to zero degrees when the voltage
is 1.5V or lower and the limit is released
when the voltage is 3.5V or higher.
500Ω
10
11
12
FG3
FG1
FG3 : 3-Hall FG signal output pin.
8-pole motor outputs 12 FG pulses per
one rotation. In power saving mode,
high-level is output.
11 12
25Ω
FG1 :1-Hall FG signal output pin.
8-pole motor outputs 4 pulses per one
rotation. In power saving mode,
high-level is output.
Continued on next page.
No.A2005-10/19
LV8136V
Continued from preceding page.
Pin No.
13
Pin Name
ADP2
Pin function
Equivalent Circuit
Setting pin for phase drive correction.
This pin sets the amount of correction
made to the lead angle according to the
CTL input. Insert a resistor between this
pin and ground to adjust the amount of
correction.
V
CC
VREG
VREG
500Ω
500Ω
13
14
CSD
Pin to set the operating time of the motor
constraint protection circuit.
VREG
Insert a capacitor between this pin and
ground. This pin must be connected to
ground if the constraint protection circuit
is not used.
500Ω
500Ω
14
15
ADP1
Drive phase adjustment pin.
V
VREG
CC
The drive phase can be advanced from
0 to 28 degrees during 150-degree
current carrying drive. The lead angle
becomes 0 degrees when 0V is input
and 28 degrees when 5V is input.
500Ω
AD
15
500Ω
16
CPWM
Triangle wave oscillation pin for PWM
generation.
VREG
Insert a capacitor between this pin and
ground and a resistor between this pin
and RPWM for triangle wave oscillation.
200Ω
16
17
RPWM
Oscillation pin for PWM generation.
Insert a resistor between this pin and
CPWM.
VREG
17
Continued on next page.
No.A2005-11/19
LV8136V
Continued from preceding page.
Pin No.
Pin Name
FR
Pin function
Equivalent Circuit
VREG
18
20
FR
TGND
Forward/reverse rotation setting pin.
A low-level specifies forward rotation
and a high-level specifies reverse
rotation. This pin is held low when open.
2kΩ
18 20
TGND
Test pin. Connect this pin to ground.
100kΩ
19
VREG5
5V regulator output pin
V
CC
(control circuit power supply).
Insert a capacitor between this pin and
ground for power stabilization.
0.1μF or so is desirable.
50Ω
19
21
RF
Output current detection pin.
This pin is used to detect the voltage
across the current detection resistor
(Rf).
VREG
The maximum output current is
determined by the equation I
0.25V/Rf.
=
OUT
5kΩ
21
22
TH
Thermistor connection pin.
VREG
The thermistor detects heat generated
from HIC and turns off the drive output
when an overheat condition occurs.
If the pin voltage is 0.6V or lower, the
drive output is turned off.
500Ω
22
Continued on next page.
No.A2005-12/19
LV8136V
Continued from preceding page.
Pin No.
23
Pin Name
FAULT
Pin function
Equivalent Circuit
HIC protection signal input pin.
This pin accepts an error mode
VREG
detection signal generated by the HIC
side.
30kΩ
500Ω
A low-level indicates that an error mode
is detected and turns off the drive
output.
23
24
25
26
27
28
29
LIN3
LIN2
LIN1
HIN3
HIN2
HIN1
LIN1, LIN2, and LIN3 :
L-side output pins.
Generate 0 to VREG5 push-pull
outputs.
VREG
25 27 29
24 26 28
HIN1, HIN2, and HIN3 :
H-side output pins.
Generate 0 to VREG5 push-pull
outputs.
500Ω
30
HB
Hall bias HIC power supply pin.
Insert a capacitor between this pin and
ground.
V
CC
This pin is set to high-impedance state
in power saving mode. By supplying Hall
bias and HIC power using this pin, the
power consumption by Hall bias and
HIC in power saving mode can be
reduced to zero.
30
No.A2005-13/19
LV8136V
+
-
Timing Chart (IN = “H”indicates the state in which IN is greater than IN .)
(1) F/R pin = L
Normal hall input LA=0
+
-
IN1
IN1
+
-
IN2
IN2
+
-
IN3
IN3
IN1
IN2
IN3
H
L
H
L
L
H
H
L
L
H
L
L
H
H
L
L
H
L
H
L
L
H
H
L
L
H
L
L
H
H
L
L
H
H
H
H
F/R="L"120° energization
HIN1 ON
PWM
PWM
UOUT OFF
LIN1 ON
HIN2 ON
PWM
PWM
PWM
VOUT OFF
LIN2 ON
HIN3 ON
PWM
WOUT OFF
LIN3 ON
F/R="L"150° energization
HIN1 ON
PWM
ON PWM SOFF
PWM
ON PWM SOFF
UOUT OFF
LIN1 ON
PWM
ON
SOFF
PWM
ON
SOFF
HIN2 ON
ON PWM SOFF
PWM
ON PWM SOFF
PWM
VOUT OFF
LIN2 ON
PWM
ON
SOFF
PWM
ON
SOFF
HIN3 ON
PWM
ON PWM SOFF
PWM
ON PWM SOFF
WOUT OFF
LIN3 ON
SOFF
PWM
ON
SOFF
PWM
ON
SOFF
F/R="H"120° energization in reverse rotate
HIN1 ON
PWM
PWM
UOUT OFF
LIN1 ON
HIN2 ON
PWM
PWM
VOUT OFF
LIN2 ON
HIN3 ON
PWM
PWM
WOUT OFF
LIN3 ON
3 HALL FG
1 HALL FG
The energization is switched to 120° when 3 Hall FG frequency is 6.1Hz (TYP) or lower
A direction of rotation is detected from Hall signal according to F/R pin input
If the motor rotates in reverse against F/R pin input, 120° energization is maintained forcibly.
No.A2005-14/19
LV8136V
(2) F/R pin = H
Reverse hall input LA=0
+
IN1
-
IN1
+
IN2
-
IN2
+
IN3
-
IN3
IN1
IN2
IN3
L
L
L
H
H
L
H
L
H
H
L
H
L
L
H
L
L
L
L
H
H
L
H
L
H
H
L
H
L
L
H
L
H
H
H
H
F/R="L"120° energization
HIN1 ON
PWM
PWM
UOUT OFF
LIN1 ON
HIN2 ON
PWM
PWM
VOUT OFF
LIN2 ON
HIN3 ON
PWM
PWM
WOUT OFF
LIN3 ON
F/R="L"150° energization
HIN1 ON
SOFF
PWM
ON PWM SOFF
PWM
ON PWM SOFF
UOUT OFF
LIN1 ON
PWM
ON
SOFF
PWM
ON
SOFF
HIN2 ON
PWM
ON PWM SOFF
PWM
ON PWM SOFF
VOUT OFF
LIN2 ON
ON
SOFF
PWM
ON
SOFF
PWM
ON
HIN3 ON
PWM
ON PWM SOFF
PWM
ON PWM SOFF
WOUT OFF
LIN3 ON
PWM
ON
SOFF
PWM
ON
SOFF
F/R="H"120° energization in reverse rotate
HIN1 ON
PWM
PWM
UOUT OFF
LIN1 ON
HIN2 ON
PWM
PWM
PWM
VOUT OFF
LIN2 ON
HIN3 ON
PWM
PWM
WOUT OFF
LIN3 ON
3 HALL FG
1 HALL FG
The energization is switched to 120° when 3 Hall FG frequency is 6.1Hz (TYP) or lower
A direction of rotation is detected from Hall signal according to F/R pin input
If the motor rotates in reverse against F/R pin input, 120° energization is maintained forcibly.
No.A2005-15/19
LV8136V
Functional Description
• Basic operation of 120-degree ⇔ 150-degree current-carrying switching
At startup, this IC starts at 120-degree current-carrying. The current-carrying is switched to 150 degrees when the 3-Hall
FG frequency is 6.1Hz (typ) or above and the rising edge of the IN2 signal has been detected twice in succession.
Concerning the Hall signal input sequence
°
This IC controls the motor rotation direction commands and Hall signal input sequence in order to set the lead angle. If
the motor rotation direction commands and Hall signal input sequence do not conform to what is shown on the timing
chart, the motor is driven by 120-degree current-carrying.
Example 1 : When the Hall signal has been input with the following logic
IN1
IN2
IN3
H
L
H
H
L
L
H
H
L
L
H
L
L
H
H
L
L
H
→
→
→
→
→
When F/R pin input is high → 120-degree current-carrying
When F/R pin input is low → 150-degree current-carrying
Example 2 : When the Hall signal has been input with the following logic
IN1
IN2
IN3
H
L
H
L
L
H
L
H
H
L
H
L
H
H
L
H
L
L
→
→
→
→
→
When F/R pin input is high → 150-degree current-carrying
When F/R pin input is low → 120-degree current-carrying
• CTL pin input
a) Power-saving mode V
< V (1.0V : typ)
IL
CTL
When the CTL pin voltage is lower than V (1.0V : typ), the IC enters the power-saving mode, and the following are
IL
set :
• L 1 to L 3 and H 1 to H 3 outputs all set to low
IN
CC
IN
IN
IN
• I
= 0, HB pin = OFF
The power consumption of the IC can now be set to 0, and the power consumption of the Hall element connected to
the HB pin and the output block can also be set to 0.
b) Standby mode V < V
IL
< V (2.1V : typ)
IM
CTL
When the CTL pin voltage is V < V
< V , the IC enters the standby mode. Low is output for the U 1 to
IL
CTL
IM IN
U
3 outputs and bootstrap charge pulses (2μs pulse width: design target) are output to the L 1 to L 3 outputs to
IN IN IN
prepare for drive start.
c) Drive mode V < V
< V (5.4V : typ)
CTL IH
IM
When the CTL pin voltage is V < V
< V , the IC enters the drive mode, and the motor is driven at the PWM
IM
CTL
IH
duty ratio corresponding to V
ratio (*90% : typ) is reached at V
IH
. When V is increased, the PWM duty ratio increases, and the maximum duty
CTL
CTL
.
* When the PWM oscillation frequency setting is 17kHz.
d) Test mode 8V < V < V max (design target)
CTL
CTL
When the CTL pin voltage is 8V or higher, the IC enters the test mode, and the motor is driven at the 120-degree
current-carrying and maximum duty ratio.
• The CTL pin is pulled down by 190kΩ : typ inside the IC. Caution is required when the control input voltage input is
subjected to resistance division, for example.
• Bootstrap capacitor initial charging mode
When the mode is switched from the power-saving mode to the standby mode and then to the drive mode, the IC enters
the bootstrap capacitor charging mode (UH, VH, WH pins = L UL, VL, WL pins = H 3.84ms typ) in order to charge the
bootstrap capacitor.
No.A2005-16/19
LV8136V
• Drive phase adjustment
During 150-degree current-carrying drive, current-carrying is started from the phase that is 15 degrees ahead of the
120-degree current-carrying. From this state, any lead angle from 0 to 28 degrees can be set using the ADP1 pin voltage
(lead angle control). This setting can be adjusted in 16 steps (in 1.875-degree increments) from 0 to 28 degrees using the
ADP1 pin voltage, and it is updated every Hall signal cycle (it is sampled at the rising edge of the IN3 input and updated
at its falling edge).
A number of lead angle adjustments proportionate to the CTL pin voltage can be undertaken by adjusting the resistance
levels of resistors connected to the ADP1 pin, ADP2 pin and DPL pin. When these pins are not going to be used,
reference must be made to section 4.5, and the pins must not be used in the open status. Furthermore, a resistance of
47kΩ or more must be used for the resistor (RADP2) that is connected to the ADP2 pin.
1. The slopes of V
ADP1 (pin 15).
and VADP1 can be adjusted by setting the resistance level of the resistor (RADP1) connected to
CTL
VADP1,VADP2[V]
5V
ADP1(RADP1=47kΩ)
28°
VREG
RDPL1 33kΩ
IADP2
IADP1
47kΩ RADP2
RADP1
2.5V
2.34V
ADP2
ADP1(RADP1=22kΩ)
VADP2=(VCTL-2.1)×(2.5/3.3)
IADP2=VADP2/RADP2
IADP1=2×IADP2
VADP1=IADP1×RADP1
VCTL[V]
0V
0°
2.1V
5.4V
2. The ADP2 pin rise can be halted (a limit on the lead angle adjustment can be set by means of the CTL voltage) by
setting DPL (pin 10).
VADP1,VADP2[V]
5V
28°
VREG
RDPL1 33kΩ
IADP2
IADP1
RDPL2 33kΩ 47kΩ RADP2
RADP1
2.5V
ADP1(RADP1=47kΩ)
VADP2=(VCTL-2.1)×(2.5/3.3)
IADP2=VADP2/RADP2
IADP1=2×IADP2
ADP2
ADP1(RADP1=22kΩ)
1.25V
1.17V
VADP1=IADP1×RADP1
DPLLIM=VDPL×1.5
VCTL[V]
0V
0°
2.1V
3.75V
5.4V
3. The offset and slope can be adjusted as desired by setting RADP1 and RADP12 of ADP1 (pin 15). (It is also possible
to set a limit on the lead angle adjustment by means of the CTL voltage by setting DPL.)
VADP1,VADP2[V]
ADP1
5V
28°
(RADP1=47kΩ,RADP12=220kΩ)
VREG
VREG
4.25V
ADP1
(RADP1=33kΩ,RADP12=33kΩ)
RDPL1 33kΩ
RDPL12
IADP2
IADP1
2.5V
ADP2
47kΩ RADP2
RADP1
VADP2=(VCTL-2.1)×(2.5/3.3)
IADP2=VADP2/RADP2
IADP1=2×IADP2
0.88V
VADP1=((RADP1×RADP12)/(RADP1+RADP12))×IADP1
+(RADP1/(RADP1+RADP12))×VREG
VCTL[V]
0V
0°
2.1V
5.4V
4. When the lead angle is not adjusted
ADP1 pin: shorted to ground; ADP2 pin and DPL pin: pulled down to ground using the resistors
5. When the lead angle is not adjusted by means of the CTL pin voltage (for use with a fixed lead angle)
ADP1 pin: lead angle setting by resistance division from VREG; ADP2 pin and DPL pin: pulled down to ground by
the resistors
No.A2005-17/19
LV8136V
Description of LV8136V
1. Current Limiter Circuit
The current limiter circuit limits the output current peak value to a level determined by the equation I = V /Rf (where
RF
V
= 0.25V typ, Rf is the value of the current detection resistor). The current limiter operates by reducing the output
RF
on duty to suppress the current.
The current limiter circuit detects the reverse recovery current of the diode due to PWM operation. To assure that the
current limiting function does not malfunction, its operation has a delay of approx. 1μs. If the motor coils have a low
resistance or a low inductance, current fluctuation at startup (when there is no back electromotive force in the motor)
will be rapid. The delay in this circuit means that at such times the current limiter circuit may operate at a point well
above the set current. Application must take this increase in the current due to the delay into account when the current
limiter value is set.
2. Power Saving Circuit (CTL pin)
This IC goes into the power saving mode that stops operation of all the circuits to reduce the power consumption. If the
HB pin is used for the Hall element bias and the output block, the current consumption in the power-saving mode is
zero.
3. Hall Input Signal
Signals with an amplitude in excess of the hysteresis is required for the Hall inputs. However, considering the influence
of noise and phase displacement, an amplitude of over 100mV is desirable.
If noise disrupts the output waveform (at phase change), this must be prevented by inserting capacitors or other devices
across the Hall inputs. The constraint protection circuit uses the Hall inputs to discriminate the motor constraint state.
Although the circuit is designed to tolerate a certain amount of noise, care is required.
If all three phases of the Hall input signal go to the same input state (HHH or LLL), the outputs are all set to the off
state.
If the outputs from a Hall IC are used, fixing one side of the inputs (either the + or –side) at a voltage within the
common-mode input voltage range (0.3V to VREG-1.7V) allows the other input side to be used as an input over the 0V
to VREG range.
4. Constraint Protection Circuit
This IC goes into the power saving mode that stops operation of all the circuits to reduce the power consumption. If the
HB pin is used for the Hall element bias and the output block, the current consumption in the power-saving mode is
zero.
This IC provides an on-chip constraint protection circuit to protect the IC itself and the motor when the motor is
constrained.
If the Hall input signals do not change for over a fixed period when the motor is in operation, this circuit operates. Also,
the upper-side output transistor is turned off while the constraint protection circuit is operating. This time is determined
by the capacitance of the capacitor connected to the CSD pin.
Set time (in seconds) ≈ 90 × C (μF)
If a 0.022μF capacitor is used, the protection time will be about 2.0 seconds.
The set time must be selected to have an adequate margin with respect to the motor startup time
Conditions to clear the constraint protection state :
CTL pin when a low-level voltage is input → Release protection and reset count
When TSD protection is detected
→ Stop count
5. Power Supply Stabilization
Since this IC adopts a switching drive technique, the power-supply line level can be disrupted easily. Thus capacitors
large enough to stabilize the power supply voltage must be inserted between the V pins and ground. If the
CC
electrolytic capacitors cannot be connected close to their corresponding pins, ceramic capacitors of about 0.1μF must
be connected near these pins.
If diodes are inserted in the power-supply line to prevent destruction of the device when the power supply is connected
with reverse polarity, the power supply line levels will be even more easily disrupted, and even larger capacitors must
be used.
No.A2005-18/19
LV8136V
6. VREG Stabilization
A capacitor of at least 0.1μF must be used to stabilize the VREG voltage, which is the control circuit power supply. The
ground lead of that capacitor must be located as close as possible to the control system ground (SGND) of the IC.
7. Forward/Reverse Switching (F/R pin)
Switching between forward rotation and reverse rotation must not be undertaken while the motor is running.
8. TH Pin
The TH pin must normally be pulled up to the 5V regulator for use. When it has been set to low, the outputs of L 1,
IN
L 2 and L 3 as well as H 1, H 2 and H 3 are low.
IN IN IN IN IN
9. FAULT Pin
The FAULT pin must normally be pulled up to the 5V regulator for use. When it has been set to low, the outputs of
1, L 2 and L 3 as well as H 1, H 2 and H 3 are low.
L
IN IN IN IN IN IN
10. PWM Frequency Setting
fCPWM ≈ 1/ (1.78CR)
Components with good temperature characteristics must be used.
An oscillation frequency of about 17kHz is obtained when a 2200pF capacitor and 15kΩ resistor are used. If the PWM
frequency is too low, switching noise will be heard from the motor; conversely, if it is too high, the output power loss
will increase. For this reason, a frequency between 15kHz and 30kHz or so is desirable. The capacitor ground must be
connected as close as possible to the control system ground (SGND pin) of the IC to minimize the effects of the outputs.
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
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malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
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Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
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This catalog provides information as of February, 2012. Specifications and information herein are subject
to change without notice.
PS No.A2005-19/19
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