LV8161MU [ONSEMI]
Single-Phase Fan Motor Driver;
| 型号： | LV8161MU |
| 厂家： | 
ONSEMI |
| 描述： | Single-Phase Fan Motor Driver |
| 文件： | 总11页 (文件大小：438K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA2311
LV8161MU
Monolithic Linear IC
http://onsemi.com
Single-Phase Fan Motor Driver
Overview
LV8161MU is the driver IC with BTL linear output for single-phase fan motor, and that drives at low noise by
suppressing the reactive power. Moreover, it has the function to fix to the rotational speed corresponding to
the oscillatory frequency set with CIN/COUT pins, and that speed control is done by PWM. So, the output
signal forms BTL combined with PWM.
It is optimum for the small fan motor that requires low power dissipation, low noise, and the fixed rotational
speed.
Function
• Single-phase full wave operating by BTL output
(BTL amplifier gain: +45.5dB)
• The fixed rotational speed function
(possible to adjust the speed by the value of resistor
and capacitor connected to CIN/COUT pins)
• Hall bias output pin (VHB = 1.03V (typ))
• FG (rotation signal) output pin (Open drain output)
• Built-in motor start-up assistance function
(PWM with 100% duty in output at start-up)
• Built-in lock protection and automatic restart circuit
• Built-in thermal-shutdown (TSD) circuit
UDFN10 (2.5 × 2.0)
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
V
Maximum supply voltage
OUT1/2 output current
OUT1/2 output voltage handling
HB output current
V
max
7
CC
IOUT max
VOUT max
IHB max
VPWM
0.7
A
7
V
10
mA
V
CIN output voltage handling
FG output current
7
IFG max
VFG max
Pd max
Topr
5
7
mA
V
FG output voltage handling
Allowable power dissipation
Operating temperature
Storage temperature
IC on board*
900
mW
°C
°C
Tj<150°C
-30 to 95
-55 to 150
Tstg
* Specified board: 105mm × 120mm × 1.6mm, grass epoxy board / two layers.
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information on page 11 of this data sheet.
Semiconductor Components Industries, LLC, 2014
April, 2014
40914NK 20140228-S00001 No.A2311-1/11
LV8161MU
Recommended Operating Conditions at Ta = 25°C
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
Recommended Supply voltage
Operating supply voltage
V
V
V
5.0
V
V
V
CC
op
2.2
0.3
6.0
CC
ICM
Hall amplifier common mode
input voltage range
1.5
Feedback resistance
R
COUT
Resistance between COUT pin and CIN pin
5
kΩ
CIN input frequency range
f
10
400
kHz
CIN
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
Electrical Characteristics at Ta = 25°C, V
= 5V
CC
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
2.7
Circuit current
I
1.8
mA
V
CC
HB bias voltage
VHB
IHB=-5mA
0.90
1.03
0.16
0.10
1.20
0.24
0.15
10
OUT1/2 output “H” voltage
OUT1/2 output “L” voltage
VOH
IOUT=-200mA (VOH=VCC-VOUT)
IOUT=200mA
V
VOL
V
Hall amplifier
VINOFS
-10
mV
output offset voltage
Hall amplifier voltage gain
GH
44.0
45.5
±15
47.0
dB
mV
V
Hall comparator hysteresis width
CIN input “H” threshold level
CIN input “L” threshold level
CIN input hysteresis width
COUT output “H” voltage
COUT output “L” voltage
ΔVHIN
VCINH
VCINL
ΔVCIN
VCOH
VCOL
N1
*1
2.365
1.190
1.175
60
2.490
1.255
1.235
80
2.615
1.320
1.295
100
V
V
ICOH=-0.5mA (VCOH=VCC-VCOUT)
ICOL=0.5mA
mV
mV
60
80
100
Number of counts at speed
detection 1
990
Number of counts at speed
detection 2
N2
1010
PWM frequency
fPWM
DHmin
VFGL
IFGL
LT1
22
16
32
20
42
24
0.3
10
0.8
8
kHz
%
V
PWM minimum “H” duty
FG output “L” voltage
IFG=3mA
VFG=7V
FG output leakage current
Output on time in lock-detection
Output off time in lock-detection
μA
s
0.4
4
0.6
6
LT2
s
Output on/off time ratio
In lock detection
LRTO
LRTO=LT2/LT1
9
10
11
Thermal-shutdown operating
temperature
TSD
*1
*1
180
30
°C
°C
Thermal-shutdown
hysteresis width
ΔTSD
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
No.A2311-2/11
LV8161MU
Package Dimensions
UDFN10 2.5x2, 0.5P
CASE 517CM
ISSUE O
L
L
NOTES:
A
B
E
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L1
PIN ONE
REFERENCE
DETAIL A
ALTERNATE TERMINAL
CONSTRUCTIONS
2X
0.10 C
MILLIMETERS
A3
DIM MIN
MAX
0.55
0.05
EXPOSED Cu
MOLD CMPD
0.10 C
A
A1
A3
b
0.45
0.00
0.13 REF
2X
TOP VIEW
0.20
0.30
A
DETAIL B
D
2.50 BSC
(A3)
0.05 C
A1
E
e
2.00 BSC
0.50 BSC
DETAIL B
ALTERNATE
CONSTRUCTIONS
L
L1
L2
0.70
0.00
0.20 REF
0.90
0.15
0.05 C
NOTE 4
A1
SEATING
PLANE
C
SIDE VIEW
GENERIC
MARKING DIAGRAM*
DETAIL A
1
5
6
XXXM
10X
L
L2
XXX = Specific Device Code
M
= Date Code
= Pb−Free Package
10
b
10X
e
M
C A B
0.10
0.05
NOTE 3
M
C
BOTTOM VIEW
RECOMMENDED
MOUNTING FOOTPRINT
9X
0.32
PACKAGE
OUTLINE
10X
1.05
2.30
1
0.43
0.50 PITCH
DIMENSIONS: MILLIMETERS
No.A2311-3/11
LV8161MU
Pd max -- Ta
1.5
1.0
0.90
0.5
0.40
0
30
60
90
120
0
Pin Assignment
Package: UDFN10 2.5x2.0
PIN#1 ID
1
2
3
4
5
10
9
IN1
HB
IN2
COUT
CIN
8
FG
7
OUT1
GND
VCC
OUT2
6
(Top view)
No.A2311-4/11
LV8161MU
Block Diagram
LOCK
INTERNAL
CLOCK
IN1
HB
1
2
3
4
5
10 COUT
DETECTION
OSC
HB
9
8
7
6
CIN
FG
TSD
ENABLE
SPEED
DETECTION
PWM
LEVEL
SHIFT
CONTROL
IN2
OUT1
GND
VCC
OUT2
No.A2311-5/11
LV8161MU
Pin Function
Pin No.
Pin name
Function
Equivalent circuit
VCC
1
IN1
Hall input pin(1).
1
3
GND
GND
3
IN2
Hall input pin (2).
Input the opposite phase signal to IN1 input.
GND
GN D
2
HB
Regulated voltage output pin.
VCC
It is used for Hall bias. It is necessary to open when not using it.
Not to use HB bias and VCC bias together.
VCC
2
GND
GND
4
OUT1
Output pin for motor drive (1).
Output pin for motor drive (2).
GND pin.
VCC
4
6
6
OUT2
GND
5
7
GND
VCC
Power supply pin.
The input voltage to this terminal must be stabilized without
the influence of the noise, ripple, and etc.
Therefore, it is necessary to connect the capacitor near VCC
terminal and GND terminal as much as possible. It must be
over 1uF about the value of this capacitor. Not to detach it.
Continued on next page.
No.A2311-6/11
LV8161MU
Continued from preceding page.
Pin
No.
8
Pin name
Function
Equivalent circuit
VCC
FG
Output pin of the rotational signal.
It is necessary to open when not using it.
8
GND
GND
9
CIN
Input pin of the clock for setting the rotational speed.
VCC
9
GND
GND
10
COUT
Output pin of the signal reversing CIN clock.
VCC
It works self-oscillating by returning this output signal through
the filter with resistor and capacitor to CIN pin.
VCC
150Ω(typ)
10
GND
GND
No.A2311-7/11
LV8161MU
Application Circuit Example
*5
1
2
3
4
5
[IN1]
[COUT] 10
[HB]
[CIN]
[FG]
9
8
7
6
H
*1
[IN2]
FG_OUT
(
)
*2
[OUT1]
[GND]
[VCC]
[OUT2]
(
)
*3
M
*1. The hall signal must be wired as short as possible for avoiding the noise.
If in influence of the noise, insert the capacitor between IN1 and IN2.
*2. It is recommendation that the resistance of 1kΩ or more is connected to FG pin to the series
when GND-open or mis-connecting.
*3. The power-supply voltage might rise by the influence of the coil kickback etc. when using the
diode for preventing the destruction at reverse-connected. In that case, insert the zener diode
between the power supply and GND, and suppress the rise of the voltage of VCC pin.
*4. It is necessary to wire the VCC and the GND line as wide and short as possible.
*5. The reference clock that decides the rotational speed is generated with the connection of C1 pin,
COUT pin, R1, and C1 as shown in figure. The relation among rotational speed N [rpm] of
the motor with m-poles and the cycle of the reference clock T [s] is as follows.
N
m
1
×
=
60
2
1000×T
Otherwise, the relation among T[s], C1 [F], and R1 [Ω] is as follows in consideration of 150 [Ω]
built into COUT terminal.
T = 1.09862×C1 ×
(
R1 +150
)
Therefore, the relation among rotational speed N [rpm] of the motor with m-poles, C1 [F], and
R1 [Ω] is led from above formula as follows.
N
m
910.2328E − 6
×
=
60
2
C1 ×
(
R1 +150
)
For example, when setting to rotate the motor with 4-poles at 2,700 [rpm] as C1=1,000 [pF],
2700 4
910.2328E − 6
× =
60
2 1000E −12× R1 +150
(
)
910232.8
90
⇔ R1 =
−150 = 9.964
[
kΩ
]
Actually, the error margin of rotational speed is caused by the operation time of the circuit, the
influence of parasitic elements on the circuit board, etc. Therefore, the value of C1 and R1 should
be decided by confirming with the operation with the actual motor.
When the value of C1 or R1 changes by the thermal condition or the manufacturing tolerance etc,
the rotational speed of the motor changes. So, it is necessary to use the capacitor and the resistor
with better characteristics when high accuracy at rotational speed is needed.
No.A2311-8/11
LV8161MU
*Truth table
IN1
IN2
L
(PWM) *1
OUT1
OUT2
FG
Z
Mode
Drive (OUT2 to OUT1)
Regenerate
H
L
H
L
H
L
L
X
H
L
Z
Lock protection *2
Drive (OUT1 to OUT2)
Regenerate
H
L
H
L
L
X
Z
Lock protection *2
X: Don’t care, Z: High impedance
*1. (PWM) is assumed the PWM signal generated in IC
*2. When FG pulse is not generated in Output-On-time on Lock-Detection mode,
it goes into the state of Lock-Protection.
No.A2311-9/11
LV8161MU
Timing Chart
• Start Up
VCC
FG
OUT1
OUT2
(1)
(2)
(3)
(4)
(5)
(6)
Start-Up mode = 100% High duty in output
Normal mode
= Duty Controlled by FG feedback
Start Up
# Output duty control switches from Start-Up mode to Normal mode after counting FG edge to 6.
• PWM duty control by FG feedback
FG
4*TN *990 < T4*FG < 4*TN *1010
4*TN *1010 < T4*FG
T4*FG < 4*TN *990
4*TN *990 < T4*FG < 4*TN *1010
PWM duty “No Change”
PWM duty “Increasing”
PWM duty “Decreasing”
PWM duty
to previous 4 periods of FG
for previous 4 periods of FG
for previous 4 periods of FG
“No Change”
PWM
OUTPUT
# T4*FG: Time of 4 periods of FG output, TN: Cycle time of COUT oscillation
• Lock protection and Auto re-start
Motor re-rotation
Motor Lock
IN1-IN2
OUT1
OUT2
FG
TACT
TDET
[=0.6sec(typ)]
[=6sec(typ)]
Waiting for FG pulse
Lock protection
Re-start
# In the mode of motor protection, high side output turns to high impedance.
No.A2311-10/11
LV8161MU
ORDERING INFORMATION
Device
Package
Shipping (Qty / Packing)
3000 / Tape & Reel
UDFN10 (2.5 × 2.0)
(Pb-Free / Halogen Free)
LV8161MUTAG
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no
warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as
components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any
such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or
death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the
part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PS No.A2311-11/11
相关型号：
©2020 ICPDF网 联系我们和版权申明