ENA1227 [SANYO]
CMOS IC 2-Cell Lithium-Ion Secondary Battery Protection IC; CMOS集成电路2芯锂离子二次电池保护IC
| 型号： | ENA1227 |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | CMOS IC 2-Cell Lithium-Ion Secondary Battery Protection IC |
| 文件： | 总8页 (文件大小：170K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA1227
CMOS IC
2-Cell Lithium-Ion Secondary Battery
Protection IC
LV51130T
Overview
The LV51130T is a protection IC for 2-cell lithium-ion secondary batteries.
Features
• Monitoring function for each cell:
• High detection voltage accuracy:
• Hysteresis cancel function:
Detects overcharge and over-discharge conditions and controls the
charging and discharging operation of each cell.
Over-charge detection accuracy
±25mV
Over-discharge detection accuracy ±100mV
The hysteresis of over-discharge detection voltage is made small by
sensing the connection of a load after overcharging has been detected.
Detects over-currents, load shorting, and excessively high voltage of a
charger and regulates charging and discharging operations.
Normal operation mode typ. 6.0µA
• Discharge current monitoring function:
• Low current consumption:
Stand by mode
max. 0.2µA
• 0V cell charging function:
Charging is enabled even when the cell voltage is 0V by giving a
-
pin and V pin.
potential difference between the V
DD
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
equipment.
's products or
60408 MS PC 20080522-S00003 No.A1227-1/8
LV51130T
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Power supply voltage
Input voltage
Charger minus voltage
Symbol
Conditions
Ratings
Unit
V
V
-0.3 to +12
-28 to V +0.3
DD
-
V
V
V
V
DD
DD
Output voltage
Cout pin voltage
Vcout
Vdout
Pd max
Topr
-28 to V +0.3
DD
V
V
DD
Dout pin voltage
V
-0.3 to V +0.3
DD
SS
Allowable power dissipation
Operating ambient temperature
Storage temperature
Independent IC
170
-30 to +85
-40 to +125
mW
°C
°C
Tstg
Electrical Characteristics at Ta = 25°C, unless especially specified.
Ratings
typ
Parameter
Symbol
Conditions
and V
Unit
min
1.5
max
Operation input voltage
Vcell
Vmin
Between V
DD
10
V
V
SS
-
0V cell charging minimum operation
voltage
Between V -V
DD SS
=0 and V -V
DD
1.5
Over-charge detection voltage
Vd1
Vh1
4.325
4.100
4.250
0.5
4.350
4.150
4.375
4.200
4.360
1.5
V
V
Over-charge reset voltage
VM ≤ Vd3
VM > Vd3
V
Over-charge detection delay time
Over-charge reset delay time
td1
tr1
V
V
-Vc=3.5V→4.5V, Vc-V =3.5V
SS
-Vc=4.5V→3.5V, Vc-V =3.5V
SS
1.0
40.0
2.30
20.0
100
s
DD
DD
20.0
2.20
10.0
50
60.0
2.40
40.0
150
ms
V
Over-discharge detection voltage
Over-discharge reset hysteresis voltage
Over-discharge detection delay time
Over-discharge reset delay time
Over-current detection voltage
Over-current reset hysteresis voltage
Over-current detection delay time
Over-current reset delay time
Vd2
Vh2
td2
mV
ms
ms
V
V
V
V
V
V
V
V
V
-Vc=3.5V→2.2V, Vc-V =3.5V
SS
-Vc=2.2V→3.5V, Vc-V =3.5V
SS
-Vc=3.5V, Vc-V =3.5V
SS
-Vc=3.5V, Vc-V =3.5V
SS
-Vc=3.5V, Vc-V =3.5V
SS
-Vc=3.5V, Vc-V =3.5V
SS
-Vc=3.5V, Vc-V =3.5V
SS
-Vc=3.5V, Vc-V =3.5V
SS
DD
DD
DD
DD
DD
DD
DD
DD
tr2
0.5
1.0
1.5
Vd3
Vh3
td3
0.28
5.0
0.30
10.0
20.0
1.0
0.32
20.0
30.0
1.5
mV
ms
ms
V
10.0
0.5
tr3
Short circuit detection voltage
Vd4
td4
1.0
1.3
1.6
Short circuit detection delay time
Over-charger detection voltage
0.125
-0.60
0.25
-0.45
0.50
-0.30
ms
V
Vd5
Between V -Vc=3.5V, Vc-V =3.5V
DD SS
-
(V )-V
SS
Overcharge reset hysteresis voltage
Standby reset voltage
Vh5
V
-Vc=3.5V, Vc-V =3.5V
25.0
50.0
100.0
mV
V
DD SS
Vstb
Between V -Vc=2.0V, Vc-V =2.0V
DD SS
(V )-V
V
×0.4
V
×0.5
V ×0.6
DD
DD
DD
-
SS
Excessively high voltage charger
detection delay time
Excessively high voltage charger reset
delay time
td5
tr5
V
*
V
-Vc=3.5V, Vc-V =3.5V
SS
0.5
0.5
1.5
1.5
3.0
3.0
ms
ms
DD
-Vc=3.5V, Vc-V =3.5V
SS
DD
Reset resistance (connected to V
Reset resistance (connected to V
Cout Nch ON voltage
Cout Pch ON voltage
Dout Nch ON voltage
Dout Pch ON voltage
Vc input current
)
R
100
15
200
30
400
60
kΩ
kΩ
V
DD
DD
)
R
SS
SS
L1
V
I
I
I
I
L=50µA, V -Vc=4.4V, Vc-V =4.4V
DD SS
L=50µA, V -Vc=3.9V, Vc-V =3.9V
DD SS
L=50µA, V -Vc=2.2V, Vc-V =2.2V
DD SS
L=50µA, V -Vc=3.9V, Vc-V =3.9V
DD SS
0.5
O
O
O
O
O
V
H1
V
-0.5
V
O
DD
V
L2
0.5
V
O
V
H2
V
-0.5
V
O
DD
Ivc
V
V
V
V
-Vc=3.5V, Vc-V =3.5V
SS
-Vc=3.5V, Vc-V =3.5V
SS
-Vc=2.2V, Vc-V =3.5V
SS
-Vc=3.5V, Vc-V =3.5V
SS
0.0
6.0
1.0
13.0
0.2
µA
µA
µA
V
DD
DD
DD
DD
Current drain
I
DD
Standby current
Istb
T-terminal input ON voltage
Vtest
V
×0.4
V
×0.5
V
×0.6
DD
DD
DD
* Upon connecting to charger upon over-discharge, the delay time after recovery from over-discharge.
No.A1227-2/8
LV51130T
Package Dimensions
unit : mm (typ)
3245B
Pd max -- Ta
200
3.0
Independent IC
170
150
8
100
50
0
68
1
2
(0.53)
0.65
0.25
0.125
-30 -20
0
20
40
60
80
100
Ambient temperature, Ta -- °C
SANYO : MSOP8(150mil)
Pin Assignment
Dout
8
T
7
Vc Sense
6
5
1
2
3
4
Top view
-
V
Cout
V
V
SS
DD
Pin Functions
Pin No.
Symbol
Description
1
2
3
4
5
6
7
8
V
V
pin
DD
Cout
DD
Overcharge detection output pin
Charger minus voltage input pin
-
V
V
V
pin
SS
SS
Sense
Sense pin
Vc
Intermediate voltage input pin
T
Pin to shorten detection time (“H”:Shortening mode, “L”:Normal mode)
Overdischarge detection output pin
Dout
No.A1227-3/8
LV51130T
Block Diagram
Sence
5
V
DD
1
Level shift
+
-
td5,tr5
+
-
2 Cout
8 Dout
+
-
td1,tr1
Delay
control
logic
Vc 6
+
-
td2,tr2
+
-
+
-
td3,tr3
+
-
td4
4
3
7
-
V
V
T
SS
No.A1227-4/8
LV51130T
Functional Description
Over-charge detection
If either of the cell voltage is equal to or more than the over-charge detection voltage, stop further charging by
turning “L” the Cout pin and turning off external Nch MOS FET after the over-charge detection delay time. This
delay time is set by the internal counter.
The over-charge detection comparator has the hysteresis function. Note that this hysteresis can be cancelled by
connecting the load after detection of over-charge detection. and it becomes small to hysteresis peculiar to a
comparator.
Over-charge release
If both cell voltages become equal to or less than the over-charge release voltage (VM ≤ Vd3) when charger is
connected, or if it become equal to or less than the over-charge release voltage (VM > Vd3) when load is connected,
the Cout pin returns to “H” after the over-charge release delay time set by the internal counter.
When load is connected and either cell or both cell voltages are equal to or more than the over-charge release voltage
(VM > Vd3), the Cout pin does not return to “H”. But the load current flows through the parasitic diode of external
Nch MOS FET on Cout, consequently each cell voltage becomes equal to or less than over-charge release voltage,
(VM > Vd3) the Cout pin returns to “H.” after the over-charge release delay time.
However, excessive voltage charger is connected as mentioned below, Cout pin does not return to “H” because
excessive charger detection starts after over-charge release operation.
Over-discharge detection
When either cell voltage is equal to or less than over-discharge voltage, the IC stops further discharging by turning
the Dout pin “L” and turning off external Nch MOS FET after the over-charge detection delay time.
The IC goes into stand-by mode after detecting over-discharge and its consumption current is kept at about 0A. After
-
over-discharge detection, the V pin will be connected to V
pin via internal resistor (typ 200kΩ).
DD
Over-discharge release
-
Release from over-discharge is made by only connecting charger. If the V pin voltage becomes equal to or lower
than the stand-by release voltage by connecting charger after detecting over-discharge, The IC is released from the
stand-by state to start cell voltage monitoring. If both cell voltages become equal to or more than the over-discharge
detection voltage by charging, the Dout pin returns to “H” after the over-discharge release delay time set by the
internal counter.
Over-current detection
-
When excessive current flows through the battery, the V pin voltage rises by the ON resister of external MOS FET
and becomes equal to or more than the over-current detection voltage, the Dout pin turns to “L” after the over-current
detection delay time and the external Nch MOS FET is turned off to prevent excessive current in the circuit. The
-
detection delay time is set by the internal counter. After detection, the V pin will be connected to V via internal
SS
resistor (typ 30kΩ). It will not go into stand-by mode after detecting over-current.
Short circuit detection
-
If greater discharging current flows through the battery and the V pin voltage becomes equal to or more than the
short-circuit detection voltage, it will go into short-circuit detection state after the short circuit delay time shorter than
the over-current detection delay time. When short-circuit is detected, just like the time of over-current detection, the
-
Dout pin turns to “L” and external Nch MOS FET is turned off to prevent high current in the circuit. The V pin will
be connected to V after detection via internal resistor (typ. 30kΩ). It will not go into stand-by mode after detecting
SS
short circuit.
Over-current/short-detection release
-
After detecting over-current or short circuit, the internal resistor (typ. 30kΩ) between V pin and V pin becomes
SS
-
effective. If the load resistor is removed, the V pin voltage will be pulled down to the V level. Thereafter, the IC
SS
-
will be released from the over-current/short-circuit detection state when the V pin voltage becomes equal to or less
than the over-current detection voltage, and the Dout pin returns to “H” after over-current release delay time set by
the internal counter.
No.A1227-5/8
LV51130T
Excessive charger detection/release
-
If the voltage between V pin and V pin becomes equal to or less than the excessive charger detection voltage by
SS
connecting a charger, no charging can be made by turning the Cout pin “L” after delay time and turning off the
external Nch MOS FET. If that voltage returns to equal to or more than the excessive charger detection voltage
-
during detection delay time, the excessive charger detection will be stopped. If the voltage between V pin and V
SS
pin becomes equal to or more than the excessive charger detection voltage after excessive charger detection, the Cout
returns to “H” after delay time. The detection/return delay time is set internally.
If Dout pin is “L”, charging will be made through the parasitic diode of external Nch FET on Dout pin. In that case,
-
the voltage between V pin and V pin is nearly -Vf which is less than the over-charger detection voltage, therefore
SS
no excessive charger detection will be made during over-discharge, over-current and short-circuit detection.
Furthermore, if excessive voltage charger is connected to the over-discharged battery, no excessive charger detection
is made while the Dout pin is “L”. But the battery is continued charging through the parasitic diode. If the battery
-
voltage rises to the over-discharge detection voltage and the voltage between V pin and V pin remains equal to or
SS
less than the excessive charger detection voltage, the delay operation will be started after Dout pin turns to “H.”
0V cell charging operation
If voltage between V
and V becomes equal to or more than the 0V cell charging lowest operation voltage when
DD
the cell voltage is 0V, the Cout pin turns to “H” and charging is enabled.
Shorten the test time
By turning T pin to the V
, the delay times set by the internal counter can be cut. If T pin is open, the delay times
DD
are normal. Delay time not set by the counter just like as short circuit detection delay cannot be controlled by this pin.
And we recommend that T pin is connected to V to prevent malfunction when excessive current flows in short
SS
circuit operation.
Operation in case of detection overlap
Operation in case of
Overlap state
State after detection
detection overlap
Over-charge detection is preferred. If over-
discharge state continues even after over-
charge detection, over-discharge detection is
resumed.
-
When, during over-
Over-discharge
When over-charge detection is made first, V is
released. When over-discharge is detected after
over-charge detection, the standby state is not
charge detection,
detection is made,
-
effectuated. Note that V is connected to V
DD
via 200kΩ.
-
Over-current
detection is made,
(*1) Both detections’ can be made in parallel.
Over-charge detection continues even when the
over-current state occurs. If the over-charge
state occurs first, over-current detection is
interrupted.
(*2) When over-current is detected first, V is
connected to V via 30kΩ. When over-charge
detection is made first, V is released.
SS
-
When, during over-
discharge detection,
Over-charge detection Over-discharge detection is interrupted and
The standby state is not effectuated when over-
discharge detection is made after over-charge
is made,
over-charge detection is preferred. When over-
discharge state continues even after over-
charge detection, over-discharge detection is
resumed.
-
detection. Note that V is connected to V
via
DD
200kΩ.
Over-current
detection is made,
(*3) Both detections can be made in parallel.
Over-discharge detection continues even when
the over-current state is effectuated first. Over-
current detection is interrupted when the over-
discharge state is effectuated first,
(*4) If over-current is detected in advance, V will
be connected to V via 30kΩ. After detecting
SS
over-discharge, V will be connected to V
200kΩ to get into standby state. If over-
via
DD
discharge is detected in advance, V will be
connected to V
state.
via 200kΩ to get into standby
DD
When, during over-
current detection,
Over-charge detection (*1)
is made,
(*2)
Over-discharge
(*3)
(*4)
detection is made,
(Note) Short-circuit detection can be made independently.
Over-charger detection does not work during over-discharge, over-current or short-circuit detection and
the delay time starts after return from these states.
No.A1227-6/8
LV51130T
Timing Chart
[Cout Output System]
Hysteresis cancellation
by load connection
Charger
connection
Charger
connection
Load
connection
Load
Charger
Over-charger
connection
Load
connection
connection connection
Vd1
Vr1
Charging recovery
depends on charger voltage
when connecting charger.
V
DD
Vd2
V
DD
Discharging via FETparasite Di
Discharging via FETparasite Di
Vd4
Vd3
SS
Vd5
-
V
V
V
V
DD
-
tr1
td1
tr1
td5
tr5
td1
Cout
Over-charge detection state
Over-charge detection state
Over-charger detection state
[Dout Output System]
Load
connection
Charger
connection
Load
connection
Load
connection
Load
connection
Over-charger
connection
Over-current
occurrence
Load short-circuit
occurrence
Vd1
Vr1
V
DD
Vd2
To standby
To standby
V
DD
Vd4
-
Vd3
SS
Vd5
V
V
Charging via FETparasite Di
V
V
DD
SS
Dout
tr3
td2
tr2
tr2
tr3
td4
td2
td3
Over-discharge detection state
Over-current detection state
Short-circuit detection state
V
V
DD
-
Over-charger detection
Cout
upon charging over-discharged
battery is activated after return
from over-charge.
td5
No.A1227-7/8
LV51130T
Application Circuit Example
+
R1
R4
Sense
V
C3
V
DD
C1
C2
T
R2
SS
Vc
LV51130T
-
V
V
Dout Cout
SS
R3
−
Components
R1, R2
R3
Recommended value
max
unit
100
2k
1k
4k
Ω
Ω
Ω
F
R4
100
0.1µ
10k
1µ
C1, C2, C3
* These numbers don't mean to guarantee the characteristic of the IC.
* In addition to the components in the upper diagram, it is necessary to insert a capacitor with enough capacity between
V
and V of the IC as near as possible to stabilize the power supply voltage to the IC.
SS
DD
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of June, 2008. Specifications and information herein are subject
to change without notice.
PS No.A1227-8/8
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