RF5125 [RFMD]
3V TO 5V, 2.4GHz TO 2.5GHz LINEAR POWER AMPLIFIER; 3V至5V , 2.4GHz至2.5GHz线性功率放大器型号: | RF5125 |
厂家: | RF MICRO DEVICES |
描述: | 3V TO 5V, 2.4GHz TO 2.5GHz LINEAR POWER AMPLIFIER |
文件: | 总12页 (文件大小:261K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
RF5125
3V TO 5V, 2.4GHz TO 2.5GHz
LINEAR POWER AMPLIFIER
RoHS Compliant & Pb-Free Product
Package Style: QFN, 16-Pin, 3 x 3
16
15
14
13
RF OUT/
VC2
NC
RF IN
RF IN
NC
1
2
3
4
12
Features
Single Power Supply 3.0V to
5.0V
11 RF OUT
+21dBm, <4.0%EVM,
185mA@VCC=3.3V
Input
Match
Interstage
Match
28dB Typical Small Signal Gain
10 RF OUT
50Ω Input and Interstage Match-
ing
Power
Detector
Bias Circuit
2400MHz to 2500MHz Fre-
9
NC
quency Range
5
6
7
8
+23dBm, <4%EVM,
250mA@VCC=5.0V
Functional Block Diagram
Applications
Product Description
IEEE802.11b/g/n WLAN Applica-
tions
The RF5125 is a linear, medium-power, high-efficiency, two-stage amplifier IC
designed specifically for battery-powered WLAN applications such as PC cards, mini
PCI, and compact flash applications. The device is manufactured on an advanced
InGaP Gallium Arsenide Heterojunction Bipolar Transistor (HBT) process, and has
been designed for use as the final RF amplifier in 2.5GHz OFDM and other spread-
spectrum transmitters. The device is provided in a 3mmx3mm, 16-pin, QFN with a
backside ground. The RF5125 is designed to maintain linearity over a wide range of
supply voltage and power output.
2.5GHz ISM Band Applications
Commercial and Consumer Sys-
tems
Portable Battery-Powered Equip-
ment
Spread-Spectrum and MMDS
Systems
Ordering Information
RF5125
3V to 5V, 2.4GHz to 2.5GHz Linear Power Amplifier
RF5125PCBA-41X Fully Assembled Evaluation Board
Optimum Technology Matching® Applied
GaAs HBT
GaAs MESFET
InGaP HBT
SiGe BiCMOS
Si BiCMOS
SiGe HBT
GaAs pHEMT
Si CMOS
Si BJT
GaN HEMT
9
RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trade-
mark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Rev A23 DS070515
1 of 12
RF5125
Absolute Maximum Ratings
Parameter
Supply Voltage
Rating
-0.5 to +6.0
-0.5 to 3.5
Unit
V
DC
Caution! ESD sensitive device.
The information in this publication is believed to be accurate and reliable. How-
ever, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use,
nor for any infringement of patents, or other rights of third parties, resulting
from its use. No license is granted by implication or otherwise under any patent
or patent rights of RFMD. RFMD reserves the right to change component cir-
cuitry, recommended application circuitry and specifications at any time without
prior notice.
Power Control Voltage (V
)
V
REG
DC Supply Current
Input RF Power
600
+5
mA
dBm
°C
Operating Ambient Temperature
Storage Temperature
-30 to +85
-40 to +150
JEDEC Level 2
RoHS status based on EUDirective2002/95/EC (at time of this document revi-
sion).
°C
Moisture Sensitivity
Specification
Parameter
Unit
Condition
Min.
Typ.
Max.
T=+25°C, V =3.3V, V
Freq=2450MHz, circuit per evaluation board
schematic.
=2.8V,
REG
CC
Overall -
54Mbps OFDM Signal
Frequency Range
2400 to 2500
MHz
Maximum Linear Output Power
With 802.11g modulation (54Mbit/s)
meeting 802.11g spectral mask.
V
V
=3.3V
=5.0V
20.0
22.0
2.0
2.0
26
21.0
23.0
3.0
3.5
29
22.0
24.0
4.0
dBm
dBm
%
CC
CC
EVM
Gain
P
P
P
=+21dBm, 54M OFDM, V =3.3V
CC
OUT
OUT
OUT
DC
DC
DC
4.0
%
=+23dBm, 54M OFDM, V =5.0V
CC
33
dB
Ω
=+21dBm, 54M OFDM, V =3.3V
CC
Input Impedance
Output VSWR
49
50
51
Internally Matched Input and Interstage
No spurs above -43dBm
10:1
Power Detector (P_detect)
P
=8dBm
0.2
0.22
1.05
1.3
0.25
1.2
V
V
V
V
V
=3.3V
=3.3V
=5.0V
OUT
DC
DC
CC
CC
CC
P
=21dBm
=23dBm
0.85
OUT
OUT
P
V
Power Supply
Operating Voltage
3.0
2.7
3.3
2.8
3.6
3.0
V
5V operation requires output match revision
DC
V
(Bias) Voltage
V
REG
DC
(V
, V
)
REG1 REG2
Current Consumption
170
185
250
220
mA
RF P =+21dBm, V =3.3V,
OUT CC
54Mbps OFDM
RF P =+23dBm, V =5.0V,
OUT
CC
54Mbps OFDM
Quiescent Current
Leakage Current
95
25
mA
nA
RF=OFF
10
1
150
5
V
V
V
=+3.3V ; RF In=OFF; V
OFF
CC
CC
CC
DC
REG
V
(Bias) Current (Total)
2
2
mA
mA
=3.3V
=5.0V
REG
1
6
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support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
2 of 12
Rev A23 DS070515
RF5125
Pin
1
Function
NC
Description
Not connected. May be connected to ground (GND).
Interface Schematic
RF input. See evaluation board schematic for details.
2
RF IN
VCC
INTERSTAGE
MATCH
INPUT
MATCH
RF input. See evaluation board schematic for details.
Not connected. May be connected to ground (GND).
See pin 2.
3
4
5
RF IN
NC
NC
Do not connect.
Note: VCC voltage may be applied to this pin without damage to, or affect-
ing the performance of, the RF5125.
Bias current control voltage for the first stage.
6
7
VREG1
VREG2
Bias current control voltage for the second stage. The VREG2 pin may be
connected to VREG1 through an external resistor bridge.
Provides an output voltage proportional to the output RF level.
*In applications where the PDETECT function is not desired, this pin may
be left unconnected.
8
PDETECT (or
N/C*)
No-connect.
RF output.
9
10
NC
RF OUT
RF OUT
BIAS
Same as pin 10.
See pin 10.
11
12
RF OUT
RF OUT/
VC2
Power supply for second stage amplifier. Connect as shown on evaluation
board schematic.
Not connected. May be connected to ground (GND).
13
14
NC
VC1
Power supply for first stage amplifier. Connect as shown on evaluation
board schematic.
Not connected. May be connected to ground (GND).
15
16
NC
VCC
Supply voltage for the bias reference and control circuits. May be con-
nected with VC1 and VC2 (single-supply voltage).
The center metal base of the QFN package provides DC and RF ground as
well as heat sink for the amplifier.
Pkg
Base
GND
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support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Rev A23 DS070515
3 of 12
RF5125
Package Drawing
0.10
2 PLCS
C
A
0.05 C
-A-
3.00
0.90
0.85
1.50 TYP
0.70
0.65
0.05
0.00
2 PLCS
0.10
C
B
3.00
12°
MAX
2 PLCS
0.10
C
B
-B-
SEATING
PLANE
-C-
1.37 TYP
2.75 SQ
2 PLCS
0.10
C
A
0.10 M C A B
0.60
0.24
TYP
0.30
0.18
PIN 1 ID
R.20
1.65
SQ.
1.35
0.50
0.30
Dimensions in mm.
Shaded lead is pin 1.
0.50
Pin Out
16
15
14
13
NC
RF IN
RF IN
NC
1
2
3
4
12 RF OUT/VC2
11 RF OUT
10 RF OUT
9
NC
5
6
7
8
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
4 of 12
Rev A23 DS070515
RF5125
Theory of Operation and Application Information
The RF5125 is a two-stage (2-stage) power amplifier (PA) with a minimum gain of 26dB (29dB typical) in the 2.4GHz to
2.5GHz Industrial, Scientific, and Medical (ISM) band. The RF5125 has a 50Ω internal input and interstage match. Only the
RF5125 output stage requires matching. The RF5125 is designed primarily for IEEE802.11g/n wireless local area network
(WLAN) applications where the available supply voltage and current are limited. This amplifier will operate to and below the
lowest expected voltage made available by a typical PC Card (PCMCIA or CardBus) slot in a laptop personal computer (PC). The
RF5125 maintains required linearity at decreased supply voltages.
The RF5125 operates from a single supply voltage of 3.0VDC to 5.0VDC to deliver specified performance. Power control is pro-
vided through two (2) bias control input pins (VREG1 and VREG2). For the best performance and lower current, there is a 68Ω
resistor placed as R2. In most applications these two (2) bias control input pins are connected together (before R1 and R2)
and employed as a single control input.
There is no required matching on the RF5125 input or interstage circuits. Only the RF5125 output stage requires matching
allowing the RF5125 to be implemented in applications requiring the fewest end product bill of materials (BOM) parts count
and lowest BOM cost. In most cases the capacitor used as part of the RF5125 output matching circuit is also employed to
accomplish DC-blocking. The RF5125PCBA evaluation board (available from RF Micro Devices, Inc. (RFMD)) is optimized for
3.3VDC supply input.
For best results, the RF5125PCBA evaluation board circuit layout should be copied as closely as possible. In particular, the
RF5125PCBA evaluation board ground layout, ground vias, and output matching components and location should be copied
without deviation. Other PCB layout configurations may provide acceptable RF5125 performance; however, the end product
design process will be faster and manufacturing first time yield (FTY) better if the RF5125PCBA evaluation board design is fol-
lowed. RFMD provides RF5125PCBA design and Gerber files upon request.
Though not difficult to implement to achieve state-of the-art performance, the RF5125 is employed at frequencies greater than
2GHz, where care in circuit layout and component selection is advisable. Of primary concern with RF5125 PCB layout is the
selection and placement of output matching components (RF5125PCBA bill of materials (BOM) is available upon request).
High-Q (quality factor) capacitors and inductors are not required in every RF5125 based design; however, it is highly recom-
mended that the RF5125PCBA evaluation board BOM be followed exactly for all initial end product designs. Upon initial base-
line of RF5125 based PCB performance, less costly (Lower-Q) output matching circuit components may be substituted and
evaluated against the initial design performance. RFMD experience indicates that end product FTY improvements more than
offset the cost difference between “High-Q” and “Low-Q” components.
The output matching capacitor is C10 (or C11) which is connected between the RF5125 and the connector J2 (RFOUT) as
shown on the RF5125PCBA Evaluation Board Schematic. This capacitor is selected in value and positioned with reference to
the 50Ω transmission line. This matching capacitor is a single 2.2pF shunt capacitor whose placement depends on the supply
voltage applied. With the nominal 3.0VDC to 3.6VDC supply voltage, the distance of the transmission line should be 115mils
(this is marked as the placement for C10). For a supply voltage of 5V, the length of the transmission line should be 101mils
(which is marked as the placement for C11). Notice, only one of the shunt output capacitors is placed at one time (C10 or
C11). The transmission line length and thickness should be duplicated as closely as possible in any customer PCB layout. Due
to PCB material variation (e.g., FR4) and PCB manufacturing variations, the customer may benefit from small adjustments
made to the length of the transmission line when the RF5125PCBA evaluation board is duplicated to produce an end product
PCB design. The initial PCB layout should include exposed ground area near C10 or C11 to allow ease of RF5125 output circuit
optimization; Smith Chart-based design tools may be used to assist in determining the desired capacitor value and transmis-
sion line physical characteristics. Note that the use of a single capacitor output circuit match results in a more sensitive match
and slightly reduced RF5125 bandwidth. In this configuration, the RF5125 will exhibit sufficient output spectrum bandwidth to
meet IEEE802.11b/g requirements when matched properly.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Rev A23 DS070515
5 of 12
RF5125
The RF5125 had been primarily characterized with a VREG voltage of 2.8VDC. However, the RF5125 will operate from a wide
range of bias control voltages and within a wide range of frequencies (typically 1800MHz to 2800MHz). If a bias control volt-
age other than 2.8VDC is preferred or if a different frequency range (other than 2.4GHz to 2.5GHz) is desired, please contact
RFMD Sales or Applications Engineering for assistance.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
6 of 12
Rev A23 DS070515
RF5125
Evaluation Board Schematic
VCC
27 Ω
P2
C6
1 μF
1
P2-1
PDETECT
GND
C7
1 μF
2
L1
7.5 nH
C1
1 nF
P2-3
P2-4
VREG2
VREG1
3
4
HDR_1x4
1
1
L2
6.8 nH
Coilcraft
16
15
14
13
TL = 101 mils (50 Ω) from IC
1
1
2
3
4
12
11
10
9
TL = 115 mils (50 Ω) from IC
TL
TL
J2
RF OUT
50 Ω μstrip
50 Ω μstrip
C113
see note
C102
see note
J1
C12
10 pF
RF IN
1
5
6
7
8
5125400, r.-
PDETECT
P1
C2
1 nF
C3
1 nF
C9
330 pF
P1-1
1
2
VCC
GND
C8
4.7 μF
Notes:
1. Pins 1, 4, 13, and 15 may be left as No Connect.
R3 may be used to connect the VREGS with a 0Ω resistor.
2. For VCC = 3.3 VDC operation, C10 is to be populated with a
2.2 pF capacitor, 101 mils from the IC. C11 not populated.
3. For VCC = 5.0 VDC operation, C11 is to be populated with a
2.2 pF capacitor, 115 mils from the IC. C10 not populated.
P3
1
R21
68 Ω
R1
0 Ω
P3-1
VCC
GND
R3*
P4
1
VREG1
VREG2
VCC (VDC) C10 (pF) C11 (pF)
3.3
5.0
2.2
DNP
DNP
2.2
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support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Rev A23 DS070515
7 of 12
RF5125
Evaluation Board Layout
Board Size 2.0” x 2.0”
Board Thickness 0.031”, Board Material FR-4, Multi-Layer
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support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
8 of 12
Rev A23 DS070515
RF5125
RF Power Spectrum @ +21 dBm 11 Mbps CCK Modulation
(VCC = +3.3 VDC; VREG = +2.8 VDC; Frequency = 2.45 GHz)
ACP versus POUT
*
*
*
RBW 100 kHz
VBW 100 kHz
SWT 300 ms
-20.0
-25.0
-30.0
-35.0
-40.0
-45.0
-50.0
-55.0
-60.0
-65.0
-70.0
*
Att 10 dB
Ref 20.3 dBm
20 Offset
ACP1 2400MHz
ACP1 2450MHz
ACP1 2500MHz
2400MHz ACP2
2450MHz ACP2
2500MHz ACP2
5.3 dB
CH PWR
ACP Low
ACP Up
ALT1 Low -55.52 dB
ALT1 Up -57.00 dB
21.06 dBm
-39.70 dB
-38.81 dB
A
10
1
RM
*
CLRWB
0
LVL
-10
-20
-30
-40
-50
-60
-70
Center 2.45 GHz
6.653384837 MHz/
Span 66.53384837 MHz
10.0
12.0
14.0
16.0
18.0
20.0
22.0
24.0
Output Power (dBm)
Date: 31.JAN.2005 21:01:52
EVM versus POUT
Operating Current versus POUT
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
0.25
0.20
0.15
0.10
0.05
0.00
2400MHz
2450MHz
2500MHz
2400MHz
2450MHz
2500MHz
0.0
5.0
10.0
15.0
20.0
25.0
0.00
5.00
10.00
15.00
20.00
25.00
Output Power (dBm)
Output Power (dBm)
PDETECT versus POUT
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
2400MHz
2450MHz
2500MHz
0.0
5.0
10.0
15.0
20.0
25.0
Output Power (dBm)
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Rev A23 DS070515
9 of 12
RF5125
PCB Design Requirements
PCB Surface Finish
The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is 3μinch
to 8μinch gold over 180μinch nickel.
PCB Land Pattern Recommendation
PCB land patterns for RFMD components are based on IPC-7351 standards and RFMD empirical data. The pad pattern shown
has been developed and tested for optimized assembly at RFMD. The PCB land pattern has been developed to accommodate
lead and package tolerances. Since surface mount processes vary from company to company, careful process development is
recommended.
PCB Metal Land Pattern
A = 0.64 x 0.28 (mm) Typ.
B = 0.28 x 0.64 (mm) Typ.
C = 1.50 (mm) Sq.
Dimensions in mm.
1.50 Typ.
0.50 Typ.
Pin 16
B
B
B
B
Pin 1
Pin 12
A
A
A
A
A
A
A
A
0.50 Typ.
0.55 Typ.
0.75 Typ.
1.50
Typ.
C
B
B
B
B
Pin 8
0.55 Typ.
0.75 Typ.
Figure 1. PCB Metal Land Pattern (Top View)
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support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
10 of 12
Rev A23 DS070515
RF5125
PCB Solder Mask Pattern
Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB
metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The
center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be
provided in the master data or requested from the PCB fabrication supplier.
A = 0.74 x 0.38 (mm) Typ.
B = 0.38 x 0.74 (mm) Typ.
C = 1.60 (mm) Sq.
Dimensions in mm.
1.50
Typ.
0.50
Typ.
Pin 16
B
B
B
B
Pin 1
Pin 12
A
A
A
A
A
A
A
A
0.50
Typ.
0.75
Typ.
1.50
Typ.
C
0.55
Typ.
B
B
B
B
Pin 8
0.55
Typ.
0.75
Typ.
Figure 2. PCB Solder Mask Pattern (Top View)
Thermal Pad and Via Design
The PCB land pattern has been designed with a thermal pad that matches the die paddle size on the bottom of the device.
Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been
designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing
strategies.
The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a
0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the
quantity of vias be increased by a 4:1 ratio to achieve similar results.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Rev A23 DS070515
11 of 12
RF5125
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
12 of 12
Rev A23 DS070515
相关型号:
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