RF5163 [RFMD]

3V-5V, 2.5GHZ LINEAR POWER AMPLIFIER; 3V- 5V , 2.5GHZ线性功率放大器
RF5163
型号: RF5163
厂家: RF MICRO DEVICES    RF MICRO DEVICES
描述:

3V-5V, 2.5GHZ LINEAR POWER AMPLIFIER
3V- 5V , 2.5GHZ线性功率放大器

放大器 射频 微波 功率放大器
文件: 总12页 (文件大小:510K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
RF5163  
3V-5V, 2.5GHZ LINEAR POWER AMPLIFIER  
0
RoHS Compliant & Pb-Free Product  
Typical Applications  
• 802.11b/g/n Access Points  
• PCS Communication Systems  
• 2.4GHz ISM Band Applications  
• Commercial and Consumer Systems  
• Portable Battery-Powered Equipment  
• Broadband Spread-Spectrum Systems  
Product Description  
2 PLCS  
0.05 C  
0.10 C  
A
-A-  
The RF5163 is a linear, medium-power, high-efficiency  
amplifier IC designed specifically for low voltage opera-  
tion. The device is manufactured on an advanced Gallium  
Arsenide Heterojunction Bipolar Transistor (HBT) pro-  
cess, and has been designed for use as the final RF  
amplifier in 802.11b/g/n access point transmitters. The  
device is provided in a 4mmx4mm, 16-pin, leadless chip  
carrier with a backside ground. The RF5163 is designed  
to maintain linearity over a wide range of supply voltage  
and power output.  
0.90  
0.85  
4.00 SQ.  
0.70  
0.65  
2.00 TYP  
0.05  
0.00  
0.10 C  
B
2 PLCS  
12°  
MAX  
0.10 C B  
2 PLCS  
-B-  
-C-  
SEATING  
PLANE  
1.87 TYP  
3.75 SQ  
Shaded lead is pin 1.  
0.10 C  
2 PLCS  
A
Dimensions in mm.  
0.10M C A  
B
0.60  
0.24  
TYP  
0.35  
0.23  
Pin 1 ID  
0.20 R  
2.25  
SQ.  
1.95  
0.75  
0.50  
TYP  
0.65  
Optimum Technology Matching® Applied  
Package Style: QFN, 16-Pin, 4x4  
Si BJT  
GaAs HBT  
SiGe HBT  
GaN HEMT  
GaAs MESFET  
9
Si Bi-CMOS  
InGaP/HBT  
Si CMOS  
Features  
SiGe Bi-CMOS  
• Single 3.3V or 5V Power Supply  
• +33dBm Saturated Output Power (typ.)  
• 20dB Large Signal Gain (typ.)  
16  
15  
14  
13  
• 2.0% EVM @ +26dBm, 54Mbps (typ.)  
• Separate Power Detect/Power Down Pins  
• 1800MHz to 2500MHz Frequency Range  
RF IN  
1
2
3
4
12 RF OUT  
11 RF OUT  
10 RF OUT  
VREG1GND  
P DOWN  
Bias  
Ordering Information  
P DETECT  
9 GND  
RF5163  
3V-5V, 2.5GHz Linear Power Amplifier, Matte-Sn  
(Pb-free) Finish  
5
6
7
8
RF5163L  
3V-5V, 2.5GHz Linear Power Amplifier, Sn-Pb Finish  
RF5163PCBA-41XFully Assembled Evaluation Board  
RF5163PCBA-WDFully Assembled Evaluation Board, With Driver  
RF Micro Devices, Inc.  
7628 Thorndike Road  
Greensboro, NC 27409, USA  
Tel (336) 664 1233  
Fax (336) 664 0454  
http://www.rfmd.com  
Functional Block Diagram  
Rev A12 061114  
2-627  
RF5163  
Absolute Maximum Ratings  
Parameter  
Supply Voltage  
Rating  
-0.5 to +5.5  
-0.5 to 3.3  
Unit  
V
DC  
Power Control Voltage (V  
)
V
PC  
Caution! ESD sensitive device.  
DC Supply Current  
Input RF Power  
Operating Ambient Temperature  
Storage Temperature  
1000  
+15  
-10 to +85  
-40 to +150  
JEDEC Level 3  
mA  
dBm  
°C  
RF Micro Devices believes the furnished information is correct and accurate  
at the time of this printing. RoHS marking based on EUDirective2002/95/EC  
(at time of this printing). However, RF Micro Devices reserves the right to  
make changes to its products without notice. RF Micro Devices does not  
assume responsibility for the use of the described product(s).  
°C  
Moisture sensitivity  
Specification  
Parameter  
Overall  
Unit  
Condition  
Min.  
Typ.  
Max.  
T=25 °C, V =5.0V, V  
=3V,  
CC  
REG1,2  
Freq=2450MHz  
Frequency Range  
Compliance  
Output Power  
2400 to 2500  
+26  
MHz  
dBm  
IEEE802.11g and IEEE802.11b  
With 802.11g modulation (54 Mbit/s) and  
meeting 802.11g spectral mask @ <2.5%  
maximum EVM (RMS, mean).  
EVM  
2.0  
20  
%
Increase over EVM floor; RF P  
=+26dBm  
OUT  
Gain  
dB  
@ +6dBm RF Pin  
Input Impedance  
Output VSWR  
Power Down  
Ω
Please see Theory of Operation.  
No oscillation  
10:1  
V
and V  
are “ON”  
0.6  
5.0  
V
V
Pin 3 (P_DOWN) Voltage<0.6V  
Pin 3 (P_DOWN) Voltage>2.5V  
CC  
CC1  
DC  
DC  
DC  
DC  
V
and V  
are “OFF”  
4.0  
CC  
CC1  
Power Supply  
Operating Voltage  
Current Consumption  
3.0 to 5.0  
520  
V
mA  
Power Down “ON”, P  
Idle current  
=+26dBm  
OUT  
260  
3.0  
mA  
V
V
V
(Bias) Voltage (V  
,
REG1  
REG  
V
)
REG2  
(Bias) Current (Total)  
5
mA  
REG  
2-628  
Rev A12 061114  
RF5163  
Pin  
1
Function Description  
Interface Schematic  
See pin 14.  
RF input. Matching network with DC-block required; see evaluation  
RF IN  
board schematic for details.  
First stage bias circuit ground. Keep PCB traces short and connect  
immediately to ground plane.  
2
3
VREG1  
GND  
P DOWN  
Power down pin. Apply <0.6V to power up both V and V . Apply  
CC1  
DC  
CC  
2.5V to 3.5V to power down. If function is not desired pin may be  
DC  
DC  
grounded.  
The P_DOWN and P_DETECT pins can be used in conjunction with an  
external feedback path to provide an RF power control function for the  
RF5163. The power control function is based on sampling the RF drive  
to the final stage of the RF5163. If function is not desired, pin may be  
left unterminated.  
4
P DETECT  
First stage bias input - requires regulated voltage to maintain desired  
5
6
7
VREG1  
VREG2  
I
.
CC  
Second stage bias input - requires regulated voltage to maintain  
desired I . May be tied to pin 5 input after series resistors.  
CC  
Second stage bias circuit ground. Ground with a 10nH inductor.  
VREG2  
GND  
NC  
No connect (N/C).  
8
9
Ground connection. For best performance, keep PCB trace lengths  
short.  
GND  
Same as pin 11.  
10  
11  
RF OUT  
RF OUT  
RF output and bias for the output stage. The power supply for the out-  
put transistor needs to be supplied to this pin. This can be done  
through a quarter-wave (λ/4) microstrip line that is RF grounded at the  
other end, or through an RF inductor that supports the required DC cur-  
rent.  
RF OUT  
Same as pin 11.  
Same as pin 8.  
12  
13  
14  
RF OUT  
GND  
VCC1  
Power supply pin for first stage. External low frequency bypass capaci-  
tors should be connected if no other low frequency decoupling is  
employed.  
VCC  
RF IN  
BIAS  
Same as pin 14.  
15  
16  
VCC1  
VCC  
Power supply pin for bias circuits. External low frequency bypass  
capacitors should be connected if no other low frequency decoupling is  
employed.  
Ground connection. The back side of the package should be connected See pins 1 and 2.  
to the ground plane through as short a connection as possible, e.g.,  
PCB vias under the device are recommended.  
Pkg  
Base  
GND  
Rev A12 061114  
2-629  
RF5163  
Theory of Operation and Application Information  
RF5163PCBA Evaluation Board  
The RF5163 is a two-stage device with a nominal gain of 20dB in the 2.4GHz to 2.5GHz Industrial, Scientific, and Medi-  
cal (ISM) band. The RF5163 is designed primarily for fixed IEEE802.11g/n WLAN applications requiring exceptionally  
linear RF output powers of +23dBm to +28dBm.  
The RF5163 requires a single positive supply of 5.0V nominal to operate to full specifications. Power control is provided  
through two (2) separate and independent methods. The first method is through two (2) bias control pins (VREG1 and  
VREG2). In most applications, both VREG1 and VREG2 are tied together and used as a single control input. The second  
method is through the use of a dedicated Power Down (P_Down) pin. Applying less than (<) 0.6VDC to the RF5163  
P_Down pin fully turns “ON” both VCC and VCC1 power circuits. Applying 2.5VDC to 3.5VDC to the RF5163 P_Down pin  
fully turns “OFF” both VCC and VCC1 circuits. Turning the RF5163 “ON” and/or “OFF” by using the P_Down pin is accom-  
plished without regard to system voltage regulator turn-on and turn-off settling time restraints.  
There is some external matching on the input and output of the RF5163, thus allowing the RF5163 to be used in other  
applications outside the 2.4GHz to 2.5GHz ISM band (such as IEEE802.16d/e in the 2.3GHz band). Both the input and  
output of the device require a series DC-blocking capacitor. In some cases, a capacitor used as a matching component  
can also serve as the blocking cap. The circuits used on the RF5163PCBA and RF5163PCBA-WD Evaluation Boards  
are optimized for VCC=+5.0VDC operation.  
The RF5163 is not difficult to implement, however, care in printed circuit board layout and component selection is highly  
recommended when implementing 2.5GHz capable circuits. Critical passive components in the RF5163PCBA Evalua-  
tion Board circuit are interstage and output matching components (C13, C15, and C16). In these cases, high-Q (Quality  
factor) capacitors suitable for RF application are used on the evaluation board (an evaluation board bill of material (BOM)  
is available upon request). High-Q components are not required in every design, but it is strongly recommended that the  
initial design be implemented with the same components used on the RF5163PCBA Evaluation Board. After establishing  
initial baseline performance, less costly components may be substituted to evaluate performance impact.  
The input matching inductor L1 and the DC blocking capacitor C14 helps to tune the peak of the small-signal gain  
response as well as improve the linearity of the PA. The input impedance of the PA will not be 50Ω with this input match  
so do not use a Smith Chart for guidance for value selection and parts placement. With a 50Ω input into the input match  
as shown on the Evaluation Board schematic, the PA will perform as expected with an expected input return loss of  
~-2dB. The input L1 should be placed with reference to the position as shown on the RF5163PCBA Evaluation Board  
schematic.  
The interstage matching capacitor, C13, along with the combined inductance of the internal bond wire, the short length  
of circuit board trace, and the parasitic inductance of the capacitor, tunes the peak of the small-signal gain response. The  
trace length between C13 and RF5163 pins 14 and 15 should be kept as close to the evaluation board schematic as pos-  
sible.  
The output matching capacitors are C15 and C16. These capacitors are placed with reference to position along trans-  
mission line segments TL1 and TL2, as shown on the RF5163PCBA Evaluation Board schematic. These segments  
should be duplicated as closely as possible. Due to variations in FR-4 characteristics and PCB manufacturer process  
variations, some benefit is obtained from small adjustments to TL1 and TL2 length when the evaluation board is dupli-  
cated. Prior to full scale manufacturing, the board layout of early prototypes should include some additional exposed  
ground areas around C15 and C16 to optimize this part of the circuit. The AC coupling capacitor, C10, may be placed  
very close to C15. The output match is complete at C15.  
R3 at RF5163 pin 4 (P_Detect) desensitizes the P_Detect line from the value of C12. Without R3, the value of C12 may  
affect error vector magnitude (EVM) under certain operational conditions.  
2-630  
Rev A12 061114  
RF5163  
The RF5163 has primarily been characterized with a voltage on VREG1 and VREG2 of +3.0VDC. However, the RF5163 will  
operate from a wide range of control voltages. If a different control voltage is desired, contact RFMD Sales or Applica-  
tions Engineering for additional data and guidance.  
RF5163PCBA-WD Evaluation Board:  
The RF5163PCBA-WD Evaluation Board was developed to assist prospective customers of the RF5163 with a com-  
pletely characterized medium to high power amplifier solution incorporating a highly linear driver amplifier stage. In appli-  
cations requiring more than 20dB to 22dB amplifier stage gain, the RF5163PCBA-WD Evaluation Board design may be  
employed to achieve higher gain combined with ultra linear RF power output for high peak-to-average power ratio appli-  
cations (e.g., orthogonal frequency division multiplex (OFDM) modulation).  
Figure 1 below shows the major component line-up for an ultra linear fixed application (e.g., an access point (AP)) trans-  
mitter capable of producing +26dBm RF POUT with an amplifier stage (driver + final stage power amplifier IC, RF2373 +  
RF5163) EVM contribution of < 2.5% EVM, RMS (mean).  
Maximum Total Transmit EVM (RMS, Mean) @ 54Mbps:  
RF Pout = +26dBm with Transmit 'Chain' EVM < 3.8%  
Antenna  
RFMD RF2959  
OFDM  
WLAN "g"  
Transciever IC  
(IEEE802.11g/n)  
MAC + BBP IC  
RFMD RF5163  
RFMD RF2373  
Driver Amplifier  
G=15dB  
RF In = -9dBm; RF Out = +6dBm  
EVM < 1%  
PA IC  
G=20dB  
RF In = +6dBm;RF Out=+26dBm  
EVM < 2.0%  
Vcc = 3 Vdc  
RF Out = -9dBm  
@54Mbps  
EVM < 3%  
Vcc=+5Vdc  
Vcc = +5 Vdc  
Ethernet  
Processor  
PA Stage EVM Contribution  
<2.5% @ +26dBm RF Pout  
Figure 1. IEEE802.11g/n AP Transmitter Major Component Line-Up  
Rev A12 061114  
2-631  
RF5163  
The RF5163PCBA-WD Evaluation Board employs the RF2373 as a driver amplifier at the input to the RF5163 (as final  
stage power amplifier IC). The RF2373 is a very high linearity single stage low noise amplifier (LNA)/driver amplifier that  
demonstrates approximately 15dB of gain from 2400MHz to 2500MHz and is capable of delivering +6dBm RF POUT at <  
1% EVM (RMS, mean). The RF5163PCBA-WD Evaluation Board is designed to maximize both useful gain and ultra lin-  
ear transmit power performance. Typical RF5163PCBA-WD Evaluation Board specifications are shown in the Table  
below:  
Typical RF5163PCBA-WD Evaluation Board Specifications:  
Parameter  
Min.  
Typ.  
Max.  
Unit  
Condition  
Frequency Range  
2400  
2500  
MHz  
T=25°C, V =+5.0V ; All V  
voltages=+3.0V  
CC  
DC  
REG DC  
Output Power  
EVM  
Gain  
+26  
33  
dBm  
%
dB  
2.5  
40  
RMS, mean (IEEE802.11g/n; Maximum Data Rate)  
-10dBm RF Pin  
Power Supply  
Operating Voltage  
(V  
)
5.0  
3.0  
V
V
CC  
DC  
DC  
Bias Voltage (V  
)
REG  
Current Consumption  
660  
mA  
RF P  
=+26dBm; RF PIN=-10dBm; P_Down is “ON”,  
OUT  
IEEE802.11g/n Modulation @ Maximum Data Rate  
All application information described above for the RF5163PCBA Evaluation Board applies directly to the RF5163PCBA-  
WD Evaluation Board.  
On the RF5163PCBA-WD Evaluation Board schematic, reference designator U1 identifies the RF2373 and reference  
designator U2 identifies the RF5163. VCC (nominal+5.0VDC) is supplied to both U1 (RF2373) and U2 (RF5163) simulta-  
neously through P2, two-pin header connector. VCC is applied to the RF2373 through RF2373 pin 4 (RF OUT). Inductor  
L4 is positioned to isolate the power supply line from C7 (RF2373 output tuning capacitor).  
R3 on RF2373 pin 3 sets the bias current for RF2373 VBIAS voltage. As employed within the RF5163PCBA-WD Evalua-  
tion Board, the RF2373 is biased for VBIAS voltage of +3.0VDC. RF2373 bias voltage is supplied through P3, two-pin  
header connector.  
Critical RF5163 input and output tuning components are L2, C11, C13, C16, and C17. The resistor values for R7 and R8  
have changed from the original values in the RF5163 evaluation board schematic. Critical RF2373 input and output tun-  
ing components are C6, C7 and L4. In these cases, high-Q capacitors suitable for RF applications are used on the  
RF5163PCBA-WD Evaluation Board (bill of material (BOM) is available upon request). 50Ω transmission line segments  
are employed at both the input and output of the RF2373. It is strongly recommended that the construction of these  
transmission line segments be followed as closely as possible to yield best gain, gain flatness, and linear amplifier driver  
performance.  
The RF5163PCBA-WD Evaluation Board includes two (2) locations where separate and independent 3dB loss pads may  
be populated. These two (2) 3dB loss pads are provided to reduce the overall gain of the RF2373+RF5163 amplifier  
combination (which can achieve 40dB gain if not reduced through the use of the available 3dB loss pads). If no gain  
reduction is desired simply place resistors R11 and R2 as zero (0) resistor values. If only a single 3dB loss pad is desired  
for circuit operation it is recommended to use the R9, R10, R11 3dB loss pad positioned in series with and before  
RF2373 pin 1 (RF IN). Place resistor R2 as a zero (0) value resistor.  
The RF5163PCBA-WD Evaluation Board has been characterized with a VCC voltage of +5.0VDC, RF5163 VREG1 and  
V
REG2 voltage of +3.0VDC, and RF2373 bias (VBIAS or VPD) voltage of +3.0VDC. These are ideal operating conditions to  
achieve the best combination of gain and ultra linear transmitter performance at an RF POUT=+26dBm. However, the  
RF5163PCBA-WD Evaluation Board will operate from a wide range of VCC and control voltages. If a different set of VCC  
and/or control voltages is desired, contact RFMD Sales or Applications Engineering for additional data and guidance.  
2-632  
Rev A12 061114  
RF5163  
Evaluation Board Schematic  
RF5163PCBA Evaluation Board (2400MHz to 2500MHz)  
VCC  
TL3=15 mils  
from the IC  
C3  
1 nF  
C13  
6.8 pF  
TL3  
C2  
1 μF  
L2  
6.8 nH  
Coilcraft  
16  
15  
14  
13  
L1  
1.5 nH  
C14  
1.5 pF  
TL1=50 mil (50 Ω)  
J1  
RF IN  
1
2
3
4
12  
11  
10  
9
C10  
10 pF  
50 Ω μstrip  
50 Ω μstrip  
TL1  
TL2  
J2  
RF OUT  
C16  
3.3 pF  
C15  
0.7 pF  
P_DOWN  
Bias  
P_DETECT  
R3  
750 Ω  
TL2=265 mil (50 Ω)  
C12  
330 pF  
5
6
7
8
5163400, r. A  
C4  
1 nF  
C5  
1 nF  
P3  
1
P1  
1
P3-1  
VPD  
GND  
GND  
VCC  
L3  
10 nH  
R1  
300 Ω  
R2  
200 Ω  
P1-2  
C20  
4.7 μF  
2
VREG  
P2  
1
P4  
1
P2-1  
C7  
4.7 μF  
VREG  
2
3
4
P2-2  
PDETECT  
GND  
P2-4  
P_DOWN  
Rev A12 061114  
2-633  
RF5163  
Evaluation Board Schematic  
RF5163PCBA-WD Evaluation Board (2400MHz to 2500MHz)  
VCC  
VCC  
P1*  
1
GND  
VCC  
P4  
1
C1  
4.7 uF  
P1-2  
2
GND  
P2  
1
FB1  
TBD  
P2-1  
VCC  
Test Coupon  
P5  
1
2
GND P5-1  
VCC  
50 Ω μStrip  
XX mil  
HDR_1X2  
C3  
1 nF  
J3  
J4  
C11 should be  
placed 15 mils  
from the PA  
C13*  
7.5 pF  
VCC  
TL3=C13 should be placed  
10 mil (50 Ω) from the PA  
C2  
4.7 uF  
R1  
0 Ω  
U1  
50 Ω μstrip  
C6  
220 pF  
C12  
1 uF  
R11  
18 Ω  
C11*  
2.2 nF  
L2 should be  
placed 78 mils  
(50 Ω) from  
the PA  
50 Ω μstrip  
50 Ω μstrip  
J1  
RF IN  
GND2  
VPD  
GND  
1
2
3
5
4
RF IN  
R9  
300 Ω  
R10  
300 Ω  
C4  
1 nF  
C5  
10 nF  
TL1=C16 should  
be placed at 30 mil  
(50 Ω) from the PA  
TL2=C17 should be  
placed at 214 mil  
(50 Ω) from the PA  
U2  
L1  
16  
15  
14  
13  
L4  
4.7 nH  
L2*  
1.5 nH  
C7  
2.0 pF  
C14  
1.5 pF  
6.8 nH  
Coilcraft  
0603  
R2  
18 Ω  
RF OUT  
1
2
3
4
12  
C15  
50 Ω μstrip  
10 pF  
R3  
560 Ω  
C8  
NPP  
R4  
300 Ω  
R5  
300 Ω  
50 Ω μstrip  
50 Ω μstrip  
50 Ω μstrip  
J2  
TL1=45 mil (50 Ω)  
from chip  
11  
10  
9
RF OUT  
VPD  
C16*  
3.9 pF  
C17*  
1 pF  
C9  
C10  
220 pF  
R6  
750 Ω  
1 nF  
Bias  
P_DOWN  
C18  
330 pF  
P_DETECT  
5
6
7
8
Notes:  
L3  
10 nH  
C20  
1 nF  
C19  
1 nF  
P3  
1
1. Parts with * should be populated as closely as possible to the instructions for each part.  
P3-1  
VPD  
GND  
2. The following parts should be placed as follows:  
• For 3 dB pad before the driver, populate R9, R10 and R11. If the 3 dB pad is not needed,  
populate R11 with a 0 Ω resistor.  
R7  
100 Ω  
R8  
150 Ω  
P6  
1
2
P6-1  
VREG  
2373+5163410, r2  
• For 3 dB pad in between the driver and PA, populate R2, R4 and R5. If the 3 dB pad is not needed,  
HDR_1X2  
populate R2 with a 0 Ω resistor.  
P6-2  
2
3
4
P_DETECT  
GND  
C21  
4.7 uF  
P6-4  
P_DOWN  
VREG  
2-634  
Rev A12 061114  
RF5163  
Evaluation Board Layout  
RF5163PCBA Evaluation Board (2400MHz to 2500MHz)  
Board Size 2.0” x 2.0”  
Board Thickness 0.031”, Board Material FR-4, Multi-Layer  
Rev A12 061114  
2-635  
RF5163  
Evaluation Board Layout  
RF5163PCBA-WD Evaluation Board (2400MHz to 2500MHz)  
Board Size 2.0” x 2.0”  
Board Thickness 0.031”, Board Material FR-4, Multi-Layer  
2-636  
Rev A12 061114  
RF5163  
Rev A12 061114  
2-637  
RF5163  
EVM (%) versus Frequency (GHz)  
Gain and RF POUT versus Frequency (MHz),  
VCC=+5VDC, VREG1=VREG2=+3VDC, T=+25°C 54Mbps, IEEE802.11g  
26.5  
26.0  
25.5  
25.0  
24.5  
24.0  
23.5  
23.0  
22.5  
22.0  
21.5  
21.0  
20.5  
20.0  
19.5  
19.0  
18.5  
2.40  
2.20  
2.00  
1.80  
1.60  
1.40  
1.20  
G(dB) vs. F(MHz)  
RF Pout (dBm) vs. F(MHz)  
2.35  
2.40  
2.45  
2.50  
2.55  
2380.0  
2400.0  
2420.0  
2440.0  
2460.0  
2480.0  
2500.0  
2520.0  
Frequency (GHz)  
Frequency (MHz)  
ICC (A) (Total) versus Frequency (GHz)  
P_Detect versus P_Out,  
VCC=+5.0VDC  
0.55  
0.54  
0.53  
0.52  
0.51  
0.50  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
Vreg:3.3  
Vreg:3.0  
2.35  
2.40  
2.45  
2.50  
2.55  
0.0  
5.0  
10.0  
15.0  
20.0  
25.0  
30.0  
Frequency (GHz)  
P_Out (dBm)  
RF POUT versus EVM and ICC (Total)  
5.0  
4.0  
3.0  
2.0  
1.0  
0.0  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
EVM (%)  
ICC_Total(mA)  
0.0  
21.0  
22.0  
23.0  
24.0  
25.0  
26.0  
27.0  
28.0  
29.0  
POUT (dBm)  
2-638  
Rev A12 061114  

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