RF5146 [RFMD]
QUAD-BAND GSM850/GSM900/DCS/PCS POWER AMP MODULE; 四频GSM850 / GSM900 / DCS / PCS功率放大器模块
| 型号： | RF5146 |
| 厂家： | 
RF MICRO DEVICES |
| 描述： | QUAD-BAND GSM850/GSM900/DCS/PCS POWER AMP MODULE |
| 文件： | 总18页 (文件大小：1012K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RF5146
QUAD-BAND GSM850/GSM900/DCS/PCS
POWER AMP MODULE
0
RoHS Compliant & Pb-Free Product
Typical Applications
• 3V Quad-Band GSM Handsets
• GSM850/EGSM900/DCS/PCS Products
• GPRS Class 12 Compatible
• Power StarTM Module
• Commercial and Consumer Systems
• Portable Battery-Powered Equipment
Product Description
0.10
2 PLCS
C
A
0.08
C
-A-
0.90
0.85
7.00 TYP
6.75 TYP
0.70
0.65
The RF5146 is a high-power, high-efficiency power ampli-
fier module with integrated power control that provides
over 50dB of control range. The device is a self-contained
7mmx7mmx0.9mm lead frame module (LFM) with 50Ω
input and output terminals. The device is designed for use
as the final RF amplifier in GSM850, EGSM900, DCS and
PCS handheld digital cellular equipment and other appli-
cations in the 824MHz to 849MHz, 880MHz to 915MHz,
1710MHz to 1785MHz and 1850MHz to 1910MHz
bands. With the integration of a VRAMP limiting circuit, the
0.05
0.00
0.10
2 PLCS
C B
2 PLCS
C B
0.10
-B-
SEATING
PLANE
2 PLCS
0.10
-C-
3.37 TYP
3.50 TYP
C
A
Dimensions in mm.
0.10M C A B
0.60
0.24
0.30
0.18
TYP
0.50
RF5146 can regulate the VRAMP voltage to ensure mini-
mum switching transients. The VRAMP limiter function is
0.60
0.24
TYP
2.20
1.90
Shaded lead is pin 1.
fully integrated into the CMOS controller and requires no
additional inputs from the user.
0.30
0.50
0.30
TYP
5.25
4.95
Optimum Technology Matching® Applied
Package Style: LFM, 48-Pin, 7mmx7mmx0.9mm
Si BJT
GaAs HBT
SiGe HBT
GaN HEMT
GaAs MESFET
9
Si Bi-CMOS
InGaP/HBT
Si CMOS
Features
9
SiGe Bi-CMOS
• V
Limiter
RAMP
• Complete Power Control Solution
• +35dBm GSM Output Power at 3.5V
• +33dBm DCS/PCS Output Power at 3.5V
DCS/PCS IN 37
BAND SELECT 40
TX ENABLE 41
VBATT 42
31 DCS/PCS OUT
• 60% GSM and 55% DCS/PCS
EFF
• 7mmx7mmx0.9mm Package Size
Fully Integrated
Power Control Circuit
VBATT 43
Ordering Information
VRAMP 45
RF5146
Quad-Band GSM850/GSM900/DCS/PCS Power
Amp Module
GSM IN 48
6 GSM OUT
RF5146 SB
Power Amp Module 5-Piece Sample Pack
RF5146PCBA-41X Fully Assembled Evaluation Board
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Functional Block Diagram
Rev A1 050928
2-491
RF5146
Absolute Maximum Ratings
Parameter
Supply Voltage
Rating
-0.3 to +6.0
-0.3 to +1.8
Unit
V
DC
Caution! ESD sensitive device.
Power Control Voltage (V
)
V
RAMP
Input RF Power
Max Duty Cycle
Output Load VSWR
Operating Case Temperature
Storage Temperature
+10
50
10:1
dBm
%
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. RoHS marking based on EUDirective2002/95/EC
(at time of this printing). However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
-20 to +85
-55 to +150
°C
°C
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
Overall Power Control
VRAMP
Power Control “ON”
Power Control “OFF”
1.6
0.25
20
V
V
Max. P
, Voltage supplied to the input
OUT
0.2
15
Min. P
, Voltage supplied to the input
OUT
V
V
Input Capacitance
Input Current
pF
μA
μs
DC to 2MHz
RAMP
RAMP
10
V
V
=1.6V
RAMP
RAMP
Turn On/Off Time
2
=0.2V to 1.6V
TX Enable “ON”
TX Enable “OFF”
GSM Band Enable
DCS/PCS Band Enable
Overall Power Supply
Power Supply Voltage
1.9
1.9
V
V
V
V
0.5
0.5
3.5
1
V
V
μA
Specifications
Nominal operating limits
P <-30dBm, TX Enable=Low,
IN
Power Supply Current
Temp=-20°C to +85°C
V =0.2V, TX Enable=High
RAMP
mA
Overall Control Signals
Band Select “Low”
Band Select “High”
Band Select “High” Current
TX Enable “Low”
TX Enable “High”
0
1.9
0
2.0
20
0
2.0
1
0.5
3.0
50
0.5
3.0
2
V
V
μA
V
V
μA
0
1.9
TX Enable “High” Current
2-492
Rev A1 050928
RF5146
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
Temp = +25 °C, V
=3.5V,
BATT
V
=1.6V, P =3dBm, Freq=824MHz to
IN
RAMP
Overall (GSM850 Mode)
849MHz,
25% Duty Cycle, Pulse Width=1154μs
Operating Frequency Range
Maximum Output Power
824 to 849
MHz
dBm
+34.2
+32.0
Temp = 25°C, V
=3.5V,
BATT
V
=1.6V
RAMP
dBm
Temp=+85 °C, V
=3.0V,
BATT
V
=1.6V
RAMP
Total Efficiency
55
+3
%
At P
, V
=3.5V
BATT
OUT MAX
Input Power Range
0
+5
dBm
Maximum output power guaranteed at mini-
mum drive level
Output Noise Power
-88
dBm
RBW=100kHz, 869MHz to 894MHz,
P
> +5dBm
OUT
Forward Isolation 1
Forward Isolation 2
-50
-35
dBm
dBm
dBm
dBm
dBm
dBm
TXEnable=Low, P =+5dBm
IN
TXEnable=High, P =+5dBm, V
=0.2V
RAMP
IN
Cross Band Isolation at 2f
Second Harmonic
Third Harmonic
V
V
V
V
=0.2V to V
=0.2V to V
=0.2V to V
R
R
R
0
RAMP
RAMP
RAMP
RAMP
RAMP_
RAMP_
RAMP_
P
P
P
-15
-25
All Other
-36
=0.2V to 1.6V
Non-Harmonic Spurious
Input Impedance
50
Ω
Input VSWR
2.5:1
V
=0.2V to 1.6V
RAMP
Output Load VSWR Stability
8:1
Spurious<-36dBm, RBW=3MHz
Set V
where P
<34.2dBm into 50Ω
RAMP
OUT
load
Output Load VSWR Ruggedness
10:1
Set V
where P
<34.2dBm into 50Ω
RAMP
OUT
load. No damage or permanent degradation
to part.
Output Load Impedance
50
55
Ω
Load impedance presented at RF OUT pad
Power Control VRAMP
Power Control Range
dB
V
=0.2V to 1.6V
RAMP
Notes:
V
_R =V
set for 34.2dBm at nominal conditions.
RAMP
RAMP
P
Rev A1 050928
2-493
RF5146
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
Temp = +25 °C, V
=3.5V,
BATT
V
=1.6V, P =3dBm, Freq=880MHz to
IN
RAMP
Overall (GSM900 Mode)
915MHz,
25% Duty Cycle, Pulse Width=1154μs
Operating Frequency Range
Maximum Output Power
880 to 915
MHz
dBm
+34.2
+32.0
Temp = 25°C, V
=3.5V,
BATT
V
=1.6V
RAMP
dBm
Temp=+85 °C, V
=3.0V,
BATT
V
=1.6V
RAMP
Total Efficiency
58
+3
%
At P
, V
=3.5V
BATT
OUT MAX
Input Power Range
0
+5
dBm
Maximum output power guaranteed at mini-
mum drive level
Output Noise Power
-86
-88
dBm
dBm
RBW=100kHz, 925MHz to 935MHz,
P
> +5dBm
OUT
RBW=100kHz, 935MHz to 960MHz,
> +5dBm
P
OUT
Forward Isolation 1
Forward Isolation 2
-45
-30
dBm
dBm
dBm
dBm
dBm
dBm
TXEnable=Low, P =+5dBm
IN
TXEnable=High, V
=0.2V, P =+5dBm
IN
RAMP
Cross Band Isolation 2f
Second Harmonic
Third Harmonic
All Other
V
V
V
V
=0.2V to V
=0.2V to V
=0.2V to V
R
RAMP_
0
RAMP
RAMP
RAMP
RAMP
P
P
P
-15
-25
R
RAMP_
R
RAMP_
-36
=0.2V to 1.6V
Non-Harmonic Spurious
Input Impedance
50
Ω
Input VSWR
2.5:1
V
=0.2V to 1.6V
RAMP
Output Load VSWR Stability
8:1
Spurious<-36dBm, RBW=3MHz
Set V
where P
<34.2dBm into 50Ω
RAMP
OUT
load
Output Load VSWR Ruggedness
10:1
Set V
where P
<34.2dBm into 50Ω
RAMP
OUT
load. No damage or permanent degradation
to part.
Output Load Impedance
Power Control VRAMP
Power Control Range
Notes:
50
50
Ω
Load impedance presented at RF OUT pad
dB
V
=0.2V to 1.6V
RAMP
V
_R =V
set for 34.2dBm at nominal conditions.
RAMP
RAMP
P
2-494
Rev A1 050928
RF5146
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
Temp = 25°C, V
=3.5V,
BATT
V
=1.6V, P =3dBm,
IN
RAMP
Overall (DCS Mode)
Freq=1710MHz to 1785MHz,
25% Duty Cycle, pulse width=1154μs
Operating Frequency Range
Maximum Output Power
1710 to 1785
MHz
dBm
+32.0
+30.0
Temp=25°C, V
=3.5V,
BATT
V
=1.6V
RAMP
dBm
Temp=+85°C, V
=3.0V,
BATT
V
=1.6V
RAMP
Total Efficiency
50
+3
%
At P
V
=3.5V
OUT MAX, BATT
Input Power Range
0
+5
dBm
Maximum output power guaranteed at mini-
mum drive level
Output Noise Power
-85
dBm
RBW=100kHz, 1805MHz to 1880MHz,
P
> 0dBm, V
=3.5V
OUT
BATT
Forward Isolation 1
Forward Isolation 2
Second Harmonic
Third Harmonic
-50
-25
-15
-20
dBm
dBm
dBm
dBm
dBm
TXEnable=Low, P =+5dBm
IN
TXEnable=High, V
=0.2V, P =+5dBm
IN
RAMP
V
V
V
=0.2V to V
=0.2V to V
R
RAMP_
RAMP
RAMP
RAMP
P
P
R
RAMP_
All Other
-36
=0.2V to 1.6V
Non-Harmonic Spurious
Input Impedance
Input VSWR
50
Ω
2.5:1
V
=0.2V to 1.6V
RAMP
Output Load VSWR Stability
8:1
Spurious<-36dBm, RBW=3MHz
Set V
where P
<32dBm into 50Ω
RAMP
OUT
load
Output Load VSWR Ruggedness
10:1
Set V
where P
<32dBm into 50Ω
RAMP
OUT
load. No damage or permanent degradation
to part.
Output Load Impedance
50
50
Ω
Load impedance presented at RF OUT pin
Power Control VRAMP
Power Control Range
dB
V
=0.2V to 1.6V, P =+5dBm
RAMP IN
Notes:
V
_R =V
set for 32dBm at nominal conditions.
RAMP
RAMP
P
Rev A1 050928
2-495
RF5146
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
Temp = 25°C, V
=3.5V,
BATT
V
=1.6V, P =3dBm, Freq=1850MHz
IN
RAMP
Overall (PCS Mode)
to 1910MHz,
25% Duty Cycle, pulse width=1154μs
Operating Frequency Range
Maximum Output Power
1850 to 1910
MHz
dBm
+32.0
+30.0
Temp=25°C, V
=3.5V,
BATT
V
=1.6V, 1850MHz to 1910MHz
RAMP
dBm
Temp=+85°C, V
=3.0V,
BATT
V
=1.6V
RAMP
Total Efficiency
52
+3
%
At P
V
=3.5V
OUT MAX, BATT
Input Power Range
0
+5
dBm
Full output power guaranteed at minimum
drive level
Output Noise Power
-85
dBm
RBW=100kHz, 1930MHz to 1990MHz,
P
> 0dBm, V
=3.5V
OUT
BATT
Forward Isolation 1
Forward Isolation 2
Second Harmonic
Third Harmonic
-40
-20
-15
-20
dBm
dBm
dBm
dBm
dBm
TX_ENABLE=Low, P =+5dBm
IN
TXEnable=High, V
=0.2V, P =+5dBm
IN
RAMP
V
V
V
=0.2V to V
=0.2V to V
R
RAMP_
RAMP
RAMP
RAMP
P
P
R
RAMP_
All Other
-36
=0.2V to 1.6V
Non-Harmonic Spurious
Input Impedance
Input VSWR
50
Ω
2.5:1
V
=0.2V to 1.6V
RAMP
Output Load VSWR Stability
8:1
Spurious<-36dBm, RBW=3MHz
Set V
where P
<32dBm into 50Ω
RAMP
OUT
load
Output Load VSWR Ruggedness
10:1
Set V
where P
<32dBm into 50Ω
RAMP
OUT
load. No damage or permanent degradation
to part.
Output Load Impedance
50
50
Ω
Load impedance presented at RF OUT pin
Power Control VRAMP
Power Control Range
dB
V
=0.2V to 1.6V, P =+5dBm
RAMP IN
Notes:
V
_R =V
set for 32dBm at nominal conditions.
RAMP
RAMP
P
2-496
Rev A1 050928
RF5146
Pin
1
Function Description
Interface Schematic
Internal circuit node. Do not externally connect.
NC
Controlled voltage input to the GSM driver stage. This voltage is part of
the power control function for the module. This node must be con-
nected to VCC OUT. This pin should be externally decoupled.
2
VCC2 GSM
VCC2
Internal circuit node. Do not externally connect.
Internally connected to the package base.
Internally connected to the package base.
3
4
5
6
NC
GND
GND
RF output for the GSM bands. This is a 50Ω output. The output match-
ing circuit and DC-block are internal to the package.
GSM850/
GSM900
OUT
VCC3
Output
RF OUT
Match
Internally connected to the package base.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
No internal or external connection.
7
8
9
GND
NC
NC
NC
NC
NC
NC
NC
NC
10
11
12
13
14
15
16
17
18
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
NC
NC
VCC3 GSM
Controlled voltage input to the GSM output stage. This voltage is part of
the power control function for the module. This node must be con-
nected to VCC OUT. This pin should be externally decoupled.
VCC3
Controlled voltage output to feed VCC2 and VCC3. This voltage is part
of the power control function for the module. It cannot be connected to
any pins other than VCC2 and VCC3.
19
20
21
VCC OUT
VCC OUT
Controlled voltage output to feed VCC2 and VCC3. This voltage is part
of the power control function for the module. It cannot be connected to
any pins other than VCC2 and VCC3.
Controlled voltage input to the DCS/PCS output stage. This voltage is
part of the power control function for the module. This node must be
connected to VCC OUT. This pin should be externally decoupled.
See pin 18.
VCC3
DCS/PCS
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
No internal or external connection.
22
23
24
25
26
27
28
29
30
NC
NC
NC
NC
NC
NC
NC
NC
GND
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internally connected to the package base.
Rev A1 050928
2-497
RF5146
Pin
Function Description
Interface Schematic
RF output for the DCS/PCS bands. This is a 50Ω output. The output
matching circuit and DC-block are internal to the package.
See pin 6.
31
DCS/PCS
OUT
Internally connected to the package base.
Internal circuit node. Do not externally connect.
Internally connected to the package base.
32
33
34
35
GND
NC
GND
Controlled voltage input to the DCS/PCS driver stage. This voltage is
part of the power control function for the module. This node must be
connected to VCC OUT. This pin should be externally decoupled.
See pin 2.
VCC2
DCS/PCS
Internally connected to the package base.
36
37
GND
DCS/PCS IN
RF input to the DCS/PCS band. This is a 50Ω output.
VCC1
RF IN
Internally connected to the package base.
38
39
GND
VCC1
DCS/PCS
Controlled voltage on the GSM and DCS/PCS preamplifier stages. This
voltage is applied internal to the package. This pin should be externally
decoupled.
VCC1
Allows external control to select the GSM or DCS/PCS bands with a
logic high or low. A logic low enables the GSM bands, whereas a logic
high enables the DCS/PCS bands.
40
41
BAND SEL
BAND SEL
GSM CTRL
TX EN
DCS CTRL
This signal enables the PA module for operation with a logic high. Both
bands are disabled with a logic low.
TX ENABLE
VBATT
TX EN
TX ON
Power supply for the module. This pin should be externally decoupled
and connected to the battery.
42
43
VBATT
VBATT
Power supply for the module. This pin should be externally decoupled
and connected to the battery.
Internal circuit node. Do not externally connect.
44
45
NC
VRAMP
Ramping signal from DAC. A 300kHz lowpass filter is integrated into
the CMOS. No external filtering is required. A VRAMP limiter function is
also integrated into the CMOS.
300 kHz
VRAMP
Internally connected to VCC1 (pin 39). No external connection
required.
See pin 39.
46
47
48
VCC1 GSM
GND1 GSM
Ground connection for the GSM preamplifier stage. Connect to ground
plane close to the package pin.
RF input to the GSM band. This is a 50Ω input.
See pin 37.
GSM850/
GSM900 IN
GND
Connect to ground plane with multiple via holes. See recommended
footprint.
Pkg
Base
2-498
Rev A1 050928
RF5146
Pin Out
48
47
46
45
44
43
42
41
40
39
38
37
NC
VCC2 GSM
NC
1
2
3
4
5
6
7
8
9
36 GND
VCC2
DCS/PCS
35
34 GND
33 NC
GND
GND
32 GND
31 DCS/PCS OUT
30 GND
29 NC
GSM850/
GSM900 OUT
GND
NC
NC
28 NC
NC 10
NC 11
NC 12
27 NC
26 NC
25 NC
13
14
15
16
17
18
19
20
21
22
23
24
Rev A1 050928
2-499
RF5146
Application Schematic
TX EN
BAND SEL
VBATT
VCC1
VRAMP
22 μF
15 nF
38
GSM850/
GSM900 IN
DCS/PCS IN
48
47
46
45
44
43
42
41
40
39
37
1
2
36
35
34
33
32
31
30
29
28
27
26
25
From
VCC1
VCC
4.7 nF
4.7 nF
3
4
Fully Integrated
Power Control Circuit
5
GSM850/
GSM900 OUT
6
DCS/PCS OUT
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
47 pF
1 nF
470 pF
2-500
Rev A1 050928
RF5146
Evaluation Board Schematic
TX EN
BAND SEL
R3
100 kΩ
R2
100 kΩ
VRAMP
VBATT
VCC1
C2
22 μF
C6
15 nF
R4
100 kΩ
50 Ω μstrip
50 Ω μstrip
GSM850/
GSM900 IN
DCS/PCS IN
48
47
46
45
44
43
42
41
40
39
38
37
1
2
36
35
34
33
32
31
30
29
28
27
26
25
From
VCC1
VCC
C5
C9
C8
C4
DNP
4.7 nF
4.7 nF
DNP
3
4
5
50 Ω μstrip
50 Ω μstrip
GSM850/
GSM900 OUT
6
DCS/PCS OUT
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
C13
47 pF
C10
1 nF
C12
C11
DNP
470 pF
Rev A1 050928
2-501
RF5146
Evaluation Board Layout
Board Size 2.0” x 2.0”
Board Thickness 0.032”, Board Material FR-4, Multi-Layer
2-502
Rev A1 050928
RF5146
Theory of Operation
Overview
The RF5146 is a quad-band GSM850, EGSM900, DCS1800, and PCS1900 power amplifier module that incorporates an
indirect closed loop method of power control. This simplifies the phone design by eliminating the need for the compli-
cated control loop design. The indirect closed loop appears as an open loop to the user and can be driven directly from
the DAC output in the baseband circuit.
Theory of Operation
The indirect closed loop is essentially a closed loop method of power control that is invisible to the user. Most power con-
trol systems in GSM sense either forward power or collector/drain current. The RF5146 does not use a power detector. A
high-speed control loop is incorporated to regulate the collector voltage of the amplifier while the stage are held at a con-
stant bias. The VRAMP signal is multiplied by a factor of 2.75 and the collector voltage for the second and third stages are
regulated to the multiplied VRAMP voltage. The basic circuit is shown in the following diagram.
VBATT
-
VRAMP
+
-
Saturation
Detector
+
3 dB BW
300 kHz
H(s)
RF IN
TX ENABLE
RF OUT
By regulating the power, the stages are held in saturation across all power levels. As the required output power is
decreased from full power down to 0dBm, the collector voltage is also decreased. This regulation of output power is
demonstrated in Equation 1 where the relationship between collector voltage and output power is shown. Although load
impedance affects output power, supply fluctuations are the dominate mode of power variations. With the RF5146 regu-
lating collector voltage, the dominant mode of power fluctuations is eliminated.
2
(2 ⋅ VCC – VSAT
)
-------------------------------------------
PdBm = 10 ⋅ log
(Eq. 1)
8 ⋅ RLOAD ⋅ 10–3
There are several key factors to consider in the implementation of a transmitter solution for a mobile phone. Some of
them are:
•
•
•
•
•
•
•
•
•
•
Current draw and system efficiency
Power variation due to Supply Voltage
Power variation due to frequency
Power variation due to temperature
Input impedance variation
Noise power
Loop stability
Loop bandwidth variations across power levels
Burst timing and transient spectrum trade offs
Harmonics
Rev A1 050928
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RF5146
Output power does not vary due to supply voltage under normal operating conditions if VRAMP is sufficiently lower than
V
BATT. By regulating the collector voltage to the PA the voltage sensitivity is essentially eliminated. This covers most
cases where the PA will be operated. However, as the battery discharges and approaches its lower power range the
maximum output power from the PA will also drop slightly. In this case it is important to also decrease VRAMP to prevent
the power control from inducing switching transients. These transients occur as a result of the control loop slowing down
and not regulating power in accordance with VRAMP
.
The switching transients due to low battery conditions are regulated by the VRAMP limiter circuit. The VRAMP limiter, a
new feature for the RF5146, consists of a feedback loop that detects FET saturation. As the FET approaches saturation,
the limiter adjusts the VRAMP voltage in order to ensure minimum switching transients. The VRAMP limiter is integrated
into the CMOS controller and requires no additional input from the user.
Due to reactive output matches, there are output power variations across frequency. There are a number of components
that can make the effects greater or less. Power variation straight out of the RF5146 is shown in the tables below.
The components following the power amplifier often have insertion loss variation with respect to frequency. Usually, there
is some length of microstrip that follows the power amplifier. There is also a frequency response found in directional cou-
plers due to variation in the coupling factor over frequency, as well as the sensitivity of the detector diode. Since the
RF5146 does not use a directional coupler with a diode detector, these variations do not occur.
Input impedance variation is found in most GSM power amplifiers. This is due to a device phenomena where CBE and
CCB (CGS and CSG for a FET) vary over the bias voltage. The same principle used to make varactors is present in the
power amplifiers. The junction capacitance is a function of the bias across the junction. This produces input impedance
variations as the Vapc voltage is swept. Although this could present a problem with frequency pulling the transmit VCO
off frequency, most synthesizer designers use very wide loop bandwidths to quickly compensate for frequency variations
due to the load variations presented to the VCO.
The RF5146 presents a very constant load to the VCO. This is because all stages of the RF5146 are run at constant
bias. As a result, there is constant reactance at the base emitter and base collector junction of the input stage to the
power amplifier.
Noise power in PA's where output power is controlled by changing the bias voltage is often a problem when backing off of
output power. The reason is that the gain is changed in all stages and according to the noise formula (Equation 2),
F2 – 1 F3 – 1
FTOT = F1 + --------------- + -------------------
(Eq. 2)
G1
G1 ⋅ G2
the noise figure depends on noise factor and gain in all stages. Because the bias point of the RF5146 is kept constant
the gain in the first stage is always high and the overall noise power is not increased when decreasing output power.
Power control loop stability often presents many challenges to transmitter design. Designing a proper power control loop
involves trade-offs affecting stability, transient spectrum and burst timing.
In conventional architectures the PA gain (dB/V) varies across different power levels, and as a result the loop bandwidth
also varies. With some power amplifiers it is possible for the PA gain (control slope) to change from 100dB/V to as high
as 1000dB/V. The challenge in this scenario is keeping the loop bandwidth wide enough to meet the burst mask at low
slope regions which often causes instability at high slope regions.
The RF5146 loop bandwidth is determined by internal bandwidth and the RF output load and does not change with
respect to power levels. This makes it easier to maintain loop stability with a high bandwidth loop since the bias voltage
and collector voltage do not vary.
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Rev A1 050928
RF5146
An often overlooked problem in PA control loops is that a delay not only decreases loop stability it also affects the burst
timing when, for instance the input power from the VCO decreases (or increases) with respect to temperature or supply
voltage. The burst timing then appears to shift to the right especially at low power levels. The RF5146 is insensitive to a
change in input power and the burst timing is constant and requires no software compensation.
Switching transients occur when the up and down ramp of the burst is not smooth enough or suddenly changes shape. If
the control slope of a PA has an inflection point within the output power range or if the slope is simply too steep it is diffi-
cult to prevent switching transients. Controlling the output power by changing the collector voltage is as earlier described
based on the physical relationship between voltage swing and output power. Furthermore all stages are kept constantly
biased so inflection points are nonexistent.
Harmonics are natural products of high efficiency power amplifier design. An ideal class “E” saturated power amplifier
will produce a perfect square wave. Looking at the Fourier transform of a square wave reveals high harmonic content.
Although this is common to all power amplifiers, there are other factors that contribute to conducted harmonic content as
well. With most power control methods a peak power diode detector is used to rectify and sense forward power. Through
the rectification process there is additional squaring of the waveform resulting in higher harmonics. The RF5146 address
this by eliminating the need for the detector diode. Therefore the harmonics coming out of the PA should represent the
maximum power of the harmonics throughout the transmit chain. This is based upon proper harmonic termination of the
transmit port. The receive port termination on the T/R switch as well as the harmonic impedance from the switch itself
will have an impact on harmonics. Should a problem arise, these terminations should be explored.
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RF5146
PCB Design Requirements
PCB Surface Finish
The PCB surface finish used for RFMD’s qualification process is electroless nickel, immersion gold. Typical thickness is
3μinch to 8μinch gold over 180μinch nickel.
PCB Land Pattern Recommendation
PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and
tested for optimized assembly at RFMD; however, it may require some modifications to address company specific
assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances.
PCB Metal Land Pattern
A = 0.64 x 0.28 (mm) Typ.
B = 0.28 x 0.64 (mm) Typ.
C = 5.65 (mm) Sq.
5.50 Typ.
Dimensions in mm.
0.50 Typ.
Pin 48
B
B B B B B B B B B B B
Pin 1
Pin 36
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
0.50 Typ.
2.75
5.50 Typ.
C
0.55 Typ.
0.55 Typ.
B
B B B B B B B B B B B
Pin 24
2.75
Figure 1. PCB Metal Land Pattern (Top View)
2-506
Rev A1 050928
RF5146
PCB Solder Mask Pattern
Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the
PCB metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all
pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask
clearance can be provided in the master data or requested from the PCB fabrication supplier.
A = 0.74 x 0.38 (mm) Typ.
B = 0.38 x 0.74 (mm) Typ.
C = 5.65 x 2.20 (mm)
5.50 Typ.
Dimensions in mm.
0.50 Typ.
Pin 48
B
B B B B B B B B B B B
Pin 36
Pin 1
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
0.50 Typ.
1.95
C
5.50 Typ.
0.55 Typ.
0.55 Typ.
B
B B B B B B B B B B B
Pin 24
2.75
Figure 2. PCB Solder Mask Pattern
Thermal Pad and Via Design
Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been
designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating
routing strategies.
The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size
on a 0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested
that the quantity of vias be increased by a 4:1 ratio to achieve similar results.
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RF5146
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Rev A1 050928
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