M52742ASP [RENESAS]
BUS Controlled 3-Channel Video Preamp for CRT Display Monitor; 总线控制3路视频前置放大器CRT显示器型号: | M52742ASP |
厂家: | RENESAS TECHNOLOGY CORP |
描述: | BUS Controlled 3-Channel Video Preamp for CRT Display Monitor |
文件: | 总27页 (文件大小:378K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
M52742ASP
BUS Controlled 3-Channel Video Preamp for CRT Display Monitor
REJ03F0192-0201
Rev.2.01
Mar 31, 2008
Description
M52742ASP is semiconductor integrated circuit for CRT display monitor.
It includes OSD blanking, OSD mixing, retrace blanking, wide band amplifier, brightness control, uniformity function.
Main/sub contrast and OSD adjust function can be controlled by I2C BUS.
Features
•
Frequency band width: RGB
OSD
200 MHz (at −3 dB)
80 MHz
Input: RGB
OSD
0.7 VP-P (typ.)
3 VP-P min. (positive)
3 VP-P min. (positive)
3 VP-P min. (positive)
5.5 VP-P (max.)
BLK (for OSD)
Retrace BLK
Output: RGB
OSD
5 VP-P (max.)
•
•
Main contrast and sub contrast can be controlled by I2C
Include internal and external pedestal clamp circuit.
Application
CRT display monitor
Recommended Operating C
Supply voltage range:
V3, V8, V12, V36)
(V17)
(V3, V8, V12, V36)
V (V17)
Rated supply voltage:
Major Specification
BUS controlled 3ch video pre-amp with OSD mixing function and retrace blanking function
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 1 of 26
M52742ASP
Block Diagram
MAIN
BRIGHTNESS
RETRACE
BLK IN
30
27
OSD IN (R)
4
Sub
contrast
Main
contrast
Retrace
blanking
2
3
5
9
Amp
INPUT (R)
VCC1 (R) 12 V
GND1 (R)
Clamp
Clamp
Clamp
OSD Mix
OUTPUT (R)
35
Sub Cont
(8 bit)
Clamp
F/B
34 EXT
FEED BACK (R)
OSD IN (G)
INPUT (G)
Main
contrast
Sub
contrast
Retrace
blanking
6
8
Amp
32
31
OSD Mix
OUTPUT (G)
VCC1 (G) 12 V
Sub Cont
(8 bit)
EXT
FEED BACK (G)
Clamp
F/B
GND1 (G) 10
OSD IN (B)
INPUT (B)
13
11
Main
contrast
Sub
contrast
Retrace
anking
OSD Mix
29 OUTPUT (B)
VCC1 (B) 12 V
GND1 (B)
12
14
15
Sub Cont
(8 bit)
EXT
FEED BACK (B)
28
Main
contrast
8 bit
CONTRAST
(ABL) IN
VCC 5 V
(DIGITAL)
SDA
17
21
20
22
Sync on
Green Sep
BUS
I/F
INPUT (SOG)
7
AC
SCL
SOG SEP OUT 18
GND (5 V)
19
16
23 24 25 26
DAC OUTPUT
FOR CUT-OFF adj
CLAMP
PULSE
IN
UNIFOR
I
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 2 of 26
M52742ASP
Pin Arrangement
M52742ASP
OSD BLK IN
INPUT (R)
1
2
3
4
5
6
7
8
9
36 VCC2
35 OUTPUT (R)
34 EXT FEED BACK (R)
33 GND2
VCC1 (R)
OSD IN (R)
GND1 (R)
32 OUTPUT (G)
31 EXT FEED BACK (G)
30 MAIN BRIGHTNESS
29 OUTPUT (B)
28 EXT FEED BACK (B)
27 RETRACE BLK IN
26 D/A OUT1
INPUT (G)
INPUT (SOG)
VCC1 (G)
OSD IN (G)
GND1 (G) 10
INPUT (B) 11
V
CC1 (B) 12
25 D/A OUT2
OSD IN (B) 13
GND1 (B) 14
24 D/A OUT3
23 D/A OUT4
ABL IN 15
22 GND (5
UNIFORMITY IN 16
21 SD
VCC = 5 V 17
20
SOG SEP OUT 18
1
(Top vie
Outl
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 3 of 26
M52742ASP
Absolute Maximum Ratings
(Ta = 25°C)
Item
Supply voltage (pins 3, 8, 12, 36)
Supply voltage (pin 17)
Power dissipation
Symbol
Ratings
13.0
Unit
VCC12
VCC5
Pd
V
6.0
V
2403
mW
°C
°C
V
Ambient temperature
Topr
Tstg
−20 to +75
−40 to +150
12.0
Storage temperature
Recommended supply 12
Recommended supply 5
Vopr12
Vopr5
5.0
V
Electrical Characteristics
(VCC = 12 V, 5 V, Ta = 25°C, unless otherwise noted)
CTL
Limits
Input
19
Voltage
30 15
Bri- AB
BUS CTL (H)
2H 03H 04H 05H 06H 07H 08H 09H 0BH
Test
Point
Min. Typ. Max. Unit (s)
2, 6,
1
4, 9
27
7
16
11 OSD 13 CP in ReT SOG UNI
Sub OSD BLK D/A D/A
D/A
Cont Adj Adj OUT OUT OUT OUT EXT
D/A
INT
RGB BLK OSD
in
BLK
in
in
ght
Item
Circuit
current1
Symbol
ICC1
in
3
1
2
3
4
b
SG5
00H 00H FFH FFH FFH FFH 00H
0
126 146 mA
IA
IB
a
a
a
a
a
a
a
a
a
0
255 255
255
255
b
SG5
Circuit
current2
mA
a
a
a
a
a
a
a
ICC2
18
8.0
25
b
SG2
b
SG5
Output
dynamic range
VP-P OUT
6.0
1.6
Vomax
Vimax
b
SG2
Variable
Maximum
input
VP-P IN
OUT
b
SG1
Maximum
gain
16.5 17.7 19.4 dB OUT
a
Gv
255
Relative max-
imum gain
1.0
1.2
0.8
∆Gv
VC1
Main contrast
control
C8H
200
17.0 18.5 dB O
2.0 5.0
15.5
characteristics1
Main contrast
control relative
characteristics1
1.0
1.2
0.8
∆VC1
Main contrast
control
characteristics2
G5
64H
100
11.0
a
a
a
a
a
a
a
a
2.0 5.0
9.5
0
VC2
Main contrast
control relative
characteristics2
Main contrast
control
0.4
∆VC2
VC3
b
SG1
b
SG5
14H
20
2.0 5.0
0.2
characteristics3
Main contrast
control relative
characteristics3
Sub contrast
control
1.0 1.2
a
a
a
a
a
0.8
∆VC3
VSC1
∆VSC1
VSC2
∆VSC2
VSC3
∆VSC3
b
SG1
b
SG5
FFH C8H C8H C8H
2.0 5.0
17.5 19.0 dB OUT
16.0
0.8
255
200 200 200
characteristics1
Sub contrast
control relative
characteristics1
Sub contrast
control
1.0 1.2
a
a
a
a
a
b
SG1
b
SG5
FFH 64H 64H 64H
2.0 5.0
13.5 15.0 dB OUT
12.0
255
100 100 100
characteristics2
Sub contrast
control relative
characteristics2
Sub contrast
control
0.8 1.0 1.2
a
a
a
a
a
b
SG1
b
SG5
FFH 14H 14H 14H
2.0 5.0
1.5 1.9
2.2 VP-P OUT
255
20
20
20
characteristics3
Sub contrast
control relative
characteristics3
1.0 1.2
0.8
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 4 of 26
M52742ASP
Electrical Characteristics (cont.)
CTL
Voltage
Limits
Test
Point
Input
4, 9 19
BUS CTL (H)
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0BH
2, 6,
11
1
27
7
16
30
OSD 13 CP in ReT SOG UNI Bri- ABL Main Sub Sub Sub OSD BLK D/A
15
D/A
D/A D/A
Adj OUT OUT OUT OUT EXT
INT
RGB BLK OSD
in
BLK in
in
ght
Cont Cont Cont Cont Adj
3
Item
Main/sub
Symbol
VMSC
Min. Typ. Max. Unit
(s)
in
1
2
1
2
3
4
C8H C8H C8H C8H
3.5 4.1 4.7 VP-P OUT
b
SG1
a
a
b
SG5
a
a
a
2.0 5.0
contrast control
characteristics
Main/sub contrast
control relative
characteristics
ABL control
200
200
200
200
0.8 1.0 1.2
∆VMSC
b
SG1
b
SG5
FFH FFH FFH FFH
2.0 4.0
4.2 5.0 5.8 VP-P OUT
0.8 1.0 1.2
a
a
a
a
a
ABL1
characteristics1
255
255
255
255
ABL control
relative
characteristics1
∆ABL1
ABL control
characteristics2
ABL control
relative
b
SG1
b
SG5
2.6 3.1 3.6 VP-P OUT
a
a
a
a
a
2.0 2.0
ABL2
0.8 1.0 1.2
3.3 3.7 4.1
V
∆ABL2
characteristics2
Brightness
control
b
SG5
OUT
a
a
a
a
a
a
a
a
a
a
a
4.0 5.0
VB1
characteristics1
Brightness
control relative
0
0.3
V
∆VB1
−0.3
characteristics1
Brightness
control
b
SG5
1.5 1.8 2.1
V
V
V
V
OUT
a
2.0
VB2
characteristics2
Brightness
0
0.3
OUT
a
a
a
∆VB2
VB3
−0.3
control relative
characteristics2
Brightness
b
SG5
0.7 0.9 1.1
control
characteristics3
Brightness
−0.3
−2.0
−1.0
−3.0
−1.0
0
0
0
0
0
0.3
∆VB3
FC1
control relative
characteristics3
Frequency
b
SG
Vari
able
2.5 dB OUT
a
characteristics1
(f = 50 MHz)
Frequency relative
characteristics1
(f = 50 MHz)
Frequency
1.0 dB
∆FC1
Vari
able
Vari FFH FFH FFH 00H 00H FFH FFH FFH FFH 00H
3.0 d
5.0
FC1
'
characteristics1
(f = 200 MHz)
Frequency relative
characteristics1
(f = 200 MHz)
able 255
255
255
0
0
255
255
255 255
0
a
a
a
a
∆FC1
FC2
'
Frequency
a
5 V
Vari
able
−3
5.0
characteristics2
(f = 200 MHz)
Frequency relative
characteristics2
(f = 200 MHz)
Crosstalk1
−1.0
∆FC2
(29) 2bSG3
UT (32) 6a
11a
OUT (29) 2bSG3
OUT (32) 6a
11a
Vari
able
FFH
255
a
5 V
−25 −2
−15 −10 dB
a
a
a
a
a
a
a
a
a
a
5.0
5.0
C.T.1
C.T.1'
C.T.2
C.T.2'
C.T.3
C.T.3'
(f = 50 MHz)
Crosstalk1
Vari
able
a
5 V
(f = 200 MHz)
Crosstalk2
OUT (29) 2a
OUT (35) 6bSG3
11a
Vari
able
a
5 V
−25 −20 dB
−15 −10 dB
−25 −20 dB
−15 −10 dB
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
5.0
5.0
5.0
5.0
(f = 50 MHz)
Crosstalk2
2a
6bSG3
OUT (29)
OUT (35)
Vari
able
a
5 V
(f = 200 MHz)
Crosstalk3
11a
2a
OUT (32)
OUT (35)
Vari
able
a
5 V
6a
11bSG3
2a
6a
(f = 50 MHz)
Crosstalk3
(f = 200 MHz)
OUT (32)
OUT (35)
Vari
able
a
5 V
11bSG3
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 5 of 26
M52742ASP
Electrical Characteristics (cont.)
CTL
Voltage
Limits
Test
Point
Input
BUS CTL (H)
2, 6,
11 OSD
RGB BLK OSD
1
4, 9
19
27
7
16
30
15 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0BH
D/A D/A D/A INT
Adj OUT OUT OUT OUT EXT
13 CP in ReT SOG UNI Bri- ABL Main Sub Sub Sub OSD BLK D/A
BLK
in
in
ght
Cont Cont Cont Cont Adj
Item
Symbol
Tr
Min. Typ. Max. Unit
(s)
in
b
SG1
in
1
2
3
1
2
3
4
b
SG5
Vari
able
Vari
able
Pulse
characteristics1
1.7
ns OUT
a
a
a
a
a
a
5.0
5.0
(4 VP-P
Pulse
)
b
SG1
b
SG5
Vari
able
Vari
able
2.2
ns OUT
a
a
a
a
Tf
characteristics2
(4 VP-P
)
b
SG1
b
SG5
Vari
able
Vari
able
Relative pulse
characteristics1
−0.8
−0.8
0
0
0.8 ns OUT
0.8 ns OUT
a
a
a
a
a
a
a
a
a
a
5.0
5.0
∆Tr
∆Tf
b
SG1
b
SG5
Vari
able
Vari
able
Relative pulse
characteristics2
b
SG1
b
SG5
FFH
255
1.0 1.5 2.0
0.2 0.5
V
OUT
a
a
a
a
b
a
a
a
a
a
a
a
a
a
a
a
a
a
2.0 5.0
2.0 5.0
2.0 5.0
2.0 5.0
2.0 5.0
Clamp pulse
threshold voltage
VthCP
WCP
OTr
Variable
b
SG1
b
SG5
µs OUT
a
b
Clamp pulse
minimum width
Variable
b
08H
8
3.0 6.0 ns OUT
3.0 6.0 ns OUT
a
a
OSD pulse
characteristics1
SG6 SG5
b
b
SG6 SG5
08H
8
OSD pulse
characteristics2
OTf
0FH
15
b
b
4.6 5.4 6.2 VP-P OUT
0.8 1.0 1.2
a
a
a
a
OSD adjust control
characteristics1
Oaj1
SG6 SG6 SG5
∆Oaj1
OSD adjust control
relative
characteristics1
OSD adjust control
characteristics2
b
b
b
SG6 SG6 SG5
8
2.8 3.3 3.8 VP-P OUT
0.8 1.0 1.2
a
a
a
Oaj2
OSD adjust control
relative
characteristics2
∆Oaj2
OSD BLK
characteristics
b
SG6
a
00H
0
OBLK
0
−0.1 −0.3 VP-P OUT
a
−0.2
0
0.2 VP-P
OSD relative
characteristics
∆OBLK
08H
8
2.2 2.7 3.2
2.2 2.7 3.2
1.7 2.0 2.3
0.7 1.0
0.1
V
V
OUT
a
a
a
a
a
a
a
5.0
2.0 5.0
2.0 5.0
2.0 5.0
2.0 5.0
OSD input
threshold voltage
VthOSD
VthBLK
HBLK1
HBLK2
HBLK3
00H
0
OSD BLK input
threshold voltage
0FH
15
Retrace BLK
characteristics1
7
06H
6
b
5 SG7
Retrace BLK
characteristics2
00H
0
b b
SG5 SG7
Retrace BLK
characteristics3
08H
8
Retrace BLK
input threshold
voltage
b
b
SG5 SG7
1.
a
a
a
a
a
a
a
a
a
a
a
a
2.0 5.0
2.0 5.0
2.0 5.0
VthRET
SS-NV
SS-SV
Variable
N
OUT
b
SG4
a
a
a
a
SOG input
maximum noise
voltage
Variable
SonG IN
Sync OUT
b
SG4
SOG
minimum input
voltage
0.2 0.3
VP-P
Variable
Sync OUT
Sync OUT
Sync OUT
b
SG4
Sync output
high level
4.5 4.9 5.0
V
V
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
2.0 5.0
2.0 5.0
2.0 5.0
VSH
b
SG4
Sync output
low level
0
0
0.3 0.6
60
VSL
b
SG4
Sync output
delay time1
90 ns
TDS-F
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 6 of 26
M52742ASP
Electrical Characteristics (cont.)
CTL
Voltage
Limits
Test
Point
Input
19
BUS CTL (H)
2, 6,
11
1
4, 9
27
7
16
30
15 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0BH
D/A D/A D/A INT
Adj OUT OUT OUT OUT EXT
OSD 13 CP in ReT SOG UNI Bri- ABL Main Sub Sub Sub OSD BLK D/A
RGB BLK OSD
in
BLK
in
in
ght
Cont Cont Cont Cont Adj
Item
Symbol
TDS-R
Min. Typ. Max. Unit
(s)
in
1
2
3
1
2
3
4
b
SG4
Sync output
delay time2
0
60
90 ns Sync
OUT
a
a
a
a
a
a
a
a
a
a
a
a
a
a
2.0 5.0
FFH FFH FFH FFH 00H 00H FFH FFH FFH FFH 00H
255
D/A H output
voltage
4.5 5.0 5.5 VDC D/A
OUT
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
2.0 5.0
2.0 5.0
2.0 5.0
2.0 5.0
2.0 5.0
VOH
VOL
DNL
UNI1
255 255 255 255
0
0
255 255 255
0
00H 00H 00H 00H
0
0
−1.0
7
0.5 1.0 VDC D/A
OUT
D/A L output
voltage
0
0
0
Vari Vari Vari Vari
able able able able
10
5
1.0 LSB D/A
OUT
D/A
nonlinearity
b
b
SG1
b
SG5
C8H C8H C8H C8H
200 200 200 200
FFH FFH FFH FFH
255 255 255
13
%
OUT
Uniformity
characteristics1
SG6
2.5 V
255
b
SG6
b
SG1
b
SG5
3.5
6.5
%
OUT
Uniformity
characteristics2
UNI2
1.25 V
IA
−
00H 00H 00H 00H 00H 00H 00H 00H 00H 00H 00H
0
D/A input
current range
0.18
mA D/A
OUT
a
a
a
a
a
a
a
a
a
a
a
a
a
a
2.0 5.0
2.0 5.0
0
0
0
0
0
0
0
0
0
0
D/A output
current range
D/A
OUT
1.0 mA
IA
+
Electrical Characteristics Test Method
ICC1 Circuit Current1
Measuring conditions are as listed in supplementary Table.
Measured with a current meter at test point IA.
ICC2 Circuit Current2
Measuring conditions are as listed in supplementar
Measured with a current meter at test point IB.
Vomax Output Dynamic Range
Decrease V30 gradually, and measueform output is distorted. The voltage is called VOL.
Next, increase V30 gradually, an the top of waveform output is distorted. The voltage is
called VOH.
Voltage Vomax is calcul:
Vomax = VOH − V
VOH
5.0
Waveform output
VOL
0.0
Vimax Maximum Input
Increase the input signal (SG2) amplitude gradually, starting from 700 mVP-P. Measure the amplitude of the input
signal when the output signal starts becoming distorted.
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 7 of 26
M52742ASP
GV Maximum Gain
Input SG1, and read the amplitude output at OUT (29, 32, 35). The amplitude is called VOUT (29, 32, 35). Maximum
gain GV is calculated by the equation below:
VOUT
GV = 20log
(dB)
0.7
∆GV Relative Maximum Gain
Relative maximum gain ∆GV is calculated by the equation below:
∆GV = VOUT (29) / VOUT (32),
VOUT (32) / VOUT (35),
VOUT (35) / VOUT (29)
VC1 Main Contrast Control Characteristics1
Measuring the amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35). Main contrast
control characteristics VC1 is calculated by the equation below:
VOUT
VC1 = 20log
(dB)
0.7
∆VC1 Main Contrast Control Relative Characteristics1
Relative characteristics ∆VC1 is calculated by the equation b
∆VC1 = VOUT (29) / VOUT (32),
VOUT (32) / VOUT (35),
VOUT (35) / VOUT (29)
VC2 Main Contrast Control Charac
Measuring condition and procedure n VC1.
∆VC2 Main Contrast Contics2
Measuring condition and described in ∆VC1.
VC3 Main Contrast Contrcs3
Measuring the amplitude output a29, 32, 35).
The measured value is called VOUT (29, 32, 35).
∆VC3 Main Contrast Control Relative Characteristics3
Measuring condition and procedure are the same as described in ∆VC1.
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 8 of 26
M52742ASP
VSC1 Sub Contrast Control Characteristics1
Measure the amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35). Sub contrast
control characteristics VSC1 is calculated by the equation below:
VOUT
VSC1 = 20log
(dB)
0.7
∆VSC1 Sub Contrast Control Relative Characteristics1
Relative characteristics ∆VSC1 is calculated by the equation below:
∆VSC1 = VOUT (29) / VOUT (32),
VOUT (32) / VOUT (35),
VOUT (35) / VOUT (29).
VSC2 Sub Contrast Control Characteristics2
Measuring condition and procedure are the same as described in VSC1
.
∆VSC2 Sub Contrast Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆VSC1
SC3 Sub Contrast Control Characteristics3
.
V
Measuring the amplitude output at OUT (29, 32, 35).
The measured value is called VSC3
∆VSC3 Sub Contrast Control Relative Characte
Measuring condition and procedure are the same
VMSC Main/sub Contrast Control Ch
Measure the amplitude output at OUT value is called VMSC.
∆VMSC Main/sub Contrast eristics
Relative characteristics ∆Vuation below:
∆VMSC = VOU
VOUT (
VOUT (35) / 29)
ABL1 ABL Control Characteristics1
Measure the amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35), and is treated as
ABL1.
∆ABL1 ABL Control Relative Characteristics1
Relative characteristics ∆ABL1 is calculated by the equation below:
∆ABL1 = VOUT (29) / VOUT (32) ,
VOUT (32) / VOUT (35) ,
VOUT (35) / VOUT (29)
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Page 9 of 26
M52742ASP
ABL2 ABL Control Characteristics2
Measuring condition and procedure are the same as described in ABL1.
∆ABL2 ABL Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆ABL1.
VB1 Brightness Control Characteristics1
Measure the DC voltage at OUT (29, 32, 35) with a voltmeter. The measured value is called VOUT (29, 32, 35), and is
treated as VB1.
∆VB1 Brightness Control Relative Characteristics1
Relative characteristics ∆VB1 is calculated by the difference in the output between the channels.
∆VB1 = VOUT (29) − VOUT (32),
VOUT (32) − VOUT (35),
VOUT (35) − VOUT (29)
VB2 Brightness Control Characteristics2
Measuring condition and procedure are the same as described in VB1.
∆VB2 Brightness Control Relative Characteristics2
Measuring condition and procedure are the same as describe
VB3 Brightness Control Characteristics3
Measuring condition and procedure are the same a
∆VB3 Brightness Control Relative Cha
Measuring condition and procedure are B1.
F
C1 Frequency Characteristic
First, SG3 to 1 MHz is as inpat is about 2 kΩ to offer the voltage at input pins (2, 6, 11) in
order that the bottom of inthe main contrast in order that the amplitude of sine wave output
is 4.0 VP-P. Control the bottom of sine wave output is 2.0 VP-P. By the same way, measure
the output amplitude when input signal. The measured value is called VOUT (29, 32, 35).
Frequency characteristics FC1 (alculated by the equation below:
VOUT VP-P
FC1 = 20log
(dB)
Output amplitude when inputted SG3 (1 MHz): 4 VP-P
∆FC1 Frequency Relative Characteristics1 (f = 50 MHz)
Relative characteristics ∆FC1 is calculated by the difference in the output between the channels.
FC1' Frequency Characteristics1 (f = 200 MHz)
Measuring condition and procedure are the same as described in table, expect SG3 to 200 MHz.
∆FC1' Frequency Relative Characteristics1 (f = 200 MHz)
Relative characteristics ∆FC1' is calculated by the difference in the output between the channels.
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 10 of 26
M52742ASP
FC2 Frequency Characteristics2 (f = 200 MHz)
SG3 to 1 MHz is as input signal. Control the main contrast in order that the amplitude of sine wave output is 1.0 VP-P
.
By the same way, measure the output amplitude when SG3 to 200 MHz is as input signal.
The measured value is called VOUT (29, 32, 35). Frequency characteristics FC2 (29, 32, 35) is calculated by the
equation below:
VOUT VP-P
FC2 = 20log
(dB)
Output amplitude when inputted SG3 (1 MHz): 4 VP-P
∆FC2 Frequency Relative Characteristics2 (f = 200 MHz)
Relative characteristics ∆FC2 is calculated by the difference in the output between the channels.
C.T.1 Crosstalk1 (f = 50 MHz)
Input SG3 (50 MHz) to pin 2 only, and then measure the waveform amplitude output at OUT (29, 32, 35). The
measured value is called VOUT (29, 32, 35). Crosstalk C.T.1 is calculated by the equation below:
VOUT (29, 32)
C.T.1 = 20log
(dB)
VOUT (35)
C.T.1' Crosstalk1 (f = 200 MHz)
Measuring condition and procedure are the same as described in C.T.z.
C.T.2 Crosstalk2 (f = 50 MHz)
Input SG3 (50 MHz) to pin 6 only, and then measure the wt OUT (29, 32, 35). The
measured value is called VOUT (29, 32, 35). Crosstalk quation below:
VOUT (29, 32)
C.T.2 = 20log
(dB)
VOUT (35)
C.T.2' Crosstalk2 (f = 200 MHz)
Measuring condition and procedure aC.T.2, expect SG3 to 200 MHz.
C.T.3 Crosstalk3 (f = 50 MH
Input SG3 (50 MHz) to pin the waveform amplitude output at OUT (29, 32, 35). The
measured value is called talk C.T.3 is calculated by the equation below:
VOU
C.T.3 = 20log
VOUT
C.T.3' Crosstalk3 (f = 200 MHz)
Measuring condition and procedure are the same as described in C.T.3, expect SG3 to 200 MHz.
Tr Pulse Characteristics1 (4 VP-P
)
Control the main contrast (00H) in order that the amplitude of output signal is 4.0 VP-P
.
Control the brightness (V30) in order that the Black level of output signal is 2.0 V.
Measure the time needed for the input pulse to rise from 10% to 90% (Tr1) and for the output pulse to rise from 10% to
90% (Tr2) with an active probe.
Pulse characteristics Tr is calculated by the equations below:
Tr = [ (Tr2)2 − (Tr1)2 ]
√
∆Tr Relative Pulse Characteristics1
Relative characteristics ∆Tr is calculated by the difference in the output between the channels.
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Page 11 of 26
M52742ASP
Tf Pulse Characteristics2 (4 VP-P
)
Measure the time needed for the input pulse to fall from 90% to 10% (Tf1) and for the output pulse to fall from 90% to
10% (Tf2) with an active probe.
Pulse characteristics Tf is calculated by the equations below:
Tf = [ (Tf2)2 − (Tf1)2 ]
√
∆Tf Relative Pulse Characteristics2
Relative characteristics ∆Tf is calculated by the difference in the output between the channels.
100%
90%
10%
Tf1 or Tf2
0%
Tr1 or Tr2
VthCP Clamp Pulse Threshold Voltage
Turn down the SG5 input level gradually from 5.0 VP-P, monitori
Measure the top level of input SG5 at when the output pedeswn or unstable.
WCP Clamp Pulse Minimum Width
Decrease the SG5 pulse width gradually from 0.5 Measure the input SG5 pulse width (at the
point of 1.5 V) at when output pedestal level is ble.
OTr OSD Pulse Characteristics1
Measure the time needed for the outp90% (OTr) with an active probe.
OTf OSD Pulse Characteri
Measure the time needed fom 90% to 10% (OTf) with an active probe.
Oaj1 OSD Adjust Contr1
Measure the amplitude output a32, 35). The measured value is called VOUT (29, 32, 35), and is treated as
Oaj1.
∆Oaj1 OSD Adjust Control Relative Characteristics1
Relative characteristics ∆Oaj1 is calculated by the equation below:
∆Oaj1 = VOUT (29) / VOUT (32),
VOUT (32) / VOUT (35),
VOUT (35) / VOUT (29)
Oaj2 OSD Adjust Control Characteristics2
Measuring condition and procedure are the same as described in Oaj1.
∆Oaj2 OSD Adjust Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆Oaj1.
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M52742ASP
OBLK OSD BLK Characteristics
Output voltage-Black level voltage of "High" section of SG6 is calculated. The calculated value is called VOUT (29,
32, 35), and is treated as OBLK.
∆OBLK OSD Relative Characteristics
Relative characteristics ∆OBLK is calculated by the equation below:
∆OBLK = VOUT (29) - VOUT (32),
VOUT (32) - VOUT (35),
VOUT (35) - VOUT (29)
VthOSD OSD Input Threshold Voltage
Reduce the SG6 input level gradually, monitoring output. Measure the SG6 level when the output reaches 0 V. The
measured value is called VthOSD.
VthBLK OSD BLK Input Threshold Voltage
Confirm that output signal is being blanked by the SG6 at the time.
Monitoring to output signal, decreasing the level of SG6. Measure the top hen the blanking period is
disappeared. The measured value is called VthBLK.
HBLK1 Retrace BLK Characteristics1
Measure the amplitude output is blanked by the SG7 at OUT value is called VOUT (29, 32,
35), and is treated as HBLK1.
HBLK2 Retrace BLK Characteristics2
Measure the amplitude output is blanked by the The measured value is called VOUT (29, 32,
35), and is treated as HBLK2.
HBLK3 Retrace BLK Characterist
Measure the amplitude output is bl29, 32, 35). The measured value is called VOUT (29, 32,
35), and is treated as HBLK3.
VthRET Retrace BLK
Confirm that output signal e SG7 at the time.
Monitoring to output signal, deevel of SG7. Measure the top level of SG7 when the blanking period is
disappeared. The measured value d VthRET.
SS-NV SOG Input Maximum Noise Voltage
The sync's amplitude of SG4 be changed all white into all black, increase from 0 VP-P to 0.02 VP-P. No pulse output
permitted.
SS-SV SOG Minimum Input Voltage
The sync's amplitude of SG4 be changed all white or all black, decrease from 0.3 VP-P to 0.2 VP-P. Confirm no
malfunction produced by noise.
VSH Sync Output High Level
Measure the high voltage at SyncOUT. The measured value is treated as VSH.
VSL Sync Output Low Level
Measure the low voltage at SyncOUT. The measured value is treated as VSL.
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M52742ASP
TDS-F Sync Output Delay Time1
SyncOUT becomes High with sync part of SG4.
Measure the time needed for the front edge of SG4 sync to fall from 50% and for SyncOUT to rise from 50% with an
active probe. The measured value is treated as TDS-F, less than 90 ns.
TDS-R Sync Output Delay Time2
Measure the time needed for the rear edge of SG4 sync to rise from 50% and for SyncOUT to fall from 50% with an
active probe. The measured value is treated as TDS-R, less than 90 ns.
SG4
Pedestal voltage
sync (50%)
TDS-F
(50%)
SyncOUT
TDS-R
VOH D/A H Output Voltage
Measure the DC voltage at D/A OUT. The measured value is treated a
VOL D/A L Output Voltage
Measure the DC voltage at D/A OUT. The measured value
IAO D/A Output Current Range
Electric current flow from the output of D/A OUT IA+.
Electric current flow into the output of D/A OmA: IA−.
A
1 VDC
DNL D/A Nonlinearity
The difference of differential non-linearity of D/A OUT must be less than ±1.0 LSB.
UNI1 Uniformity Characteristics1, UNI2 Uniformity characteristics2
VuniA is amplitude output at OUT (29, 32, 35), when SG6 is low voltage. VuniB is amplitude output at OUT (29, 32,
35), when SG6 is high voltage.
Modulation ratio UNI (UNI2) is calculated by the equation below;
UNI1 (UNI2) = 100 • (VuniB / VuniA − 1) (%)
VuniB
VuniA
OUT
Pedestal
voltage
SG6
5 VP-P (2.5 VP-P
)
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M52742ASP
I2C BUS Protocol
(1) Slave address
D7
D6
D5
D4
D3
D2
D1
R/W
1
0
0
0
1
0
0
0
= 88H
(2) Slave receiver format
S
Slave address
A
Sub address
A
Data byte
A
P
↑
↑
↑
Start condition
Acknowledge
Stop condition
(3) Sub address byte and data byte format
Sub
Data Byte (Top: Byte Format, Under: Start Condition)
Add.
Function
Main contrast
Bit
D7
A07
0
D6
A06
1
D5
A05
0
D4
A04
0
D3
A03
0
D2
A02
0
D1
A01
0
D0
A00
0
8
00H
Sub contrast R
Sub contrast G
Sub contrast B
OSD level
8
8
8
4
4
8
8
01H
02H
03H
04H
05H
06H
A17
1
A16
0
A15
0
A14
A13
0
A12
0
A11
0
A10
0
A27
1
A26
0
A25
0
23
A22
0
A21
0
A20
0
A37
1
A36
0
A32
0
A31
0
A30
0
0
1
A42
0
A41
0
A40
0
RE-BLK adjust
D/A OUT1
A53
1
A52
0
A51
0
A50
0
A64
0
A63
0
A62
0
A61
0
A60
0
D/A OUT2
75
0
A74
0
A73
0
A72
0
A71
0
A70
0
D/A OUT3
0
A85
0
A84
0
A83
0
A82
0
A81
0
A80
0
D/A OUT4
A96
0
A95
0
A94
0
A93
0
A92
0
A91
0
A90
0
Pedestal clamp INT/EXT
0
0
0
0
AB0
0
0
0
0
Note: Pedestal level INT/EXT
0 → INT 1 → EXT
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 15 of 26
M52742ASP
Timing Requirement of I2C
Item
Symbol
VIL
Min.
−0.5
3.0
0
Max.
1.5
5.5
100
Unit
V
Input voltage LOW
Input voltage HIGH
VIH
V
SCL clock frequency
fSCL
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
Time the bus must be free before a new transmission can start
Hold time start condition. After this period the first clock pulse is generated
The LOW period of the clock
tBUF
4.7
4.0
4.7
4.0
4.7
0
tHD:STA
tLOW
The HIGH period of the clock
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tr
Set up time for start condition (Only relevant for a repeated start condition)
Hold time for I2C devices
Set-up time DATA
250
Rise time of both SDA and SCL
1000
300
Fall time of both SDA and SCL
tf
Set-up time for stop condition
tSU:STO
4.0
Timing Chart
tBUF
tr, tf
VIH
SDA
VIL
tSU: STO
tHD: STA
tSU: DAT
t
VIH
VIL
SCL
tL
S
S
P
S
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 16 of 26
M52742ASP
Input Signal
SG No.
Signals
Pulse with amplitude of 0.7 VP-P (f = 30 kHz). Video width of 25 µs. (75%)
33 µs
SG1
Video signal
(all white)
8 µs
0.7 VP-P
SG2
Video signal
(step wave)
0.7 VP-P
(Amplitude is variable.)
SG3
Sine wave
(for freq. char.)
ine wave amplitude of 0.7 VP-P.
1 MHz, 50 MHz, 200 MHz (variable)
Video width of 25 µs. (75%)
all white or all black
variable.
SG4
Video signal
(all white,
all black)
Sync's amplitude
is variable.
0.3 VP-P
3 µs
Pulse width and amplitude are v
SG5
Clamp
pulse
5 VTTL
SG6
OSD pulse
Amplitude is variable.
5 VTTL
5 µs
SG7
BLK pulse
5 VTTL
5 µs
Amplitude is variable.
Note: f = 30 kHz
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 17 of 26
M52742ASP
Test Circuit
D/A D/A D/A D/A
OUT1 OUT2 OUT3 OUT4
SG7
a
SG5
SDA SCL
OUT (35)
OUT (32)
OUT (29)
C/P IN
V30
0 to 5 V
100
b
b
a
470
470
470
34
SW27
SW19
100 µH
36
35
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
12 V out f/b gnd out f/b
brt out f/b
blk dac dac dac dac gnd sda scl c/p
M52742ASP
blk
1
R
2
12 V osd gnd
G
6
SonG 12 V osd gnd
10
B
12 V osd gnd abl UNI 5 V sync
12 13 14 15 16 17 18
47 µ
3
4
5
7
8
9
11
+
S
ONG
IN
IN (2)
IN (6)
IN (11)
SYNC
OUT
3.3 µ 0.01 µ
3.3 µ 0.01 µ
3.3 µ 0.0
+
+
+
+
1 µ
1 k
SW16
b
SW1 SW2
SW4
a
SW6 SW7
SW9
a
a
ba
b
b
a
ba
b
a
b
A
IB
5 V
IA
SG6
+
A
SG6
47 µ
SG1
SG2
SG3
12 V
point
0.01 µF (unless otherwise specified.)
Units Resistance: Ω
Capacitance: F
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 18 of 26
M52742ASP
Typical Characteristics
Main Contrast Control Characteristics
Thermal Derating
2800
6
2403
2400
5
4
2000
1600
1200
800
1442
3
2
1
400
0
Sub contrast: Max
0
00H
FFH
−20
0
25 50 75 100 125 150
Ambient Temperature Ta (°C)
Main Contrast Control Data
Sub Contrast Control Characteristics
rol Characteristics
6
5
4
2
1
0
3
2
1
0
Mai
00H
0
1
2
3
4
Sub
ABL Cha
Brightness Control Voltage (VDC)
OSD Adjust Control Characteristics
6
5
4
3
2
1
0
6
5
4
3
2
1
Main contrast: Max
Sub contrast: Max
0
0
1
2
3
4
5
0H
FH
ABL Control Voltage (VDC
)
OSD Adjust Control Data
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 19 of 26
M52742ASP
Sync on Green input Min. Pulse Width
12
(Video duty = 75%)
Uniformity Characteristics
12
10
8
7
10
1 µ
+
8
100 k
IN
6
4
6
4
2
0
2
0
Sync separate
normal operating range
0
0.1
0.2
0.3
0.4
0.5
0
0.5
1.0
1.5
2.0
2.5
Input Sync Amplitude (VP-P
)
Input Amplitude (VP-P
)
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 20 of 26
M52742ASP
Application Example
110 V
CRT
Cut off Adj
DAC
5 V
TTL
BLK IN
(for retrace)
SDA
470
0 to 5 V
0.01 µ
3
470
470
SCL
Clamp pulse
IN
100
1 µ 0.01 µ
24 23 22
100 µH
36
35
34
33
32
31
21
20
19
P
1
2
3
9
10
11
12
13
14
15
16
17
18
0.01 µ
0.01 µ
+
33 µ
ABL IN
0 to 5 V
Sync
Sep
OUT
+
3.3
47 µ
3.3 µ
47 µ
1 k
2.2 µ
3.3 µ 0.01 µ
1 µ
0.01 µ
+
+
5 V
TTL
75
75
75
Uniformity IN
5 V
TTL
5 V
TTL
OSD IN (B)
OSD IN (G)
OSD IN (R)
BLK IN
5 V
TTL
(for OSD)
+
0.01 µ
47 µ
+
Units Resistance: Ω
Capacitance: F
12 V 5 V
*
INPUT
(R)
INPUT
(G)
S
ON
G
INPUT
INPUT
(B)
* Circuit example of pin 6 and pin 7 same signal input
note: Feed back is internal feed back
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 21 of 26
M52742ASP
Pin Description
Pin No.
Name
DC Voltage (V)
Peripheral Circuit
Function
Input pulses
1
OSD BLK IN
•
•
R
G
3.7 to 5 V
GND to 1.7 V
1
B
2 k
Connected to GND if not
used.
2.7 V
0.37 mA 0.37 mA
2
6
INPUT (R)
INPUT (G)
INPUT (B)
2.5
•
•
Clamped to about 2.5 V
due to clamp pulses
from pin 19.
2 k
2 k
11
Input at low impedance.
C
0.3 mA
3
8
VCC1 (R)
12
•
Apply equivalent voltage
to 3 channels
VCC1 (G)
12
4
VCC1 (B)
OSD IN (R)
OSD IN (G)
OSD IN (B)
Input pulses
9
3.7 to 5 V
13
GND to 1.7 V
•
Connected to GND if not
used.
2.7 V
5
GND 1 (R)
GND 1 (G)
GND 1 (B)
GND (5 V)
GND 2
10
14
22
33
7
INPUT
When o
•
SYNC ON GREEN
Input pin for sync
separation.
(S on G)
Sync is negative.
7
3.33 V
Input signal at pin 7,
compare with the
reference voltage of
internal circuit in order to
separate sync signal.
500
0.22 mA
0.15 mA
0.22 mA
•
When not used, set to
OPEN.
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 22 of 26
M52742ASP
Pin Description (cont.)
Pin No.
Name
ABL IN
DC Voltage (V)
Peripheral Circuit
Function
15
When open 2.5 V
•
ABL (Automatic Beam Limiter)
input pin. Recommended
voltage range is 0 to 5 V.
When ABL function is not
used, set to 5 V.
2.5 V
20 k
1.2 k
1.2 k
30 k
0.5 mA
15
16
Uniformity IN
5.75
•
Uniformity input pin.
Recommended amplitude
range is 0 to 5 VP-P
.
200
20 k
7.25 V
5 k
16
17
18
VCC (5 V)
5
S on G Sep
OUT
gnal output pin, Being
pen collector output type.
19
Clamp Pulse
IN
•
•
Input pulses
2.5 to 5 V
GND to 0.5 V
Input at low impedance.
2.2 V
0.15 mA
SCL of I2C BUS
(Serial clock line)
VTH = 2.3 V
20
SCL
•
50 k
20
2 k
3 V
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 23 of 26
M52742ASP
Pin Description (cont.)
Pin No.
Name
SDA
DC Voltage (V)
Peripheral Circuit
Function
SDA of I2C BUS
(Serial data line)
TH = 2.3 V
21
•
50 k
V
21
2 k
3 V
23
24
25
26
D/A OUT
•
D/A output pin.
Output voltage range is 0 to 5
V, min input current is 0.18 mA
when D/A output pin is 1 V.
Max output current is 1.0 mA.
27
Retrace BLK
IN
Input pulses
50 k
2.5 to 5 V
GND to 0.5 V
27
nected to GND if not used.
28
31
34
EXT Feed
Back (B)
EXT Feed
Back (G)
EXT Feed
Back (R)
Variable
29
32
35
OUTPUT (B)
OUTPUT (G)
OUTPUT (R)
•
A resistor is needed on the
GND side.
36
50
50
Set discretionally to maximum
15 mA, depending on the
required driving capacity.
36
30
VCC2
12
•
•
Used to supply power to output
emitter follower only.
Main
Brightness
It is recommended that the IC
be used between pedestal
voltage 2 V and 3 V.
35 k
30
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 24 of 26
M52742ASP
Application Method for M52742ASP
Clamp Pulse Input
Clamp pulse width is recommended
above 15 kHz, 1.0 µs
above 30 kHz, 0.5 µs
above 64 kHz, 0.3 µs.
The clamp pulse circuit in ordinary set is a long round about way, and beside high voltage, sometimes connected to
external terminal, it is very easy affected by large surge.
Therefore, the figure shown right is recommended.
19
EXT-Feed Back
In case of application circuit example of lower figure, Set up R1, Rk level of the signal feed
backed from Power AMP is 1 V, when the bottom of output sig
Main brig
DC: 1 t
Power Amp Out
Pre Amp
Input R
eed back
lack level 1 to 5 V
R1
R2
EXT-Feed Back Application Circuit
Notice of Application
•
•
Make the nearest distance between output pin and pull down resistor.
Recommended pedestal voltage of IC output signal is 2 V.
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 25 of 26
M52742ASP
Package Dimensions
36P4E
Plastic 36pin 500mil SDIP
EIAJ Package Code
SDIP36-P-500-1.78
JEDEC Code
—
Weight(g)
3.0
Lead Material
Cu Alloy
36
19
1
18
Dimension in Millimeters
Symbol
A
Min
—
Nom
—
—
Max
5.08
—
D
A
1
0.51
—
3.8
0.5
—
0.6
0.4
0.9
1.0
1.3
0.65
0.22
31.3
10.85
—
0.75
0.27
31.5
11.0
1.778
12.7
—
1.05
0.34
31.7
11.15
—
D
E
e
e
b
1
e1
—
3.0
—
—
SEATING PLANE
L
0°
—
15°
REJ03F0192-0201 Rev.2.01 Mar 31, 2008
Page 26 of 26
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Notes:
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warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property
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but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples.
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destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws
and regulations, and procedures required by such laws and regulations.
4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this
document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document,
please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be
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result of errors or omissions in the information included in this document.
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or otherwise in systems the failure or malfunction of which may cause a direct threat to human life or create a risk uman injury or which require especially high quality
and reliability such as safety systems, or equipment or systems for transportation and traffic, healthcare, combntrol, aerospace and aeronautics, nuclear power, or
undersea communication transmission. If you are considering the use of our products for such purposes, pleRenesas sales office beforehand. Renesas shall
have no liability for damages arising out of the uses set forth above.
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(1) artificial life support devices or systems
(2) surgical implantations
(3) healthcare intervention (e.g., excision, administration of medication, etc.)
(4) any other purposes that pose a direct threat to human life
Renesas shall have no liability for damages arising out of the uses set forth in the above and cts in any of the foregoing
applications shall indemnify and hold harmless Renesas Technology Corp., its affiliated coployees against any and all
damages arising out of such applications.
9. You should use the products described herein within the range specified by Renesas, g, operating supply voltage range,
movement power voltage range, heat radiation characteristics, installation and other no liability for malfunctions or damages
arising out of the use of Renesas products beyond such specified ranges.
10. Although Renesas endeavors to improve the quality and reliability of its productuch as the occurrence of failure at a certain
rate and malfunctions under certain use conditions. Please be sure to implemssibility of physical injury, and injury or damage
caused by fire in the event of the failure of a Renesas product, such as safeg but not limited to redundancy, fire control and
malfunction prevention, appropriate treatment for aging degradation or an, since the evaluation of microcomputer software
alone is very difficult, please evaluate the safety of the final products or
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Renesas shall have no liability for damages arising out of such d
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any other inquiries.
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http://www.renesas.com
Refer to "http://www.renesas.coiled information.
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