M52743BSP [RENESAS]
I2C BUS Controlled 3-Channel Video Preamplifier; I2C总线控制3路视频前置放大器
| 型号： | M52743BSP |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | I2C BUS Controlled 3-Channel Video Preamplifier |
| 文件： | 总26页 (文件大小：322K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M52743BSP
I2C BUS Controlled 3-Channel Video Preamplifier
REJ03F0193-0201
Rev.2.01
Mar 31, 2008
Description
M52743BSP is semiconductor integrated circuit for CRT display monitor.
It includes OSD blanking, OSD mixing, retrace blanking, wide band amplifier, brightness control.
Main/sub contrast and OSD adjust function can be controlled by I2C BUS.
Features
•
Frequency band width: RGB
OSD
150 MHz (at −3 dB)
80 MHz
Input: RGB
OSD
BLK (for OSD)
Retrace BLK
Output: RGB
OSD
0.7 VP-P (typ.)
3 VP-P min. (positive)
3 VP-P min. (positive)
3 VP-P min. (positive)
5.5 VP-P (max.)
5 VP-P (max.)
•
•
Main contrast and sub contrast can be controlled by I2C
Include internal and external pedestal clamp circuit.
Application
CRT display monitor
Recommended Operating C
Supply voltage range:
11.5 to
4.
6)
5
Rated supply voltage:
Major Specification
BUS controlled 3ch video pre-amp with OSD mixing function and retrace blanking function
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 1 of 25
M52743BSP
Block Diagram
MAIN
BRIGHTNESS
RETRACE
BLK IN
30
27
OSD IN (R)
4
Sub
contrast
Main
contrast
Retrace
blanking
2
3
5
9
Amp
INPUT (R)
VCC1 (R) 12 V
GND1 (R)
Clamp
Clamp
Clamp
OSD Mix
OUTPUT (R)
35
Sub Cont
(8 bit)
Clamp
F/B
34 EXT
FEED BACK (R)
OSD IN (G)
INPUT (G)
Main
contrast
Sub
contrast
Retrace
blanking
6
8
Amp
32
31
OSD Mix
OUTPUT (G)
VCC1 (G) 12 V
Sub Cont
(8 bit)
EXT
FEED BACK (G)
Clamp
F/B
GND1 (G) 10
OSD IN (B)
INPUT (B)
13
11
Main
contrast
Sub
contrast
Retrace
anking
OSD Mix
29 OUTPUT (B)
VCC1 (B) 12 V
GND1 (B)
12
14
15
Sub Cont
(8 bit)
EXT
FEED BACK (B)
28
Main
contrast
8 bit
CONTRAST
(ABL) IN
VCC 5 V
(DIGITAL)
SDA
17
21
20
22
Sync on
Green Sep
BUS
I/F
INPUT (SOG)
7
AC
SCL
SOG SEP OUT 18
GND (5V)
19
23 24 25 26
DAC OUTPUT
FOR CUT-OFF Adj
CLAMP
PULSE
IN
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 2 of 25
M52743BSP
Pin Arrangement
M52743BSP
OSD BLK IN
INPUT (R)
VCC1 (R)
1
2
3
4
5
6
7
8
9
36 VCC2
35 OUTPUT (R)
34 EXT FEED BACK (R)
33 GND2
OSD IN (R)
GND1 (R)
32 OUTPUT (G)
31 EXT FEED BACK (G)
30 MAIN BRIGHTNESS
29 OUTPUT (B)
28 EXT FEED BACK (B)
27 RETRACE BLK IN
26 D/A OUT1
INPUT (G)
INPUT (SOG)
VCC1 (G)
OSD IN (G)
GND1 (G) 10
INPUT (B) 11
VCC1 (B) 12
25 D/A OUT2
OSD IN (B) 13
GND1 (B) 14
ABL IN 15
24 D/A OUT3
23 D/A OUT4
22 GND (5
NC 16
21 SDA
VCC (5 V) 17
SOG SEP OUT 18
20 S
1
(Top vie
Out
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 3 of 25
M52743BSP
Absolute Maximum Ratings
(Ta = 25°C)
Item
Supply voltage
Symbol
Ratings
13.0
Unit
V
VCC
Pd
Power dissipation
Ambient temperature
Storage temperature
Recommended supply
Voltage range
2403
mW
°C
Topr
Tstg
Vopr
Vopr
θjc
−20 to +75
−40 to +150
12.0
°C
V
10.5 to 12.5
22
V
Case temperature
°C/W
Electrical Characteristics
(VCC = 12 V, 5 V, Ta = 25°C, unless otherwise noted)
CTL
Voltage
Limits
Input
BUS CTL (H)
2H 03H 04H 05H 06H 07H 08H 09H 0BH
Test
Point
Min. Typ. Max. Unit (s)
2, 6,
1
OSD
4, 9
13
19
27
7
30
CP in ReT SOG Bri- AB
15
11
RGB
in
Sub OSD BLK
Cont Adj Adj
D/A D/A
D/A
OUT OUT OUT OUT EXT
D/A
INT
BLK OSD
in
BLK
in
ght
Item
Circuit
current1
Symbol
ICC1
3
1
2
3
4
00H 00H FFH FFH FFH FFH 00H
110 130 mA
IA
IB
a
a
a
a
a
a
b
SG5
a
a
0
255
255
255
255
0
Circuit
current2
18
22
mA
b
SG5
a
ICC2
Output
dynamic range
6.0 8.0
VP-P OUT
b
SG2
b
SG2
Variable
a
a
b
S
Vomax
Vimax
Gv
Maximum
input
1.6
VP-P IN
OUT
a
a
55
Maximum
gain
16.5 17.7 19.7 dB OUT
b
SG1
Relative max-
imum gain
0.8 1.0 1.2
∆Gv
VC1
Main contrast
control
C8H
200
14.5 16.0 17.5 dB O
2.0 5.0
characteristics1
Main contrast
control relative
characteristics1
0.8 1.0 1.2
∆VC1
Main contrast
control
characteristics2
64H
100
8.5 10.
a
a
b
SG5
a
a
a
a
2.0 5.0
VC2
Main contrast
control relative
characteristics2
Main contrast
control
0
∆VC2
VC3
14H
20
0.2 0.
b
SG1
b
SG5
2.0 5.0
characteristics3
Main contrast
control relative
characteristics3
Sub contrast
control
0.8 1.0 1.2
∆VC3
FFH C8H C8H C8H
14.8 16.3 17.8 dB OUT
b
SG1
a
a
a
a
b
SG5
a
a
a
a
2.0 5.0
VSC1
255 200
200 200
characteristics1
Sub contrast
control relative
characteristics1
Sub contrast
control
0.8 1.0 1.2
∆VSC1
FFH 64H 64H 64H
255 100 100 100
11.1 12.6 14.1 dB OUT
b
SG1
b
SG5
2.0 5.0
VSC2
characteristics2
Sub contrast
control relative
characteristics2
Sub contrast
control
0.8 1.0 1.2
a
a
a
a
∆VSC2
FFH 14H 14H 14H
1.4 1.7 2.0 VP-P OUT
b
SG1
b
SG5
2.0 5.0
VSC3
255
20
20
20
characteristics3
Sub contrast
control relative
characteristics3
0.8 1.0 1.2
∆VSC3
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 4 of 25
M52743BSP
Electrical Characteristics (cont.)
CTL
Voltage
Limits
Test
Point
Input
4, 9
BUS CTL (H)
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0BH
2, 6,
11
1
OSD
19
27
7
30
13 CP in ReT SOG Bri- ABL Main Sub Sub Sub OSD BLK D/A
15
D/A
D/A D/A
Adj OUT OUT OUT OUT EXT
INT
RGB
in
BLK OSD
in
BLK
in
ght
Cont Cont Cont Cont Adj
1
Item
Symbol
VMSC
Min. Typ. Max. Unit
(s)
2
3
1
2
3
4
Main/sub
C8H C8H C8H C8H 00H 00H FFH FFH FFH FFH 00H
3.2 3.8 4.4 VP-P OUT
b
SG1
a
a
b
SG5
a
a
2.0 5.0
contrast control
characteristics2
Main/sub contrast
control relative
characteristics2
ABL control
200
200
200
200
0
0
255 255
255 255
0
0.8 1.0 1.2
∆VMSC
FFH FFH FFH FFH
3.8 4.6 5.4 VP-P OUT
b
SG1
a
a
b
SG5
a
a
2.0 4.0
ABL1
255
255
255
255
characteristics1
ABL control
relative
characteristics1
0.8 1.0 1.2
∆ABL1
ABL control
characteristics2
ABL control
relative
2.2 2.7 3.2 VP-P OUT
b
a
a
b
a
a
2.0 2.0
ABL2
SG1
SG5
0.8 1.0 1.2
3.3 3.7 4.1
V
OUT
∆ABL2
characteristics2
Brightness
control
a
a
a
a
a
a
b
SG5
a
a
a
a
4.0 5.0
VB1
characteristics1
Brightness
−0.3
0
0.3
V
∆VB1
VB2
control relative
characteristics1
Brightness
1.5 1.8 2.1
OUT
b
SG5
2.0
control
characteristics2
Brightness
−0.3
0
0.3
V
a
a
a
∆VB2
VB3
control relative
characteristics2
Brightness
0.7 0.9 1.1
OUT
b
S
control
characteristics3
Brightness
−0.3
−2.0
−1.0
−3.0
−1.0
0
0
0
0
0
0.3
∆VB3
FC1
control relative
characteristics3
Frequency
ari
able
2.5 dB OUT
b
S
characteristics1
(f = 50 MHz)
Frequency relative
characteristics1
(f = 50 MHz)
Frequency
1.0 dB
a
∆FC1
Vari
able
Vari FFH FFH FFH 00H 00H FFH FFH FFH FFH 00H
3.0 d
5.0
FC1
'
able 255
255
255
0
0
255
255
255 255
0
characteristics1
(f = 150 MHz)
Frequency relative
characteristics1
(f = 150 MHz)
∆FC1
FC2
'
Frequency
characteristics2
(f = 150 MHz)
Vari
able
−3
a
a
5 V
a
a
5.0
Frequency relative
characteristics2
(f = 150 MHz)
Crosstalk1
−1.0
∆FC2
T (29) 2bSG3
UT (32) 6a
11a
OUT (29) 2bSG3
OUT (32) 6a
11a
FFH
255
Vari
able
Vari
able
−25 −2
−15 −10 dB
a
a
a
a
a
a
a
a
a
5.0
5.0
C.T.1
C.T.1'
C.T.2
C.T.2'
C.T.3
C.T.3'
(f = 50 MHz)
Crosstalk1
5 V
a
5 V
(f = 150 MHz)
Crosstalk2
OUT (29) 2a
OUT (35) 6bSG3
11a
OUT (29) 2a
OUT (35) 6bSG3
11a
OUT (32) 2a
OUT (35) 6a
11bSG3
OUT (32) 2a
OUT (35) 6a
11bSG3
Vari
able
Vari
able
Vari
able
−25 −20 dB
−15 −10 dB
−25 −20 dB
−15 −10 dB
a
a
a
a
a
a
a
a
a
5 V
a
a
a
a
a
a
a
a
a
5.0
5.0
5.0
5.0
(f = 50 MHz)
Crosstalk2
5 V
a
(f = 150 MHz)
Crosstalk3
(f = 50 MHz)
Crosstalk3
(f = 150 MHz)
5 V
a
Vari
able
5 V
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 5 of 25
M52743BSP
Electrical Characteristics (cont.)
CTL
Voltage
Limits
Test
Point
Input
BUS CTL (H)
2, 6,
11
1
4, 9
13
19
27
7
30
15 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0BH
D/A INT
Adj OUT OUT OUT OUT EXT
OSD
BLK
CP in ReT
BLK
SOG Bri- ABL Main Sub Sub Sub OSD BLK D/A D/A D/A
RGB
in
OSD
in
in
ght
Cont Cont Cont Cont Adj
Item
Symbol
Tr
Min. Typ. Max. Unit
(s)
1
2
3
1
2
3
4
Pulse
characteristics1
b
SG1
b
a
SG5
Vari
able
Vari FFH FFH FFH 00H 00H FFH FFH FFH FFH 00H
1.7
ns OUT
ns OUT
a
a
a
a
5.0
5.0
able 255 255 255
0
0
255 255 255
255
0
(4 VP-P
Pulse
)
Vari
able
Vari
able
3.0
b
SG1
a
b
SG5
a
a
Tf
characteristics2
(4 VP-P
)
FFH
255
b
SG5
1.0 1.5 2.0
V
OUT
b
SG1
a
a
a
a
a
a
a
a
a
a
a
a
2.0 5.0
2.0 5.0
2.0 5.0
Clamp pulse
threshold voltage
VthCP
WCP
PDCH
Variable
b
SG5
0.2 0.5
µs OUT
b
SG1
Clamp pulse
minimum width
Pedestal voltage
temperature
Variable
b
SG5
−3.0
−3.0
0
0
0.3
V
V
OUT
OUT
b
SG1
characteristics1
Pedestal voltage
temperature
0.3
b
SG1
a
a
b
SG5
a
a
2.0 5.0
PDCL
characteristics2
08H
8
OTr
OTf
OSD pulse
characteristics1
3.0 6.0 ns OUT
3.0 6.0 ns OUT
a
a
a
a
b
b
b
SG6 SG5
a
a
a
a
2.0 5.0
2.0 5.0
2.0
08H
8
OSD pulse
characteristics2
b b
SG6 SG5
0FH
15
OSD adjust control
characteristics1
Oaj1
4.6 5.4 6.2 VP-P OUT
0.8 1.0 1.2
a
b
b
a
a
SG6 SG6 SG5
∆Oaj1
OSD adjust control
relative
characteristics1
OSD adjust control
characteristics2
08H
8
Oaj2
2.8 3.3 3.8 VP-P OUT
0.8 1.0 1.2
a
b
b
b
SG6 SG6 SG5
OSD adjust control
relative
characteristics2
∆Oaj2
08H
8
OSD adjust control
characteristics3
0
0.1 0.5 VP-P OUT
a
b
S
Oaj3
OSD adjust control
relative
characteristics3
0.8 1.0 1.2
∆Oaj3
08H
8
2.2 2.7 3.2
2.2 2.7 3.2
V
V
OU
a
OSD input
threshold voltage
VthOSD
VthBLK
2.0 5.0
2.0 5.0
2.0 5.0
2.0 5.0
00H
0
OSD BLK input
threshold voltage
0FH
15
HBLK1 1.7 2.0 2.
a
a
a
G5 SG7
b
a
a
a
a
Retrace BLK
characteristics1
06H
6
0.7 1
HBLK2
b b
SG5 SG7
Retrace BLK
characteristics2
00H
0
Retrace BLK
characteristics3
1.0
b b
SG5 SG7
2.0 5.0
2.0 5.0
HBLK3
08H
8
Retrace BLK
input threshold
voltage
b b
SG5 SG7
VthRET
Variable
nG IN
Sync OUT
0
0.01 0.02
a
a
a
a
a
a
a
a
a
a
b
SG4
2.0 5.0
2.0 5.0
SOG input
maximum noise
voltage
SS-NV
SS-SV
Variable
SonG IN
Sync OUT
SOG
minimum input
voltage
0.2 0.3
VP-P
b
SG4
Variable
Sync output
high level
4.5 4.9 5.0
V
V
Sync
OUT
Sync
OUT
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
b
SG4
b
2.0 5.0
2.0 5.0
2.0 5.0
VSH
Sync output
low level
0
0
0.3 0.6
VSL
SG4
b
60
90 ns Sync
OUT
Sync output
delay time1
TDS-F
SG4
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 6 of 25
M52743BSP
Electrical Characteristics (cont.)
CTL
Voltage
Limits
Test
Point
Input
BUS CTL (H)
2, 6,
11
1
4, 9
13
19
27
7
30
15 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0BH
D/A D/A D/A INT
Adj OUT OUT OUT OUT EXT
OSD
BLK
CP in ReT
BLK
SOG Bri- ABL Main Sub Sub Sub OSD BLK D/A
RGB
in
OSD
in
in
ght
Cont Cont Cont Cont Adj
Item
Symbol
TDS-R
Min. Typ. Max. Unit
(s)
1
2
3
1
2
3
4
Sync output
delay time2
0
60
90 ns Sync
OUT
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
b
SG4
2.0 5.0
FFH FFH FFH FFH 00H 00H FFH FFH FFH FFH 00H
D/A H output
voltage
4.5 5.0 5.5 VDC D/A
OUT
a
a
a
a
2.0 5.0
2.0 5.0
2.0 5.0
2.0 5.0
VOH
VOL
IAO
255 255
255 255
0
0
255
255 255 255
0
00H 00H 00H 00H
D/A L output
voltage
0
0.5 1.0 VDC D/A
OUT
0
0
0
0
Vari Vari Vari Vari
able able able able
D/A output
current range
−1.0
−1.0
0.4 mA D/A
OUT
Vari Vari Vari Vari
able able able able
D/A
nonlinearity
1.0 LSB D/A
OUT
DNL
Electrical Characteristics Test Method
ICC1 Circuit Current1
Measuring conditions are as listed in supplementary Table.
Measured with a current meter at test point IA.
ICC2 Circuit Current2
Measuring conditions are as listed in supplementary Table.
Measured with a current meter at test point IB.
Vomax Output Dynamic Range
Decrease V30 gradually, and measure the voltage rm output is distorted. The voltage is
called VOL.
Next, increase V30 gradually, and measurf waveform output is distorted. The voltage is
called VOH.
Voltage Vomax is calculated by th
Vomax = VOH − VO
Waveform output
VOL
0.0
Vimax Maximum Input
Increase the input signal (SG2) amplitude gradually, starting from 700 mVP-P. Measure the amplitude of the input
signal when the output signal starts becoming distorted.
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 7 of 25
M52743BSP
GV Maximum Gain
Input SG1, and read the amplitude output at OUT (29, 32, 35). The amplitude is called VOUT (29, 32, 35).
Maximum gain GV is calculated by the equation below:
VOUT
GV = 20log
(dB)
0.7
∆GV Relative Maximum Gain
Relative maximum gain ∆GV is calculated by the equation below:
∆GV = VOUT (29) / VOUT (32),
VOUT (32) / VOUT (35),
VOUT (35) / VOUT (29)
VC1 Main Contrast Control Characteristics1
Measuring the amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35).
Main contrast control characteristics VC1 is calculated by the equation below:
VOUT
VC1 = 20log
(dB)
0.7
∆VC1 Main Contrast Control Relative Characteristics1
Relative characteristics ∆VC1 is calculated by the equation b
∆VC1 = VOUT (29) / VOUT (32) ,
VOUT (32) / VOUT (35) ,
VOUT (35) / VOUT (29)
VC2 Main Contrast Control Charact
Measuring condition and procedure VC1.
∆VC2 Main Contrast Contrcs2
Measuring condition and escribed in ∆VC1.
VC3 Main Contrast Contrs3
Measuring condition and procedsame as described in VC1.
∆VC3 Main Contrast Control Relative Characteristics3
Measuring condition and procedure are the same as described in ∆VC1.
VSC1 Sub Contrast Control Characteristics1
Measure the amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35). Sub contrast
control characteristics VSC1 is calculated by the equation below:
VOUT
VSC1 = 20log
(dB)
0.7
∆VSC1 Sub Contrast Control Relative Characteristics1
Relative characteristics ∆VSC1 is calculated by the equation below:
∆VSC1 = VOUT (29) / VOUT (32),
VOUT (32) / VOUT (35),
VOUT (35) / VOUT (29).
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 8 of 25
M52743BSP
VSC2 Sub Contrast Control Characteristics2
Measuring condition and procedure are the same as described in VSC1
.
∆VSC2 Sub Contrast Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆VSC1
SC3 Sub Contrast Control Characteristics3
.
.
V
Measuring condition and procedure are the same as described in VSC1
.
∆VSC3 Sub Contrast Control Relative Characteristics3
Measuring condition and procedure are the same as described in ∆VSC1
VMSC Main/sub Contrast Control Characteristics2
Measure the amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35). Main/Sub
contrast control characteristics VMSC1 is calculated by the equation below:
VOUT
VMSC1 = 20log
(dB)
0.7
∆VMSC Main/sub Contrast Control Relative Characteristics2
Relative characteristics ∆VMSC1 is calculated by the equation belo
∆VMSC = VOUT (29) / VOUT (32),
VOUT (32) / VOUT (35),
VOUT (35) / VOUT (29)
ABL1 ABL Control Characteristics1
Measure the amplitude output at OUT (29, e is called VOUT (29, 32, 35), and is treated as
ABL1.
∆ABL1 ABL Control Relative
Relative characteristics ∆ABion below:
∆ABL1 = VOUT
VOUT
VOUT (35) 9)
ABL2 ABL Control Characteristics2
Measuring condition and procedure are the same as described in ABL1.
∆ABL2 ABL Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆ABL1.
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 9 of 25
M52743BSP
VB1 Brightness Control Characteristics1
Measure the DC voltage at OUT (29, 32, 35) with a voltmeter. The measured value is called VOUT (29, 32, 35), and is
treated as VB1.
∆VB1 Brightness Control Relative Characteristics1
Relative characteristics ∆VB1 is calculated by the difference in the output between the channels.
∆VB1 = VOUT (29) − VOUT (32),
VOUT (32) − VOUT (35),
VOUT (35) − VOUT (29)
VB2 Brightness Control Characteristics2
Measuring condition and procedure are the same as described in VB1.
∆VB2 Brightness Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆VB1.
VB3 Brightness Control Characteristics3
Measuring condition and procedure are the same as described in VB1.
∆VB3 Brightness Control Relative Characteristics3
Measuring condition and procedure are the same as describe
F
C1 Frequency Characteristics1 (f = 50 MHz)
First, SG3 to 1 MHz is as input signal. Input a resfer the voltage at input pins (2, 6, 11) in
order that the bottom of input signal is 2.5 V. Corder that the amplitude of sine wave output
is 4.0 VP-P. Control the brightness in order toutput is 2.0 VP-P. By the same way, measure
the output amplitude when SG3 to 50 MHasured value is called VOUT (29, 32, 35).
Frequency characteristics FC1 (29, 32, tion below:
FC1 = 20log
(dB)
Output am1 MHz): 4 VP-P
∆FC1 Frequency Rela= 50 MHz)
Relative characteristics ∆FC1 e difference in the output between the channels.
FC1' Frequency Characteristi150 MHz)
Measuring condition and procedure are the same as described in FC1, expect SG3 to 150 MHz.
∆FC1' Frequency Relative Characteristics1 (f = 150 MHz)
Relative characteristics ∆FC1' is calculated by the difference in the output between the channels.
FC2 Frequency Characteristics2 (f = 150 MHz)
SG3 to 1 MHz is as input signal. Control the main contrast in order that the amplitude of sine wave output is 1.0 VP-P
.
By the same way, measure the output amplitude when SG3 to 150 MHz is as input signal.
The measured value is called VOUT (29, 32, 35). Frequency characteristics FC2 (29, 32, 35) is calculated by the
equation below:
VOUT VP-P
FC2 = 20log
(dB)
Output amplitude when inputted SG3 (1 MHz): 4 VP-P
∆FC2 Frequency Relative Characteristics2 (f = 150 MHz)
Relative characteristics ∆FC2 is calculated by the difference in the output between the channels.
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 10 of 25
M52743BSP
C.T.1 Crosstalk1 (f = 50 MHz)
Input SG3 (50 MHz) to pin 2 only, and then measure the waveform amplitude output at OUT (29, 32, 35). The
measured value is called VOUT (29, 32, 35). Crosstalk C.T.1 is calculated by the equation below:
VOUT (29, 32)
C.T.1 = 20log
(dB)
VOUT (35)
C.T.1' Crosstalk1 (f = 150 MHz)
Measuring condition and procedure are the same as described in C.T.1, expect SG3 to 150 MHz.
C.T.2 Crosstalk2 (f = 50 MHz)
Input SG3 (50 MHz) to pin 6 only, and then measure the waveform amplitude output at OUT (29, 32, 35). The
measured value is called VOUT (29, 32, 35). Crosstalk C.T.2 is calculated by the equation below:
VOUT (29, 35)
C.T.2 = 20log
(dB)
VOUT (32)
C.T.2' Crosstalk2 (f = 150 MHz)
Measuring condition and procedure are the same as described in C.T.2, expec50 MHz.
C.T.3 Crosstalk3 (f = 50 MHz)
Input SG3 (50 MHz) to pin 11 only, and then measure the wavefor(29, 32, 35). The
measured value is called VOUT (29, 32, 35). Crosstalk C.T.3 ibelow:
VOUT (32, 35)
C.T.3 = 20log
(dB)
VOUT (29)
C.T.3' Crosstalk3 (f = 150 MHz)
Measuring condition and procedure are the sapect SG3 to 150 MHz.
Tr Pulse Characteristics1 (4 VP-P
)
Control the main contrast (00H) in output signal is 4.0 VP-P
.
Control the brightness (V30) if output signal is 2.0 V.
Measure the time needed m 10% to 90% (Tr1) and for the output pulse to rise from 10% to
90% (Tr2) with an active
Pulse characteristics Tr is caluations below:
Tr = [ (Tr2)2 − (Tr1)2 ] (
√
Tf Pulse Characteristics2 (4 VP-P
)
Measure the time needed for the input pulse to fall from 90% to 10% (Tf1) and for the output pulse to fall from 90% to
10% (Tf2) with an active probe.
Pulse characteristics Tf is calculated by the equations below:
Tf = [ (Tf2)2 − (Tf1)2 ] (ns)
√
100%
90%
10%
Tf1 or Tf2
0%
Tr1 or Tr2
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 11 of 25
M52743BSP
VthCP Clamp Pulse Threshold Voltage
Turn down the SG5 input level gradually from 5.0 VP-P, monitoring the waveform output.
Measure the top level of input pulse when the output pedestal voltage turn decrease with unstable.
WCP Clamp Pulse Minimum Width
Decrease the SG5 pulse width gradually from 0.5 µs, monitoring the output. Measure the SG5 pulse width (a point of
1.5 V) when the output pedestal voltage turn decrease with unstable.
PDCH Pedestal Voltage Temperature Characteristics1
Measure the pedestal voltage at 25°C. The measured value is called PDC1.
Measure the pedestal voltage at temperature of −20°C.
The measured value is called PDC2.
Pedestal voltage temperature characteristics 1 is calculated by the equation below:
PDCH = PDC1 − PDC2
PDCL Pedestal Voltage Temperature Characteristics2
Measure the pedestal voltage at 25°C. The measured value is called PDC
Measure the pedestal voltage at temperature of 75°C.
The measured value is called PDC3.
Pedestal voltage temperature characteristics 2 is calculated b
PDCL = PDC1 − PDC3
OTr OSD Pulse Characteristics1
Measure the time needed for the output pulse Tr) with an active probe.
OTf OSD Pulse Characteristics2
Measure the time needed for the oto 10% (OTf) with an active probe.
Oaj1 OSD Adjust Contro
Measure the amplitude oThe measured value is called VOUT (29, 32, 35), and is treated as
Oaj1.
∆Oaj1 OSD Adjust Control Rharacteristics1
Relative characteristics ∆Oaj1 is calclated by the equation below:
∆Oaj1 = VOUT (29) / VOUT (32),
VOUT (32) / VOUT (35),
VOUT (35) / VOUT (29)
Oaj2 OSD Adjust Control Characteristics2
Measuring condition and procedure are the same as described in Oaj1.
∆Oaj2 OSD Adjust Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆Oaj1.
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 12 of 25
M52743BSP
Oaj3 OSD Adjust Control Characteristics3
Measuring condition and procedure are the same as described in Oaj1.
∆Oaj3 OSD Adjust Control Relative Characteristics3
Measuring condition and procedure are the same as described in ∆Oaj1.
VthOSD OSD Input Threshold Voltage
Reduce the SG6 input level gradually, monitoring output. Measure the SG6 level when the output reaches 0 V. The
measured value is called VthOSD.
VthBLK OSD BLK Input Threshold Voltage
Confirm that output signal is being blanked by the SG6 at the time.
Monitoring to output signal, decreasing the level of SG6. Measure the top level of SG6 when the blanking period is
disappeared. The measured value is called VthBLK.
HBLK1 Retrace BLK Characteristics1
Measure the amplitude output is blanked by the SG7 at OUT (29, 32, 35). Thred value is called VOUT (29, 32,
35), and is treated as HBLK1.
HBLK2 Retrace BLK Characteristics2
Measure the amplitude output is blanked by the SG7 at OUT (29ue is called VOUT (29, 32,
35), and is treated as HBLK2.
HBLK3 Retrace BLK Characteristics3
Measure the amplitude output is blanked by the SGmeasured value is called VOUT (29, 32,
35), and is treated as HBLK3.
VthRET Retrace BLK Input Threshol
Confirm that output signal is being bl.
Monitoring to output signal, decrasure the top level of SG7 when the blanking period is
disappeared. The measured va
SS-NV SOG Input Ma
The sync's amplitude of SGte into all black, increase from 0 VP-P to 0.02 VP-P. No pulse output
permitted.
SS-SV SOG Minimum Input Volge
The sync's amplitude of SG4 be changed all white or all black, decrease from 0.3 VP-P to 0.2 VP-P. Confirm no
malfunction produced by noise.
VSH Sync Output High level
Measure the high voltage at SyncOUT. The measured value is treated as VSH.
VSL Sync Output Low Level
Measure the low voltage at SyncOUT. The measured value is treated as VSL.
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 13 of 25
M52743BSP
TDS-F Sync Output Delay Time1
SyncOUT becomes High with sync part of SG4.
Measure the time needed for the front edge of SG4 sync to fall from 50% and for SyncOUT to rise from 50% with an
active probe. The measured value is treated as TDS-F, less than 90 ns.
TDS-R Sync Output Delay Time2
Measure the time needed for the rear edge of SG4 sync to rise from 50% and for SyncOUT to fall from 50% with an
active probe. The measured value is treated as TDS-R, less than 90 ns.
SG4
Pedestal voltage
sync (50%)
TDS-F
(50%)
SyncOUT
TDS-R
VOH D/A H Output Voltage
Measure the DC voltage at D/A OUT. The measured value is treated a
VOL D/A L Output Voltage
Measure the DC voltage at D/A OUT. The measured value
IAO D/A Output Current Range
Electric current flow from the output of D/A OUT
Electric current flow into the output of D/A OA.
DNL D/A Nonlinearity
The difference of differential non-le less than ±1.0 LSB.
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 14 of 25
M52743BSP
BUS Control Table
(1) Slave address
D7
D6
D5
D4
D3
D2
D1
R/W
1
0
0
0
1
0
0
0
= 88H
(2) Each functions sub address
Sub
Data Byte (Up: Bit, Information Down: Preset)
Add.
Function
Bit
D7
A07
0
D6
A06
1
D5
A05
0
D4
A04
0
D3
A03
0
D2
A02
0
D1
A01
0
D0
Main contrast
8
00H
A00
0
Sub contrast R
Sub contrast G
Sub contrast B
OSD level
8
8
8
4
4
8
8
8
8
1
01H
02H
03H
04H
05H
06H
07H
08H
09H
A17
1
A16
0
A15
0
A14
0
A13
0
A12
0
A11
0
A10
0
A27
1
A26
0
A25
0
A24
0
A23
0
A22
0
A21
0
A20
0
A37
1
A36
0
A35
0
A34
0
A33
0
A32
0
A31
0
A30
0
0
0
0
A43
1
A42
0
A41
0
A40
0
RE-BLK adjust
D/A OUT1
0
0
A52
0
A51
0
A50
0
A67
1
A66
0
A62
0
A61
0
A60
0
D/A OUT2
A77
1
73
0
A72
0
A71
0
A70
0
D/A OUT3
A8
0
A83
0
A82
0
A81
0
A80
0
D/A OUT4
A94
0
A93
0
A92
0
A91
0
A90
0
Pedestal clamp INT/EXT SW
0
0
AB0
0
0
0
0
Note: Pedestal level INT/EXT S
0 → INT 1 → EXT
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 15 of 25
M52743BSP
I2C BUS Control Section SDA, SCL Characteristics
Item
Min. input LOW voltage
Symbol
VIL
Min.
−0.5
3.0
0
Max.
1.5
5.5
100
Unit
V
Max. input HIGH voltage
VIH
V
SCL clock frequency
fSCL
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
Time the bus must be free before a new transmission can start
Hold time start condition. After this period the first clock pulse is generated
The LOW period of the clock
tBUF
4.7
4.0
4.7
4.0
4.7
0
tHD:STA
tLOW
The HIGH period of the clock
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tr
Set up time for start condition (Only relevant for a repeated start condition)
Hold time DATA
Set-up time DATA
250
Rise time of both SDA and SCL lines
Fall time of both SDA and SCL lines
Set-up time for stop condition
1000
300
tf
tSU:STO
4.0
Timing Chart
tBUF
tr, tf
VIH
SDA
VIL
tSU: STO
tHD: STA
tSU: DAT
t
VIH
VIL
SCL
t
S
S
P
S
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 16 of 25
M52743BSP
Input Signal
SG No.
Signals
Pulse with amplitude of 0.7 VP-P (f = 30 kHz). Video width of 25 µs. (75%)
33 µs
SG1
Video signal
(all white)
8 µs
0.7 VP-P
SG2
Video signal
(step wave)
0.7 VP-P
(Amplitude is partially variable.)
SG3
Sine wave
(for freq. char.)
ine wave amplitude of 0.7 VP-P
1 MHz, 50 MHz, 150 MHz (variable)
Video width of 25 µs. (75%)
all white or all black
variable.
SG4
Video signal
(all white,
all black)
Sync's amplitude
is variable.
0.3 VP-P
3 µs
Pulse width and amplitude are v
SG5
Clamp
pulse
5 VTTL
SG6
OSD pulse
Amplitude is partially variable.
5 VTTL
5 µs
SG7
BLK pulse
5 VTTL
5 µs
Amplitude is partially variable.
Note: f = 30 kHz
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 17 of 25
M52743BSP
Test Circuit
D/A D/A D/A D/A
OUT1 OUT2 OUT3 OUT4
SG7
a
SG5
SDA SCL
OUT (35)
OUT (32)
OUT (29)
C/P IN
V30
0 to 5 V
100
b
b
a
1 k
1 k
1 k
SW27
SW19
100 µH
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
12 V out f/b gnd out f/b
brt out f/b
blk dac dac dac dac gnd sda scl c/p
M52743BSP
blk
1
R
2
12 V osd gnd
G
6
SonG 12 V osd gnd
10
B
12 V osd gnd abl NC 5 V sync
12 13 14 15 16 17 18
3
4
5
7
8
9
11
+
100 k
47 µ
S
ONG
IN
IN (2)
IN (6)
IN (11)
SYNC
OUT
3.3 µ 0.01 µ
3.3 µ 0.01 µ
3.3 µ 0.0
+
+
+
+
1 µ
1 k
SW1 SW2
SW4
a
SW6 SW7
SW9
a
ba
b
b
a
ba
b
a
b
A
IB
5 V
IA
A
+
SG6
47 µ
SG1
SG2
SG3
12 V
Measure point
Condenser: 0.01 µF (unless otherwise specified.)
Units Resistance: Ω
Capacitance: F
Typical Characteristic
Main Contrast Control Characteristics
Thermal Derating
2800
6
2403
2400
5
4
2000
1600
1200
800
1442
3
2
1
400
0
Sub contrast: Max
0
00H
FFH
−20
0
25 50 75 100 125 150
Ambient Temperature Ta (°C)
Main Contrast Control Data
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 18 of 25
M52743BSP
Sub Contrast Control Characteristics
Brightness Control Characteristics
6
5
4
6
5
4
3
2
1
0
3
2
1
0
Main contrast: Max
00H
FFH
0
1
2
3
4
5
Sub Contrast Control Data
ABL Characteristics
Brightness Control Voltage (VDC)
Ot Control Characteristics
1
0
6
5
4
3
2
1
Main cont
Sub co
0
0
1
2
0H
FH
ABL Contr
OSD Adjust Control Data
Sync on Gridth
12
y = 75%)
10
7
1 µ
+
8
100 k
IN
6
4
2
0
Sync separate
normal operating range
0
0.1
0.2
0.3
0.4
0.5
Input Sync Amplitude (VP-P
)
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 19 of 25
M52743BSP
Application Example
110 V
CRT
Cut off Adj
DA
5 V
TTL
BLK IN
(for retrace)
SDA
1 k
0 to 5 V
0.01
1 k
1 k
SCL
Clamp pulse
IN
100
0.01 µ 0.01 µ
5 24 23 22
100 µH
36
35
34
33
32
31
21
20
19
SP
1
2
3
9
10
11
12
13
14
15
16
17
18
0.01 µ
0.01 µ
NC
+
ABL IN
0 to 5 V
3.3
47 µ
3.3 µ
47 µ
1 k
3.3 µ 0.01 µ
01 µ
0.01 µ
Sync
Sep
OUT
+
+
5 V
TTL
75
75
75
5 V
TTL
5 V
TTL
OSD IN (B)
OSD IN (G)
OSD IN (R)
BLK IN
5 V
TTL
(for OSD)
+
0.01 µ
47 µ
+
Units Resistance: Ω
Capacitance: F
12 V 5 V
*
INPUT
(R)
INPUT
(G)
S
ON
G
INPUT
INPUT
(B)
* Circuit example of pin 6 and pin 7 same signal input
note: Feed back is internal feed back
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 20 of 25
M52743BSP
Pin Description
Pin No.
Name
DC Voltage (V)
Peripheral Circuit
Function
1
OSD BLK IN
Input pulses
R
G
3.7 to 5 V
1.7 V
maximum
1
B
Connected to GND if not used.
2.7 V
0.8 mA
2
6
INPUT (R)
INPUT (G)
INPUT (R)
2.5
Clamped to about 2.5 V due to
clamp pulses from pin 19.
Input at low impedance.
2 k
2 k
11
2
2
CP
0.3 mA
3
8
VCC1 (R)
12
ivalent voltage to 3
.
VCC1 (G)
12
4
VCC1 (B)
OSD IN (R)
OSD IN (G)
OSD IN (B)
put pulses
9
3.7 to 5 V
13
1.7 V
maximum
Connected to GND if not used.
2.7 V
5
GND 1 (R)
GND 1 (G)
GND 1 (B)
GND (5 V)
GND 2
10
14
22
33
7
INPUT
SYNC ON GREEN
(S on G)
Input pin for sync separation.
Sync is negative.
500
Input signal at pin 7, compare with
the reference voltage of internal
circuit in order to separate sync
signal.
1 k
3.2 V
When not used, set to OPEN.
7
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 21 of 25
M52743BSP
Pin Description (cont.)
Pin No.
Name
ABL IN
DC Voltage (V)
Peripheral Circuit
Function
15
When open 2.5 V
ABL (Automatic Beam Limiter)
input pin. Recommended voltage
range is 0 to 5 V.
2.5 V
20 k
When ABL function is not used,
set to 5 V.
1.2 k
1.2 k
30 k
0.5 mA
15
16
17
18
NC
5
VCC (5 V)
S on G Sep
OUT
Sync signal output pin, Being of
open collector output type.
18
19
20
21
Clamp Pulse
IN
ut pulses
41 k
2.5 to 5 V
0.5 V
maximum
19
at low impedance.
SCL
SCL of I2C BUS
(Serial clock line)
VTH = 2.3 V
3 V
SDA
SDA of I2C BUS
(Serial data line)
VTH = 2.3 V
50 k
21
2 k
3 V
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 22 of 25
M52743BSP
Pin Description (cont.)
Pin No.
23
Name
DC Voltage (V)
Peripheral Circuit
Function
D/A output pin.
D/A OUT
24
Output voltage range is 0 to 5 V,
Max output current is 0.4 mA.
25
26
23
27
Retrace BLK
IN
Input pulses
50 k
2.5 to 5 V
R
G
0.5 V
maximum
B
27
2.25 V
Connected to GND if not used.
28
31
34
EXT Feed
Back (B)
EXT Feed
Back (G)
EXT Feed
Back (R)
Variable
35 k
29
32
35
OUTPUT (B)
OUTPUT (G)
OUTPUT (R)
Variable
A resistor is needed on the GND
side.
Set discretionally to maximum 15
mA, depending on the required
driving capacity.
29
36
30
VCC2
Used to supply power to output
emitter follower only.
Main
Brightness
It is recommended that the IC be
used between pedestal voltage 2
V and 3 V.
35 k
30
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 23 of 25
M52743BSP
Application Method for M52743BSP
Clamp Pulse Input
Clamp pulse width is recommended
above 15 kHz, 1.0 µs
above 30 kHz, 0.5 µs
above 64 kHz, 0.3 µs.
The clamp pulse circuit in ordinary set is a long round about way, and beside high voltage, sometimes connected to
external terminal, it is very easy affected by large surge.
Therefore, the Figure shown right is recommended.
19
EXT-Feed Back
In case of application circuit example of lower figure, Set up R1, R2 wk level of the signal feed
backed from Power AMP is 1 V, when the bottom of output signal
Main brightn
DC: 1 to 5
Power Amp out
Pre Amp
input R
R o
B
back
level 1 to 5 V
R1
R2
T-Feed Back Application Circuit
Notice of Application
•
•
Make the nearest distance between output pin and pull down resister.
Recommended pedestal voltage of IC output signal is 2 V.
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 24 of 25
M52743BSP
Package Dimensions
36P4E
Plastic 36pin 500mil SDIP
EIAJ Package Code
SDIP36-P-500-1.78
JEDEC Code
—
Weight(g)
3.0
Lead Material
Cu Alloy
36
19
1
18
Dimension in Millimeters
Symbol
A
Min
—
Nom
—
—
Max
5.08
—
D
A
1
0.51
—
3.8
0.5
—
0.6
0.4
0.9
1.0
1.3
0.65
0.22
31.3
10.85
—
0.75
0.27
31.5
11.0
1.778
12.7
—
1.05
0.34
31.7
11.15
—
D
E
e
e
b
1
e1
—
3.0
—
—
SEATING PLANE
L
0°
—
15°
REJ03F0193-0201 Rev.2.01 Mar 31, 2008
Page 25 of 25
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Notes:
1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes
warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property
rights or any other rights of Renesas or any third party with respect to the information in this document.
2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document, including,
but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples.
3. You should not use the products or the technology described in this document for the purpose of military applications such as the development of weapons of mass
destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws
and regulations, and procedures required by such laws and regulations.
4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this
document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document,
please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be
disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com )
5. Renesas has used reasonable care in compiling the information included in this document, but Renesas assumes no liability whatsoever for any damages incurred as a
result of errors or omissions in the information included in this document.
6. When using or otherwise relying on the information in this document, you should evaluate the information in light of the total system before deciding about the applicability
of such information to the intended application. Renesas makes no representations, warranties or guaranties regarding the suitability of its products for any particular
application and specifically disclaims any liability arising out of the application and use of the information in this document or Renesas products.
7. With the exception of products specified by Renesas as suitable for automobile applications, Renesas products are not designed, manufactured or tested for applications
or otherwise in systems the failure or malfunction of which may cause a direct threat to human life or create a risk uman injury or which require especially high quality
and reliability such as safety systems, or equipment or systems for transportation and traffic, healthcare, combntrol, aerospace and aeronautics, nuclear power, or
undersea communication transmission. If you are considering the use of our products for such purposes, pleRenesas sales office beforehand. Renesas shall
have no liability for damages arising out of the uses set forth above.
8. Notwithstanding the preceding paragraph, you should not use Renesas products for the purposes listed
(1) artificial life support devices or systems
(2) surgical implantations
(3) healthcare intervention (e.g., excision, administration of medication, etc.)
(4) any other purposes that pose a direct threat to human life
Renesas shall have no liability for damages arising out of the uses set forth in the above and cts in any of the foregoing
applications shall indemnify and hold harmless Renesas Technology Corp., its affiliated coployees against any and all
damages arising out of such applications.
9. You should use the products described herein within the range specified by Renesas, g, operating supply voltage range,
movement power voltage range, heat radiation characteristics, installation and other no liability for malfunctions or damages
arising out of the use of Renesas products beyond such specified ranges.
10. Although Renesas endeavors to improve the quality and reliability of its productuch as the occurrence of failure at a certain
rate and malfunctions under certain use conditions. Please be sure to implemssibility of physical injury, and injury or damage
caused by fire in the event of the failure of a Renesas product, such as safeg but not limited to redundancy, fire control and
malfunction prevention, appropriate treatment for aging degradation or an, since the evaluation of microcomputer software
alone is very difficult, please evaluate the safety of the final products or
11. In case Renesas products listed in this document are detached from are attached or affixed, the risk of accident such as
swallowing by infants and small children is very high. You should iproducts may not be easily detached from your products.
Renesas shall have no liability for damages arising out of such d
12. This document may not be reproduced or duplicated, in any foapproval from Renesas.
13. Please contact a Renesas sales office if you have any queshis document, Renesas semiconductor products, or if you have
any other inquiries.
RENESAS SALES OFFICE
http://www.renesas.com
Refer to "http://www.renesas.coiled information.
Renesas Technology Amer
450 Holger Way, San Jos
Tel: <1> (408) 382-7500,
Renesas Technology Europ
Dukes Meadow, Millboard Roadamshire, SL8 5FH, U.K.
Tel: <44> (1628) 585-100, Fax: <40
Renesas Technology (Shanghai) Co.
Unit 204, 205, AZIACenter, No.1233 Lujiaing Rd, Pudong District, Shanghai, China 200120
Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7858/7898
Renesas Technology Hong Kong Ltd.
7th Floor, North Tower, World Finance Centre, Harbour City, Canton Road, Tsimshatsui, Kowloon, Hong Kong
Tel: <852> 2265-6688, Fax: <852> 2377-3473
Renesas Technology Taiwan Co., Ltd.
10th Floor, No.99, Fushing North Road, Taipei, Taiwan
Tel: <886> (2) 2715-2888, Fax: <886> (2) 3518-3399
Renesas Technology Singapore Pte. Ltd.
1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632
Tel: <65> 6213-0200, Fax: <65> 6278-8001
Renesas Technology Korea Co., Ltd.
Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea
Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
Renesas Technology Malaysia Sdn. Bhd
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: <603> 7955-9390, Fax: <603> 7955-9510
© 2008. Renesas Technology Corp., All rights reserved. Printed in Japan.
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