M52342FP [RENESAS]

PLL-Split VIF/SIF IC; PLL - SPLIT VIF / SIF IC
M52342FP
型号: M52342FP
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

PLL-Split VIF/SIF IC
PLL - SPLIT VIF / SIF IC

商用集成电路 光电二极管
文件: 总19页 (文件大小:176K)
中文:  中文翻译
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M52342FP  
PLL-Split VIF/SIF IC  
REJ03F0165-0200  
Rev.2.00  
Jun 14, 2006  
Description  
The M52342FP is IF signal-processing IC for VCRs and TVs. It enables the PLL detection system despite size as small  
as that of conventional quasi-synchronous VIF/SIF detector, IF/RF AGC, SIF limiter, FM detector, QIF AGC and EQ  
AMP.  
Features  
Video detection output is 2 VP-P. It has built-in EQ AMP.  
The package is a 24-pin flat package, suitable for space saving.  
The video detector uses PLL for full synchronous detection circuit. It produces excellent characteristics of DG, DP,  
920 kHz beat, and cross color.  
Dynamic AGC realizes high-speed response with only single filter.  
Video IF and sound IF signal processing are separated from each other. VCO output is used to obtain intercarrier.  
This PLL-SPLIT method and built-in QIF AGC provide good sound sensitivity and reduces buzz.  
As AFT output voltage uses the APC output voltage, VCO coil is not used.  
Audio FM demodulation uses PLL system, so it has wide frequency range with no external parts and no adjustment.  
Application  
TV sets, VCR tuners  
Recommended Operating Condition  
In case of VCC and Vreg. OUT short  
Supply voltage range: 4.75 to 5.25 V  
Recommended supply voltage: 5.0 V  
Incase of Vreg. OUT open  
Supply voltage range: 8.5 to 12.5 V  
Rev.2.00 Jun 14, 2006 page 1 of 18  
M52342FP  
Block Diagram  
APC  
EQ F/B FILTER  
VIDEO  
OUT  
Vreg.  
OUT  
Vreg.  
OUT  
VCO  
COIL  
VCO  
COIL  
QIF AFT  
OUT SW/NPSW  
LIMITER  
IN  
VCC  
17  
VCC  
16  
24  
23  
22  
21  
20  
19  
18  
15  
14  
13  
VCO  
VCC REG  
LIM AMP  
Inter  
Split  
AFT  
QIF DET  
QIF AMP  
IF AGC  
QIF AGC  
EQ  
AMP  
VIDEO  
DET  
APC  
FM DET  
RF AGC  
VIF AMP  
AF AMP  
12  
1
2
3
4
5
6
7
8
9
10  
11  
RF AGC AFT OUT RF AGC VIF IN  
OUT  
VIF IN  
GND  
GND  
GND  
QIF IF AGC  
DET IN FILTER  
NFB  
AUDIO  
OUT  
DELAY  
Pin Arrangement  
M52342FP  
RF AGC DELAY  
1
2
3
4
5
6
7
8
9
24 EQ F/B  
AFT OUT  
RF AGC OUT  
VIF IN  
23 APC FILTER  
22 VIDEO OUT  
21 Vreg. OUT  
20 Vreg. OUT  
19 VCO COIL  
18 VCO COIL  
17 VCC  
VIF IN  
GND  
GND  
GND  
QIF DET IN  
16 VCC  
IF AGC FILTER 10  
NFB 11  
15 QIF OUT  
14 AFT SW/NPSW  
13 LIMITER IN  
AUDIO OUT 12  
(Top view)  
Outline: PRSP0024GA-A (24P2Q-A)  
Rev.2.00 Jun 14, 2006 page 2 of 18  
M52342FP  
Absolute Maximum Ratings  
(Ta = 25°C, surge protection capacitance 200 pF resistance 0, unless otherwise noted)  
Item  
Symbol  
VCC  
Ratings  
Unit  
Condition  
Supply voltage1  
VCC and Vreg. OUT is not connected to  
each other.  
13.2  
V
Supply voltage Vreg. OUT  
Vreg. OUT  
VCC and Vreg. OUT is not connected to  
each other.  
6.0  
V
Power dissipation  
Pd  
1524  
20 to +75  
40 to +150  
200  
mW  
°C  
°C  
V
Operating temperature  
Storage temperature  
Surge voltage resistance  
Topr  
Tstg  
Surge  
Ambient Operating Condition  
(Ta = 25°C, unless otherwise noted)  
Recommended Supply Voltage  
5.0 V  
Supply Voltage  
In case of VCC and Vreg. OUT short  
In case of Vreg. OUT open  
Supply Voltage Range  
4.75 to 5.25 V  
8.5 to 12.5 V  
Electrical Characteristics  
(VCC = 5 V, Ta = 25°C, unless otherwise noted)  
Test Conditions  
Te  
st  
Ci  
External  
Power Supply  
Switches set to  
position 1  
unless  
Limits  
Sym  
bol  
rc  
uit  
Test  
Point  
Input  
Point  
Input  
SG  
otherwise  
indicated  
Item  
Unit  
Min. Typ. Max.  
V7 V8 V12  
VIF section  
Circuit  
current1  
ICC1  
1
1
A
A
VIF IN  
VIF IN  
SG1  
33  
33  
46  
46  
59  
59  
mA  
5
VCC = 5V  
SW17 = 1,  
SW14 = 2  
VCC = 5V  
Circuit  
ICC2  
SG1  
mA  
5
VCC = 12V  
current2  
SW14 = SW17 =  
VCC = 12V  
2
Vreg  
voltage  
VCC2  
V18  
1
1
TP17  
4.60  
3.2  
4.95  
3.5  
5.30  
3.8  
V
V
5
VCC = 12V  
SW7 = 2  
SW8 = 2  
Video  
TP18A  
0
output DC  
voltage  
Video  
VO  
1
TP18A  
VIF IN  
SG1  
1.8  
2.1  
2.4  
VP-P  
output  
voltage  
det  
Video S/N  
Video  
S/N  
1
1
TP18B  
TP18A  
VIF IN  
VIF IN  
SG2  
SG3  
51  
56  
dB  
SW18 = 2  
SW8 = 2  
Video  
band width  
BW  
7.0  
9.0  
MHz  
Va  
ria  
bl  
e
Input  
sensitivity  
VIN  
MIN  
1
TP18A  
VIF IN  
SG4  
48  
52  
dBµ  
Rev.2.00 Jun 14, 2006 page 3 of 18  
M52342FP  
(VCC = 5 V, Ta = 25°C, unless otherwise noted)  
Test Conditions  
Te  
st  
Ci  
rc  
External  
Power Supply  
Switches set to  
position 1  
unless  
Limits  
Sym  
bol  
Test  
Point  
Input  
Point  
Input  
SG  
otherwise  
indicated  
Item  
uit  
Unit  
Min. Typ. Max.  
V7 V8 V12  
Maximum  
allowable  
input  
VIN  
MAX  
1
TP18A  
VIF IN  
SG5  
101  
105  
dBµ  
AGC  
GR  
50  
57  
dB  
control  
range  
input  
IF AGC  
voltage  
V8  
1
1
TP8  
TP8  
VIF IN  
SG6  
2.9  
4.0  
3.2  
4.4  
3.5  
V
V
Maximum  
IF AGC  
voltage  
V8H  
Minimum  
IF AGC  
voltage  
V8L  
V3H  
1
1
TP8  
TP3  
VIF IN  
VIF IN  
SG7  
SG6  
2.2  
2.4  
2.6  
V
V
Maximum  
RF AGC  
voltage  
4.2  
8.0  
11.0  
4.7  
8.9  
11.9  
0.1  
0.2  
0.2  
92  
(VCC = 9V)  
(VCC = 12V)  
Minimum  
RF AGC  
voltage  
V3L  
V3  
1
1
TP3  
TP3  
VIF IN  
VIF IN  
SG7  
SG8  
0.5  
0.7  
0.7  
95  
V
(VCC = 9V)  
(VCC = 12V)  
RF AGC  
operation  
voltage  
89  
dBµ  
Capture  
range U  
CL-U  
CL-L  
CL-T  
1
1
1
1
1
TP18A  
TP18A  
VIF IN  
VIF IN  
SG9  
SG9  
1.0  
1.8  
3.1  
20  
1.7  
2.4  
4.1  
30  
60  
MHz  
MHz  
MHz  
Capture  
range L  
Capture  
range T  
AFT  
sensitivity  
TP2  
TP2  
VIF IN  
VIF IN  
SG10  
SG10  
mV/  
kHz  
3.3  
3.3  
AFT  
maximum  
voltage  
V2H  
V2L  
3.85  
7.7  
10.7  
4.15  
8.1  
11.1  
0.7  
0.7  
0.7  
2.5  
4.5  
6.0  
2.5  
4.5  
6.0  
40  
V
(VCC = 9V)  
(VCC = 12V)  
AFT  
minimum  
voltage  
1
1
1
1
TP2  
TP2  
VIF IN  
VIF IN  
VIF IN  
VIF IN  
SG10  
SG10  
SG10  
SG11  
1.2  
1.2  
1.2  
2.8  
4.9  
6.5  
2.8  
4.9  
6.5  
V
3.3  
(VCC = 9V)  
(VCC = 12V)  
AFT  
defeat1  
AFT  
def1  
2.2  
4.1  
5.5  
2.2  
4.1  
5.5  
35  
V
1.6  
5
(VCC = 9V)  
(VCC = 12V)  
AFT  
defeat2  
AFT  
def2  
TP2  
V
4.6  
(VCC = 9V)  
(VCC = 12V)  
SW8 = 2  
Inter  
IM  
TP18A  
dB  
Va  
ria  
bl  
modulation  
e
Rev.2.00 Jun 14, 2006 page 4 of 18  
M52342FP  
(VCC = 5 V, Ta = 25°C, unless otherwise noted)  
Test Conditions  
Te  
st  
Ci  
rc  
External  
Power Supply  
Switches set to  
position 1  
unless  
Limits  
Sym  
bol  
Test  
Point  
Input  
Point  
Input  
SG  
otherwise  
indicated  
Item  
uit  
Unit  
Min. Typ. Max.  
V7 V8 V12  
Differential DG  
gain  
1
1
1
2
2
TP18A  
TP18A  
TP18A  
TP4  
VIF IN  
VIF IN  
VIF IN  
SG12  
SG12  
SG2  
2
5
%
Differential DP  
phase  
2
5
deg  
V
Sync. tip  
level  
V18  
SYNC  
0.85  
1.15  
1.2  
5
1.45  
VIF input  
resister  
RINV  
CINV  
kΩ  
pF  
VIF input  
capacitanc  
e
TP4  
SIF section  
QIF  
output1  
QIF1  
QIF2  
VOS  
1
1
1
TP13  
TP13  
TP13  
VIF IN  
SG2  
94  
94  
94  
100  
100  
100  
106  
106  
106  
dBµ  
dBµ  
dBµ  
QIF IN SG13  
VIF IN SG2  
QIF IN SG14  
QIF  
output2  
SIF  
detection  
output  
VIF IN  
SG15  
0
5
5
SW7 = 2  
AF output  
DC  
V1  
1
TP10  
SIF IN  
SG20  
1.6  
2.2  
2.8  
V
voltage  
AF output  
(4.5MHz)  
VOAF  
1
1
1
1
TP10  
TP10  
TP10  
SIF IN  
SIF IN  
SIF IN  
SG16  
SG21  
SG16  
400  
320  
560  
450  
0.2  
800  
630  
0.9  
mVr  
ms  
5
0
5
AF output  
(5.5MHz)  
VOAF  
2
mVr  
ms  
AF output  
distortion  
(4.5MHz)  
THD  
AF1  
%
AF output  
distortion  
(5.5MHz)  
THD  
AF2  
1
1
1
1
1
TP10  
TP10  
TP10  
TP10  
TP10  
SIF IN  
SIF IN  
SIF IN  
SIF IN  
SIF IN  
SG21  
55  
55  
0.2  
42  
42  
62  
64  
0.9  
55  
55  
%
0
5
0
5
0
Limiting  
sensitivity  
(4.5MHz)  
LIM1  
SG17  
SG19  
dBµ  
dBµ  
dB  
Limiting  
sensitivity  
(5.5MHz)  
LIM2  
SG22  
SG24  
AM  
rejection  
(4.5MHz)  
AMR1  
AMR2  
SG18  
SG23  
AM  
dB  
rejection  
(5.5MHz)  
AF S/N  
(4.5MHz)  
AF  
S/N1  
1
1
TP10  
TP10  
SIF IN  
SIF IN  
SG20  
SG25  
55  
55  
62  
64  
dB  
dB  
5
0
AF S/N  
AF  
(5.5MHz)  
S/N2  
Rev.2.00 Jun 14, 2006 page 5 of 18  
M52342FP  
(VCC = 5 V, Ta = 25°C, unless otherwise noted)  
Test Conditions  
Te  
st  
Ci  
rc  
External  
Power Supply  
Switches set to  
position 1  
unless  
Limits  
Sym  
bol  
Test  
Point  
Input  
Point  
Input  
SG  
otherwise  
indicated  
Item  
uit  
Unit  
Min. Typ. Max.  
V7 V8 V12  
SIF input  
RINS  
2
TP7  
1.5  
kΩ  
resistance  
SIF input  
capacitanc  
e
CINS  
2
TP7  
4
pF  
V
Control section  
QIF  
CQIF  
1
TP7  
0.7  
1.0  
Va  
ria  
bl  
SW7 = 2  
control  
e
Pin 14 Voltage Control  
Pin 14 Voltage (V)  
0 to 0.6  
AF  
AFT  
0 to 2.3  
PAL  
NTSC  
NORMAL  
DEFEAT  
NORMAL  
DEFEAT  
1.0 to 2.3  
2.7 to 4.0  
4.4 to 5.0  
2.7 to 5.0  
Electrical Characteristics Test Method  
Video S/N  
Input SG2 into VIF IN and measure the video out (Pin 22) noise in r.m.s at TP22B through a 5 MHz (–3 dB) L.P.F.  
0.7 Vo det  
S/N = 20 log  
(dB)  
NOISE  
BW Video Band Width  
1. Measure the 1MHz component level of EQ output TP22A with a spectrum analyzer when SG3 (f2 = 57.75 MHz) is  
input into VIF IN. At that time, measure the voltage at TP10 with SW10, set to position 2, and then fix V10 at that  
voltage.  
2. Reduce f2 and measure the value of (f2 f0) when the (f2 f0) component level reaches 3 dB from the 1 MHz  
component level as shown below.  
TP18  
–3 dB  
(f2 – f0)  
1 MHz  
BW  
Rev.2.00 Jun 14, 2006 page 6 of 18  
M52342FP  
VIN MIN Input sensitivity  
Input SG4 (Vi = 90 dBµ) into VIF IN, and then gradually reduce Vi and measure the input level when the 20 kHz  
component of EQ output TP22A reaches 3 dB from VO det level.  
VIN MAX Maximum Allowable Input  
1. Input SG5 (Vi = 90 dBµ) into VIF IN, and measure the level of the 20 kHz component of EQ output.  
2. Gradually increase the Vi of SG and measure the input level when the output reaches 3 dB.  
GR AGC Control Range  
GR = VIN MAX VIN MIN (dB)  
V3 RF AGC Operating Voltage  
Input SG8 into VIF IN, and gradually reduce Vi and then measure the input level when RF AGC output TP3 reaches  
1/2 VCC, as shown below.  
TP3  
Voltage  
V3H  
1/2 VCC  
V3L  
Vi  
Vi (dBµ)  
CL-U Capture Range  
1. Increase the frequency of SG9 until the VCO is out of locked-oscillation.  
2. Decrease the frequency of SG9 and measure the frequency fU when the VCO locks.  
CL-U = fU 58.75 (MHz)  
CL-L Capture Range  
1. Decrease the frequency of SG9 until the VCO is out of locked-oscillation.  
2. Increase the frequency of SG9 and measure the frequency fL when the VCO locks.  
CL-L = 58.75 fL (MHz)  
CL-T Capture Range  
CL-T = CL-U + CL-L (MHz)  
Rev.2.00 Jun 14, 2006 page 7 of 18  
M52342FP  
µAFT Sensitivity, V2H Maximum AFT Voltage, V2L Minimum AFT Voltage  
1. Input SG10 into VIF IN, and set the frequency of SG10 so that the voltage of AFT output TP2 is 3 V. This  
frequency is named f (3).  
2. Set the frequency of SG10 so that the AFT output voltage is 2 V. This frequency is named f (2).  
3. IN the graph, maximum and minimum DC voltage are V2H and V2L, respectively.  
TP2  
Voltage  
V2H  
3 V  
2 V  
V2L  
f (MHz)  
f (3)  
f (2)  
1000 (mV)  
µ =  
(mV/kHz)  
f (2) – f (3) (kHz)  
IM Intermodulation  
1. Input SG11 into VIF IN, and measure EQ output TP22A with an oscilloscope.  
2. Adjust AGC filter voltage V10 so that the minimum DC level of the output waveform is 1.0 V.  
3. At this time, measure, TP22A with a spectrum analyzer.  
The intermodulation is defined as a difference between 920 kHz and 3.58 MHz frequency components.  
LIM Limiting Sensitivity  
1. Input SG17 (SG22) into SIF input, and measure the 400 Hz component level of AF output TP12.  
2. Input SG19 (SG24) into SIF input, and measure the 400 Hz component level of AF output TP12.  
3. The input limiting sensitivity is defined as the input level when a difference between each 400 Hz components of  
audio output (TP12) is 30 dB, as shown below.  
Audio output  
(mVrms)  
Audio output while  
SG17 (SG22) is input  
30 dB  
Audio output while  
SG19 (SG24) is input  
SIF input  
(dBµ)  
AMR AM Rejection  
1. Input SG18 (SG23) into SIF input, and measure the output level of AF output TP12. This level is named VAM.  
2. AMR is;  
VoAF (mVrms)  
AMR = 20 log  
(dB)  
VAM (mVrms)  
Rev.2.00 Jun 14, 2006 page 8 of 18  
M52342FP  
AF S/N  
1. Input SG19 (SG24) into SIF input, and measure the output noise level of AF output TP1. This level is named VN.  
2. S/N is;  
VoAF (mVrms)  
S/N = 20 log  
(dB)  
VN (mVrms)  
CQIF QIF Control  
Lower the voltage of V9, and measure the voltage of V9 when DC voltage of TP15 begins to change.  
The Note in The System Setup  
M52342FP has 2 power supply pins of VCC (pin 16, 17) and Vreg. OUT (pin 20, 21) . VCC is for AFT output, RF AGC  
output circuits and 5 V regulated power circuit and Vreg. OUT is for the other circuit blocks.  
In case M52342FP is used together with other ICs like VIF operating at more than 5 V, the same supply voltage as that  
of connected ICs is applied to VCC and Vreg. OUT is opened. The other circuit blocks, connected to Vreg. OUT are  
powered by internal 5 V regulated power supply.  
In case the connecting ICs are operated at 5 V, 5 V is supplied to both VCC and Vreg. OUT.  
Logic Table  
AF  
AFT  
10 k “H”  
10 k “L”  
20 k “H”  
20 k “L”  
20 k “H”  
20 k “L”  
NTSC  
PAL  
DEFEAT  
NORMAL  
DEFEAT  
NORMAL  
Rev.2.00 Jun 14, 2006 page 9 of 18  
M52342FP  
Input Signal  
SG No.  
Signals (50 Termination)  
f0 = 58.75 MHz AM 20 kHz 77.8% 90 dBµ  
1
2
3
f0 = 58.75 MHz 90 dBµ CW  
f1 = 58.75 MHz 90 dBµ CW (Mixed signal)  
f2 = Frequency variable 70 dBµ CW (Mixed signal)  
f0 = 58.75 MHz AM 20 kHz 77.8% level variable  
f0 = 58.75 MHz AM 20 kHz 14.0% level variable  
f0 = 58.75 MHz 80 dBµ CW  
4
5
6
7
f0 = 58.75 MHz 110 dBµ CW  
8
f0 = 58.75 MHz CW level variable  
f0 = variable AM 20 kHz 77.8% 90dBµ  
f0 = variable 90dBµ CW  
9
10  
11  
f1 = 58.75 MHz 90 dBµ CW (Mixed signal)  
f2 = 55.17 MHz 80 dBµ CW (Mixed signal)  
f3 = 54.25 MHz 80 dBµ CW (Mixed signal)  
f0 = 58.75 MHz 87.5%  
12  
TV modulation ten-step waveform  
Sync tip level 90 dBµ  
13  
14  
15  
f1 = 54.25 MHz 95 dBµ CW  
f1 = 54.25 MHz 75 dBµ CW  
f1 = 58.75 MHz 90 dBµ CW (Mixed signal)  
f2 = 54.25 MHz 70 dBµ CW (Mixed signal)  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
f0 = 4.5 MHz 90 dBµ FM 400 Hz ± 25 kHz dev  
f0 = 4.5 MHz FM 400 Hz ± 25 kHz dev level variable  
f0 = 4.5 MHz 90 dBµ AM 400 Hz 30%  
f0 = 4.5 MHz 90dBµ CW  
f0 = 4.5 MHz CW level variable  
f0 = 5.5 MHz 90dBµ FM 400 Hz ± 50 kHz dev  
f0 = 5.5 MHz FM 400 Hz ± 50 kHz dev level variable  
f0 = 5.5 MHz 90 dBµ AM 400 Hz 30%  
f0 = 5.5 MHz 90dBµ CW  
f0 = 5.5 MHz CW level variable  
Typical Characteristics  
Thermal Derating (Maximum Rating)  
1750  
1524  
1500  
1250  
1000  
750  
500  
250  
0
914  
–20  
0
25 50 75 100 125 150  
Ambient Temperature Ta (°C)  
Rev.2.00 Jun 14, 2006 page 10 of 18  
M52342FP  
Typical Application Example (for 38.9 MHz Split)  
VCC  
8.5 to 12 V  
ON  
OFF  
GND  
18 H  
300  
47  
10 k  
180  
22 p 47 H  
1 k  
SFE 5.5MD  
150  
VCO COIL 5531  
1 k  
82 p  
0.01 µ  
0.01 µ  
+
62  
33 µ  
10 k  
20 k  
1 p  
OFF  
ON  
100 H  
10 p  
0.47 µ  
+
220 k  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
VCO  
VCC REG  
LIM AMP  
Inter  
Split  
AFT  
QIF DET  
QIF AMP  
IF AGC  
QIF AGC  
EQ  
AMP  
VIDEO  
DET  
APC  
FM DET  
RF AGC  
VIF AMP  
AF AMP  
12  
1
2
3
4
5
6
7
8
9
10  
+
11  
0.56 H  
1 k  
0.01 µ  
2.4 k  
5.1 k  
36 k  
15 k  
+
39 k  
0.47 µ  
10 µ  
0.01 µ  
0.01 µ  
SAW  
150 k  
150 k  
0.01 µ  
220 H  
3.9 k  
910  
0.01 µ  
390  
0.01 µ  
0.33  
0.01 µ  
51  
IF IN  
33  
2200 p  
Note: In case the other components are connected to the GND area nearby the VCO coil,  
a leakage interference to them should be considered.  
Units R:   
C: F  
The bypass capacitors of 33 µF and 0.01 µF are grounded as close as possible to  
the GND pins (pin 6, 7, 8) so as to minimize the interference.  
Rev.2.00 Jun 14, 2006 page 11 of 18  
M52342FP  
Pin Description  
Pin 1 (RF AGC DELAY)  
VCC  
An applied voltage to the pin 1 is for changing a RF AGC  
delay point.  
1
Pin 2 (AFT OUT)  
Since an AFT output is provided by a high impedance  
source, the detection sensitivity can be set by an external  
resistor.  
The muting operation will be on in following two cases;  
1) the APC is out of locking,  
2) the video output becomes small enough in a weak  
electric field.  
VCC  
The maximum  
outflow current  
is 0.2 mA.  
VCC  
Tuner  
2
The maximum  
inflow current  
is 0.2 mA.  
(V2)  
(in open-loop condition)  
VCC  
2
0
(fo)  
Pin 3 (RF AGC OUT)  
A current mode output is available in the reverse AGC  
operation.  
The fluctuation of a bottom voltage is made small by  
loading higher impedance for a deep saturation.  
VCC  
(supply to a tuner)  
Tuner  
3
(supply voltage to a tuner)  
(in open-loop condition)  
VCC  
(V3)  
The maximum  
inflow current  
is 1.5 mA.  
strong  
electric field  
weak  
electric field  
0
(IF input)  
Note: Connecting a nonpolarity capacitor of 1 µF between pin1 and pin3 improves AGC operating speed.  
In that case, the capacitors between pin1/pin3 and ground should be removed.  
Pin 4, Pin 5 (VIF IN)  
Bias  
5
SAW  
1.2 k  
4
It should be designed considering careful impedance  
matching with the SAW filter.  
Terminal voltage  
: 1.45 V  
1.2 k  
Rev.2.00 Jun 14, 2006 page 12 of 18  
M52342FP  
Pin 6, Pin 7, Pin 8 (GND)  
6
7
8
They are all groung pins.  
Pin 9 (QIF DET IN)  
Terminal voltage  
: 2.4 V  
5 k  
9
SAW  
Bias  
The input impedance is 1.5 k.  
In the intercarrier system application, the intercarrier output is  
available in pin 15 by connecting pin 9 to ground.  
1.5 k  
1.5 k  
Inter  
Inter/Sprit  
Pin 10 (IF AGC FILTER)  
In spite of the 1-pin filter configuration, 2-pin filter  
characteristics are available by utilizing the dynamic AGC  
circuit.  
VCC  
(V10)  
10  
1 k  
weak  
electric field  
strong  
electric field  
0
(IF input)  
Pin 11 (NFB)  
Terminal voltage  
: 2.1 V  
The FM detector can respond to several kinds of SIF signals  
without an adjustment and external components by adopting  
the PLL technique.  
11  
It also is in compliance with the multi-SIF by selecting an  
appropriate deemphasis and audio output amplifier using the  
pin 14 switch.  
The capacitor between pin 11 and 12, which fixes the  
deemphasis characteristics, can be determined considering  
the combination of an equivalent resistance of the IC and this  
capacitor itself.  
5 k  
5 k  
+
Rev.2.00 Jun 14, 2006 page 13 of 18  
M52342FP  
Pin 12 (AUDIO OUT)  
In the 4.5 MHz application, the internal voltage gain is  
increased by 6-dB in comparison with the other applications  
and then the signals are delivered through an emitter  
follower.  
12  
Terminal voltage: 2.2 V  
Pin 13 (LIMITER IN)  
Terminal voltage: 2.2 V  
13  
Bias  
8 k  
8 k  
The input impedance is 8 k.  
Pin 14 (AFT SW/NPSW)  
It works as a switch by connecting the resistor to 5 V (High)  
or GND (Low), alternately.  
SIF 4.5 MHz : H  
: L  
Others  
VCC (5 V)  
10 k  
22 k  
Pin 14  
10k  
H
20k  
H
AF AMP  
AFT  
Applied Voltage  
4.4 to 5.0 V  
2.7 to 4.0 V  
1.0 to 2.3 V  
0 to 0.6 V  
2 k  
4.5 MHz Defeat  
4.5 MHz Normal  
14  
H
L
L
H
Other  
Other  
Defeat  
Normal  
L
L
AFT Defeat: H  
AFT ON : L  
The terminal voltage is set by the external resistors because  
of an open base input.  
Pin 15 (QIF OUT)  
Terminal voltage: 2.45 V  
In both the split and intercarrier system, the carrier signal to  
SIF provided from pin 15 through an emitter follower.  
15  
Drive current  
: 0.5 mA.  
Pin 16, Pin 17 (VCC)  
VCC  
The recommended supply voltage is 5 V or 9 to 12 V.  
In the case of 5 V supply, these pins should be tied to pin 20  
and pin 21.  
16  
+
17  
In the case of 9 to 12 V supply, a regulated output of 5 V are  
available in pin 20 and pin 21.  
Rev.2.00 Jun 14, 2006 page 14 of 18  
M52342FP  
Pin 18, Pin 19 (VCO COIL)  
850  
850  
Connecting a tuning coil and capacitor to these pins enables  
an oscillation.  
The tuning capacitor of about 30 pF is recommended.  
The oscillation frequency is tuned in f0.  
18  
19  
In the actual adjustment, the coil is tuned so that the AFT  
voltage is reached to VCC/2 with f0 as an input.  
The printed pattern around these pins should be designed  
carefully to prevent an pull-in error of VCO, caused by the  
laekage interference from the large signal level oscillator to  
adjacent pins.  
466  
466  
The interconnection also should be designed as short as  
possible.  
Pin 20, Pin 21 (Vreg. OUT)  
21  
20  
+
It is a regulated 5 V output which has current drive capability  
of approximately 15 mA.  
12.1 k  
3.8 k  
Pin 22 (VIDEO OUT)  
An output amplitude is positive 2 VP-P in the case of 87.5%  
video modulation.  
22  
Internal driving current: 3 mA  
1.1 VO-P  
Rev.2.00 Jun 14, 2006 page 15 of 18  
M52342FP  
Pin 23 (APC FILTER)  
In the locked state, the cut-off frequency of the filter is  
adjusted effectively by an external resistor so that it will be in  
the range of around 30 to 200 kHz.  
In case the cut-off frequency is lower, the pull-in speed  
becomes slow. On the other hand, a higher cut-off frequency  
widen the pull-in range and band width, which results in a  
degradation in the S/N ratio. So, in the actual TV system  
design, the appropriate constant should be chosen for getting  
desirable performance considering above conditions.  
Bias  
23  
+
(V23)  
(Pin 23 output)  
3.4 VO-P  
(FM mod. frequency)  
100 kHz  
fo  
(IF input frequency)  
In the application, an offset between AFT center frequency and VCO free-running frequency, can be improved by  
connecting a 220 kresistor to VCC supply (pin 21).  
A buzz noise also decreases by connecting a capacitor from  
23  
21  
pin 23 to VCC (pin 21) or GND. This effect utilizes the signal  
interference on the printed circuit board. So, the  
determination that which connection is effective, to VCC or  
GND, is done by a cut and try method.  
The capacitor of less than 680 pF, which depends on Q of  
VCO coil, is recommended to prevent an APC pull-in range  
from narrowing.  
220 k  
C
+
Taking it into consideration in the actual TV set design.  
Rev.2.00 Jun 14, 2006 page 16 of 18  
M52342FP  
Pin 24 (EQ F/B)  
Both the external coil and capacitor determine the frequency  
response of EQ output.  
The series connected resistor is for damping.  
16.8 k  
24  
+
500  
3.1 k  
3.9 k  
1.1 VO-P  
In the intercarrier system, the following phenomenon should be considered;  
a strong equalization (EQ) enlarge the sound carrier output from pin 22, because the EQ is applied before an audio trap.  
In that case, the next two solutions are recommended;  
decrease in S level of SAW, avoiding to peak a sound carrier in EQ.  
Video  
Det.  
+
3.1 k  
3.17 k  
500  
3.75 mA  
22  
Video output  
Circuit Diagram of EQ Amp.  
24  
Rev.2.00 Jun 14, 2006 page 17 of 18  
M52342FP  
Package Dimensions  
JEITA Package Code  
RENESAS Code  
Previous Code  
24P2Q-A  
MASS[Typ.]  
0.2g  
P-SSOP24-5.3x10.1-0.80  
PRSP0024GA-A  
24  
13  
NOTE)  
1. DIMENSIONS "*1" AND "*2"  
F
DO NOT INCLUDE MOLD FLASH.  
2. DIMENSION "*3" DOES NOT  
INCLUDE TRIM OFFSET.  
1
12  
Index mark  
Dimension in Millimeters  
Reference  
Symbol  
c
A2  
A1  
*2  
D
Min Nom Max  
D
E
10.0 10.1 10.2  
5.2 5.3 5.4  
A2  
A
1.8  
2.1  
0.1 0.2  
A1  
bp  
c
0
0.3  
0.18  
0°  
0.35 0.45  
*3  
0.25  
8°  
0.2  
bp  
e
y
HE  
e
7.5 7.8 8.1  
Detail F  
0.65  
0.95  
0.10  
0.8  
y
L
0.4 0.6 0.8  
Rev.2.00 Jun 14, 2006 page 18 of 18  
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Colophon .6.0  

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