M52342SP_技术文档

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

DESCRIPTION

PIN CONFIGURATION (TOP VIEW)

The M52342SP is IF signal-processing IC for VCRs and TVs. It

enable the PLL detection system despite size as small as that of

conventional quasi-synchronous VIF/SIF detector, IF/RF AGC, SIF

limiter, FM detector, QIF AGC and EQ AMP.

RF AGC DELAY

AFT OUT

RF AGC OUT

VIF IN

EQ F/B

1

2

20

19

APC FILTER

3

18 VIDEO OUT

17 Vreg. OUT

FEATURES

4

• ^{Video detection output is 2V}P-P. It has built-in EQ AMP.

• ^{The package is a 20-pin shrink-DIP, suitable for space saving.}

5

16

VIF IN

VCO COIL

• ^{The video detector uses PLL for full synchronous detection}

circuit. It produces excellent characteristics of DG, DP, 920kHz

beat, and cross color.

GND

VCO COIL

Vcc

6

15

14

13

12

QIF DET IN

IF AGC FILTER

NFB

7

• ^{Dynamic AGC realizes high speed response with only single}

QIF OUT

AFT SW/NPSW

8

ﬁlter.

9

• ^{Video IF and sound IF signal processings are separated from}

each other. VCO output is used to obtain intercarrier. This PLL-

SPLIT method and built-in QIF AGC provide good sound

sensitivity and reduces buzz.

10

11 LIMITER IN

AUDIO OUT

Outline 20P2N-A

• ^{As AFT output voltage uses the APC output voltage, VCO coil is}

not used.

• ^{Audio FM demodulation uses PLL system, so it has wide}

frequency range with no external parts and no adjustment.

APPLICATION

TV sets, VCR tuners

RECOMMENDED OPERATING CONDITION

In case of VCC and Vreg. out short

Supply voltage range....................................................4.75 to 5.25V

Recommended supply voltage...................................................5.0V

Incase of Vreg. out open

Supply voltage range......................................................8.5 to 12.5V

BLOCK DIAGRAM

APC FILTER

Vreg. OUT

17

VCO COIL

15

QIF OUT

LIMITER IN

EQ F/B

20

VIDEO OUT

VCO COIL

16

Vcc

14

AFT SW/NPSW

19

18

13

12

11

Vcc REG

VCO

LIM AMP

Inter

Split

AFT

QIF DET

EQ

AMP

VIDEO

DET

QIF AGC

APC

FM DET

AF AMP

QIF AMP

IF AGC

8

RF AGC

VIF AMP

10

1

2

3

4

5

6

7

9

RF AGC DELAY

RF AGC OUT

VIF IN

QIF DET IN

NFB

AFT OUT

VIF IN

GND

IF AGC FILTER

AUDIO OUT

1

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

ABSOLUTE MAXIMUM RATINGS (Ta=25°C, surge protection capacitance 200pF resistance 0Ω, unless otherwise noted)

Symbol

VCC

Parameter

Supply voltage1

Condition

Ratings

13.2

Unit

V

VCC and Vreg. out is not connected to each

other.

Vreg.

OUT

VCC and Vreg. out is not connected to each

other.

Supply voltage Vreg. OUT

6.0

V

Pd

Power dissipation

1524

-20 to +75

-40 to +150

±200

mW

°C

V

Topr

Tstg

Surge

Operating temperature

Storage temperature

Surge voltage resistance

AMBIENT OPERATING CONDITION (Ta=25°C, unless otherwise noted)

Recommended supply

Supply voltage

Supply voltage range

4.75 to 5.25V

voltage

In case of VCC and

Vreg. out short

5.0V

In case of Vreg. out

open

8.5 to 12.5V

−

ELECTRICAL CHARACTERISTICS (VCC=5V, Ta=25°C, unless otherwise noted)

Measurement condition

Limits

Typ.

Test

Input Input

SG

External

power supply

switches set to

position 1 unless

otherwise indicated

Symbol

Parameter

Unit

circuit point point

V12

V7 V8

Min.

Max.

VIF section

Circuit current1

VCC=5V

SW17=1, SW14=2

ICC1

1

A

VIF IN SG1

−

5

33

46

59

mA

V

VCC=12V

SW14=SW17=2

Circuit current2

VCC=12V

ICC2

VCC=12V

SW7=2

VCC2

Vreg voltage

TP17

−

4.60

4.95

5.30

V18

Video output DC voltage

Video output voltage

Video S/N

1

TP18A

−

0

−

SW8=2

3.2

1.8

51

7.0

−

3.5

2.1

56

3.8

2.4

−

V

Vo det

Video S/N

BW

TP18A VIF IN SG1

TP18B VIF IN SG2

TP18A VIF IN SG3

TP18A VIF IN SG4

VP-P

dB

SW18=2

SW8=2

Vari

able

Video band width

Input sensitivity

9.0

48

−

MHz

dBµ

VIN MIN

−

52

Maximum allowable

input

VIN MAX

1

TP18A VIF IN SG5

−

101

105

−

dBµ

−

GR

V8

AGC control range input

IF AGC voltage

−

50

57

−

dB

V

1

TP8 VIF IN SG6

2.9

3.2

3.5

Maximum IF AGC

voltage

−

V8H

V8L

1

TP8

−

4.0

2.2

4.4

2.4

−

V

Minimum IF AGC

voltage

TP8 VIF IN SG7

TP3 VIF IN SG6

2.6

4.2

8.0

11.0

−

4.7

8.9

−

Maximum RF AGC

voltage

V3H

1

−

(VCC=9V)

−

V

(VCC=12V)

11.9

0.1

−

0.5

0.7

Minimum RF AGC

voltage

V3L

V3

1

TP3 VIF IN SG7

TP3 VIF IN SG8

−

(VCC=9V)

−

0.2

V

(VCC=12V)

−

0.2

RF AGC operation

voltage

89

92

95

dBµ

CL-U

CL-L

CL-T

µ

Capture range U

Capture range L

Capture range T

AFT sensitivity

1

TP18A VIF IN SG9

−

1.0

1.8

3.1

20

1.7

2.4

4.1

30

−

MHz

−

TP2 VIF IN SG10

3.3

60 mV/kHz

2

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

ELECTRICAL CHARACTERISTICS (cont.)

Measurement condition

Limits

Test

Input Input

SG

External

switches set to

position 1 unless

otherwise indicated

Symbol

Parameter

Unit

power supply

circuit point point

V12

V7 V8

Min.

3.85

7.7

10.7

−

Typ.

4.15

8.1

11.1

0.7

2.5

4.5

6.0

2.5

4.5

6.0

40

Max.

−

V2H

V2L

AFT maximum voltage

AFT minimum voltage

1

TP2 VIF IN SG10

−

3.3 (VCC=9V)

−

V

(VCC=12V)

−

1.2

2.8

4.9

6.5

2.8

4.9

6.5

−

3.3 (VCC=9V)

(VCC=12V)

−

2.2

4.1

5.5

2.2

4.1

5.5

35

−

1.65

AFT def1 AFT defeat 1

AFT def2 AFT defeat 2

(VCC=9V)

(VCC=12V)

4.6 (VCC=9V)

(VCC=12V)

Vari

able

−

SW8=2

IM

Inter modulation

Differential gain

Differential phase

1

TP18A VIF IN SG11

TP18A VIF IN SG12

dB

%

DG

DP

−

2

5

−

2

5

deg

V18

SYNC

Sync. tip level

1

TP18A VIF IN SG2

−

0.85

1.15

1.45

V

RINV

VIF input resister

2

TP4

−

1.2

5

−

kΩ

CINV

VIF input capacitance

pF

SIF section

VIF IN SG2

TP13

QIF1

QIF2

QIF output 1

QIF output 2

1

−

94

100

106

dBµ

QIF IN SG13

VIF IN SG2

TP13

QIF IN SG14

Vos

SIF detection output

AF output DC voltage

AF output (4.5MHz)

AF output (5.5MHz)

1

TP13 VIF IN SG15

TP10 SIF IN SG20

TP10 SIF IN SG16

TP10 SIF IN SG21

0

−

5

0

SW7=2

94

1.6

100

2.2

106

2.8

dBµ

V1

V

VoAF1

VoAF2

320

255

560

450

800 mVrms

645 mVrms

AF output distortion

(4.5MHz)

THD AF1

THD AF2

LIM1

1

TP10 SIF IN SG16

TP10 SIF IN SG21

−

5

0

5

0

−

0.2

42

0.9

55

%

AF output distortion

(5.5MHz)

SG17

TP10 SIF IN

SG19

Limiting sensitivity

(4.5MHz)

dBµ

SG22

TP10 SIF IN

SG24

Limiting sensitivity

(5.5MHz)

LIM2

42

55

AMR1

AMR2

AM rejection (4.5MHz)

AM rejection (5.5MHz)

1

2

TP10 SIF IN SG18

TP10 SIF IN SG23

TP10 SIF IN SG20

TP10 SIF IN SG25

TP7

−

5

0

5

0

55

−

62

64

62

64

1.5

4

−

dB

kΩ

pF

AF S/N 1 AF S/N (4.5MHz)

AF S/N 2 AF S/N (5.5MHz)

RINS

CINS

SIF input resistance

SIF input capacitance

TP7

−

Control section

Vari

able

SW7=2

CQIF

QIF control

1

TP7

−

0.7

1.0

V

PIN12 VOLTAGE CONTROL

Pin12 voltage (V)

AF

AFT

0 to 0.6

0 to 2.3

NORMAL

DEFEAT

NORMAL

DEFEAT

PAL

1.0 to 2.3

2.7 to 4.0

2.7 to 5.0

NTSC

4.4 to 5.0

3

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

ELECTRICAL CHARACTERISTICS TEST METHOD

V3 RF AGC operating voltage

Input SG8 into VIF IN, and gradually reduce Vi and then measure

the input level when RF AGC output TP3 reaches 1/2 VCC, as

shown below.

Video S/N

Input SG2 into VIF IN and measure the video out (Pin 18) noise in

r.m.s at TP18B through a 5MHz (-3dB) L.P.F.

TP3

Voltage

0.7×Vo det

(dB)

S/N=20 log

NOISE

V^3H

BW Video band width

1. Measure the 1MHz component level of EQ output TP18A with a

spectrum analyzer when SG3 (f2=57.75MHz) is input into VIF

IN. At that time, measure the voltage at TP8 with SW8, set to

position 2, and then ﬁx V8 at that voltage.

1/2VCC

2. Reduce f2 and measure the value of (f2-f0) when the (f2-f0)

component level reaches -3dB from the 1MHz component level

as shown below.

V^3L

Vi

Vi (dBµ)

TP18

CL-U Capture range

1. Increase the frequency of SG9 until the VCO is out of locked-

oscillation.

2. Decrease the frequency of SG9 and measure the frequency fU

when the VCO locks.

-3dB

CL-U=fU-58.75 (MHz)

CL-L Capture range

1. Decrease the frequency of SG9 until the VCO is out of locked-

oscillation.

( f2 - f0 )

2. Increase the frequency of SG9 and measure the frequency fL

when the VCO locks.

1MHz

BW

CL-L=58.75-fL (MHz)

VIN MIN Input sensitivity

Input SG4 (Vi=90dBµ) into VIF IN, and then gradually reduce Vi and

measure the input level when the 20kHz component of EQ output

TP18A reaches -3dB from Vo det level.

CL-T Capture range

CL-T=CL-U+CL-L (MHz)

µ AFT sensitivity,V2H Maximum AFT voltage,V2L Minimum AFT

VIN MAX Maximum allowable input

voltage

1. Input SG5 (Vi=90dBµ) into VIF IN, and measure the level of the

1. Input SG10 into VIF IN , and set the frequency of SG10 so that

20kHz component of EQ output.

the voltage of AFT output TP2 is 3V. This frequency is named

f(3).

2. Gradually increase the Vi of SG and measure the input level

when the output reaches -3dB.

2. Set the frequency of SG10 so that the AFT output voltage is 2V.

This frequency is named f (2)

GR AGC control range

GR=VIN MAX-VIN MIN (dB)

4

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

3. IN the graph, maximum and minimum DC voltage are V2H and

V2L, respectively.

AF S/N

1. Input SG20 (SG25) into SIF input, and measure the output noise

level of AF output TP1. This level is named VN.

2. S/N is;

TP2

Voltage

VoAF (mVr.m.s)

(dB)

S/N=20log

3V

VN (mVr.m.s)

CQIF QIF control

V2H

Lower the voltage of V7, and measure the voltage of V7 when DC

voltage of TP13 begins to change.

2V

THE NOTE IN THE SYSTEM SETUP

V2L

M52342SP has 2 power supply pins of Vcc (pin 14) and Vreg. OUT

(pin 17). Pin 14 is for AFT output, RF AGC output circuits and 5V

regulated power circuit and Pin 17 is for the other circuit blocks.

In case M52342SP is used together with other ICs like VIF

operating at more than 5V, the same supply voltage as that of

connected ICs is applied to VCC and Vreg. Out is opened. The other

circuit blocks, connected to Vreg. OUT are powered by internal 5V

regulated power supply.

f (3)

f (2)

f (MHz)

1000 (mV)

µ =

(mV/kHz)

f (2) - f (3) (kHz)

IM Intermodulation

1. Input SG11 into VIF IN, and measure EQ output TP18A with an

oscilloscope.

In case the connecting ICs are operated at 5V, 5V is supplied to

both VCC and Vreg.OUT.

2. Adjust AGC ﬁlter voltage V8 so that the minimum DC level of the

output waveform is 1.0V.

3. At this time, measure, TP18A with a spectrum analyzer.

The intermodulation is deﬁned as a difference between 920kHz

and 3.58MHz frequency components.

LOGIC TABLE

AF

AFT

20k “H”

20k “L”

20k “H”

20k “L”

DEFEAT

NORMAL

DEFEAT

NORMAL

10k “H”

10k “L”

NTSC

LIM Limiting sensitivity

1. Input SG17 (SG22) into SIF input, and measure the 400Hz

PAL

component level of AF output TP10.

2. Input SG19 (SG24) into SIF input, and measure the 400Hz

component level of AF output TP10.

3. The input limiting sensitivity is deﬁned as the input level when a

difference between each 400Hz components of audio output

(TP10) is 30dB, as shown below.

Audio output

Audio output while

(mVrms)

SG17 (SG22) is input

30dB

Audio output while

SG19 (SG24) is input

SIF input

(dBµ)

AMR AM Rejection

1. Input SG18 (SG23) into SIF input, and measure the output level

of AF output TP10. This level is named VAM.

2. AMR is;

VoAF (mVr.m.s)

(dB)

AMR=20log

VAM (mVr.m.s)

5

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

INPUT SIGNAL

TYPICAL CHARACTERISTICS

SG No.

Signals (50Ω termination)

THERMAL DERATING (MAXIMUM RATING)

1750

1

2

f0=58.75MHz AM20kHz 77.8% 90dBµ

f0=58.75MHz 90dBµ CW

1524

1500

f1=58.75MHz 90dBµ CW (Mixed signal)

f2=Frequency variable 70dBµ CW (Mixed signal)

3

1250

1000

750

500

250

0

4

5

f0=58.75MHz AM20kHz 77.8% level variable

f0=58.75MHz AM20kHz 14.0% level variable

f0=58.75MHz 80dBµ CW

914

6

7

f0=58.75MHz 110dBµ CW

8

f0=58.75MHz CW level variable

f0=Variable AM20kHz 77.8% 90dBµ

f0=Variable 90dBµ CW

9

10

f1=58.75MHz 90dBµ CW (Mixed signal)

f2=55.17MHz 80dBµ CW (Mixed signal)

f3=54.25MHz 80dBµ CW (Mixed signal)

11

12

-20

0

25

50

75 100 125 150

f0=58.75MHz 87.5%

TV modulation ten-step waveform

Sync tip level 90dBµ

AMBIENT TEMPERATURE Ta (°C)

13

14

f1=54.25MHz 95dBµ CW

f1=54.25MHz 75dBµ CW

f1=58.75MHz 90dBµ CW (Mixed signal)

f2=54.25MHz 70dBµ CW (Mixed signal)

15

16

17

18

19

20

21

22

23

24

25

f0=4.5MHz 90dBµ FM400Hz±25kHz dev

f0=4.5MHz FM400Hz±25kHz dev level variable

f0=4.5MHz 90dBµ AM400Hz 30%

f0=4.5MHz CW level variable

f0=4.5MHz 90dBµ CW

f0=5.5MHz 90dBµ FM400Hz±50kHz dev

f0=5.5MHz FM400Hz±50kHz dev level variable

f0=5.5MHz 90dBµ AM400Hz 30%

f0=5.5MHz CW level variable

f0=5.5MHz 90dBµ CW

6

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

APPLICATION EXAMPLE 1

1

SW14

V^CC

A

1

2

TP18B

SW17

L

P

F

TP18A

2

SW18

1

SIF IN

2

made by Toko

5549

62

33µ

51

V12

0.47µ

TP13

13

TP12

0.01µ

390k

82p

15

14

12

11

20

19

18

17

16

Vcc REG

VCO

LIM AMP

Inter

Split

AFT

QIF DET

EQ

AMP

VIDEO

DET

QIF AGC

APC

FM DET

QIF AMP

IF AGC

8

RF AGC

VIF AMP

AF AMP

10

1

2

3

4

5

6

7

9

2.4k

10µ

SW8

7.5k

TP10

TP1

TP3

TP7

TP8

30k

20k

1:1

39k

0.47µ

SW7

1

0.01µ

2

1

V^CC

V7

51

V8

150k

51

TP2

VIF IN

Units Resistance : Ω

Capacitors without an assignment are 0.01µF.

The Measuring Circuit 1 is Mitsubishi standard evaluation fixture.

Capacitance : F

7

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

APPLICATION EXAMPLE 2

20

19

18

17

16

15

14

13

12

11

Vcc REG

VCO

LIM AMP

Inter

Split

AFT

QIF DET

EQ

AMP

VIDEO

DET

QIF AGC

APC

FM DET

QIF AMP

IF AGC

RF AGC

VIF AMP

TP4

AF AMP

10

1

2

3

4

5

6

7

8

9

TP7

HI

RX

meter

RX

meter

LO

All capacitor is 0.01µF, unless otherwise specified.

8

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

Pin 1 (RF AGC DELAY)

An applied voltage to the pin1 is for changing a RF AGC delay point.

VCC

In the 3-in-1 type application, the regulated output from the regulator is

suitable for a power supply (Vcc) to it, because there may be difference

between the tuner and main board supply.

1

TV tuner, VIF demodulator and RF modulator are togetherin one package.

Pin 2 (AFT OUTPUT)

Since an AFT output is provided by a high impedance source, the detection

sensitivity can be set by an external resistor.

The muting operation will be on in following two cases;

VCC (supply to a tuner)

1) the APC is out of locking,

2) the video output becomes small enough in a weak

electric field.

The maximum

outflow current

is 0.2 mA.

2

Tuner

The maximum

inflow current

is 0.2 mA.

Vcc

[V2]

(in open-loop condition)

Vcc

2

0

[fo]

Pin 3 (RF AGC OUTPUT)

A current mode output is available in the reverse AGC operation.

The fluctuation of a bottom voltage is made small by loading higher impedance for

a deep saturation.

VCC (supply to a tuner)

VCC

(supply voltage to a tuner)

3

Tuner

(in open-loop condition)

[V3]

The maximum

inflow current

is 0.2 mA.

strong

electric field

weak

electric field

0

[IF input]

Note: Connecting a nonpolarity capacitor of 1µF between pin1 and pin 3 improves AGC operating speed.

In that case, the capacitors between pin1/pin3 and ground should be removed.

9

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

Pin 4, Pin 5 (VIF INPUT)

It should be designed considering careful impedance matching with the

SAW filter.

Bias

5

4

SAW

1.2kΩ

terminal voltage : 1.45V

Pin 6 (GND)

6

It is GND pin (only one GND pin in this IC).

Pin 7 (QIF INPUT, INTER SW)

terminal voltage : 2.4V

SAW

5kΩ

7

Bias

The input impedance is 1.5kΩ.

In the intercarrier system application, the intercarrier output is available

in pin 13 by connecting pin 7 to ground.

1.5kΩ

Inter

Inter/Split

Pin 7 (QIF INPUT, INTER SW)

V^CC

In spite of the 1-pin filter configuration, 2-pin filter

characteristics are available by utilizing the dynamic AGC circuit.

[V8]

8

1kΩ

weak

strong

electric field

0

[IF input]

10

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

Pin 9 (AUDIO F/B)

terminal voltage : 2.1V

9

The FM detector can respond to several kinds of SIF signals without an

adjustment and external components by adopting the PLL technique.

It also is in compliance with the multi-SIF by selecting an appropriate

deemphasis and audio output amplifier using the pin12 switch.

The capacitor between pin 9 and 10, which fixes the deemphasis

characteristics, can be determined considering the combination of an

equivalent resistance of the IC and this capacitor itself.

5kΩ

Pin 10 (AF OUTPUT)

In the 4.5MHz application, the internal voltage gain is increased by 6-dB in

comparison with the other applications and then the signals are delivered

through an emitter follower.

10

terminal voltage : 2.2V

Pin 11 (LIMITER INPUT)

Bias

11

The input impedance is 8kΩ.

8kΩ

Pin 12 (AFT SW, NP SW)

It works as a switch by connecting the resistor to 5V(High)

of GND(Low), alternately.

SIF4.5MHz : H

Others : L

V^CC(5V)

10kΩ

Pin 12

applied voltage

10kΩ

20kΩ AF AMP

AFT

2kΩ

12

4.5MHz DEFFET

4.5MHz NORMAL

OTHER DEFFET

OTHER NORMAL

4.4 to 5.0V

2.7 to 4.0V

1.0 to 2.3V

0 to 0.6V

H

L

H

L

22kΩ

H

L

AFT Defeat :H

AFT ON :L

L

The terminal voltage is set by the external resistors

because of an open base input.

11

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

Pin 13 (QIF OUTPUT / INTER OUTPUT)

terminal voltage : 2.45V

In both the split and intercarrier system, the carrier signal

13

to SIF provided from pin 15 through an emitter follower.

driving current

: 0.5mA

Pin 14 (VCC)

VCC

The recommended supply voltage is 5V or 9 to 12V.

In the case of 5V supply, it should be tied to pin 17.

In the case of 9 to 12V supply, a regulated output of 5V

are available in pin 17.

14

Pin 15, Pin 16 (VCO COIL)

Connecting a tuning coil and capacitor to these pins enables

an oscillation.

850Ω

15

16

The tuning capacitor of about 30pF is recommended.

The oscillation frequency is tuned in f0.

In the actual adjustment, the coil is tuned so that the AFT

voltage is reached to Vcc/2 with f0 as an input.

The printed pattern around these pins should be designed

carefully to prevent an pull-in error of VCO, caused by the leakage

interference from the large signal level oscillator to adjacent pins.

The interconnection should be designed as short as possible.

In case the printed pattern has the interference problem, a capacitor

of about 1pF is connected between pin 15 or 16 and GND so as to

466Ω

cancel the interference and keep enough pull-in range even

in a weak electric field.

Pin 17 (REG. OUTPUT)

17

It is a regulated 5V output which has current drive

capability of approximately 15 mA.

12.1kΩ

3.8kΩ

12

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

Pin 18 (VIDEO OUTPUT)

An output amplitude is positive 2Vp-p in the case of 87.5%

video modulation.

18

internal

driving current : 3mA

1.1VO-P

Pin 19 (APC FILTER)

In the locked state, the cut-off frequency of the filter is

adjusted effectively by an external resistor so that it will be

in the range of around 30 to 200kHz.

In case the cut-off frequency is lower, the pull-in speed

becomes slow. On the other hand, a higher cut-off frequency

widen the pull-in range and band width, which results

in a degradation in the S/N ratio. So, in the actual TV system

design, the appropriate constant should be chosen for getting

desirable performance considering above conditions.

19

Bias

12kΩ

[V19]

[Pin 19 output]

3.4V^O-P

[FM mod. frequency]

fo

[IF input frequency]

100kHz

Pin 20 (EQ F/B)

Both the external coil and capacitor determine the

frequency response of EQ output.

The series connected resistor is for damping.

16.8kΩ

20

500Ω

3.1kΩ

3.9kΩ

1.1VO-P

13

MITSUBISHI ICs (TV)

M52342SP

PLL-SPLIT VIF/SIF IC

FM DET

VCO

5kΩ

+

-

11

10

9

limiter input

F/B Filter

Audio output

The input intercarrier signal from pin 11 is applied to the FM detector after amplifying in the limiting ampliﬁers.

A quadrature demodulation is done between a VCO output generated internally and an intercarrier signal, and then the detector output is

returned to the VCO through the LPF.

These functional blocks, the FM detector, LPF and VCO, form the PLL circuit so that the VCO frequency is locked to the intercarrier signal.

The LPF output is available in pin 10 after passing through the AF ampliﬁer.

14


型号：	M52342SP
厂家：	Mitsubishi Group
描述：	PLL-SPLIT VIF/SIF IC PLL - SPLIT VIF / SIF IC 消费电路商用集成电路接收器集成电路光电二极管
文件：	总14页 (文件大小：99K)
中文：	中文翻译
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M52342SP [MITSUBISHI]

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