ISL59830AIA_技术文档

ISL59830A

®

Data Sheet

May 4, 2006

FN6233.2

PRELIMINARY

True Single Supply Video Driver With

Power Down

Features

• Triple single-supply buffer

The ISL59830A is a revolutionary device that allows true

single-supply operation of video amplifiers. The device runs

off a single 3.3V supply and generates the required negative

voltage internally. This allows for DC-accurate coupling of

video onto a 75Ω double-terminated line. Since the buffers

have an integrated 6dB gain, the only external components

required are the 75Ω termination resistors. An input reference

voltage can be supplied to shift the analog video level down

by an amount equal to the reference (typically 0.6V).

• Operates from single +3.3V supply

• No output DC blocking capacitor needed

• Fixed gain of 2 output buffer

• Output three-statable

• Enable/disable function

• Charge pump power down function

• 50MHz 0.1dB bandwidth

Ordering Information

• 200MHz -3dB bandwidth

TAPE &

REEL

PKG.

DWG. #

• Pb-free plus anneal available (RoHS compliant)

PART NUMBER

ISL59830AIA

PACKAGE

16 Ld QSOP

-

13”

-

M16.15A

Applications

ISL59830AIA-T13

• Driving video

ISL59830AIAZ

(See Note)

16 Ld QSOP

(Pb-Free)

Pinout

ISL59830A

(16 LD QSOP)

TOP VIEW

ISL59830AIAZ-T13

(See Note)

13”

16 Ld QSOP

(Pb-Free)

M16.15A

NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100%

matte tin plate termination finish, which are RoHS compliant and

compatible with both SnPb and Pb-free soldering operations. Intersil

Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

RIN

GIN

1

2

3

4

5

6

7

8

16 ROUT

15 GOUT

14 BOUT

13 VCC

12 EN

BIN

REF

VEE

GND

11 VCC

10 PD

VEEOUT

DGND

9

DVCC

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

ISL59830A

Absolute Maximum Ratings (T = 25°C)

A

V

, Supply Voltage between V and GND5V

Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C

Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Lead Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves

CC

, V

S

. . . . . . . . . . . . . . . . . . . . . . . . . . . .VCC+0.3V, VEE-0.3V

IN REF

Voltage between V and V

. . . . . . . . . . . . . . . . . . . . . . . . . .±2V

IN

REF

Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests

are at the specified temperature and are pulsed tests, therefore: T = T = T

A

J

C

AC Electrical Specifications

V

= DV

= +3.3V, REF = GND, T = 25°C, R = 150Ω, unless otherwise specified.

CC A L

CC

DESCRIPTION

3dB Bandwidth

PARAMETER

CONDITIONS

= 200mV

MIN

TYP

200

100

50

MAX

UNIT

MHz

V/µs

%

BW -3dB

V

OUT

PP

= 2V

PP

BW 0.1dB

0.1dB Bandwidth

Slew Rate

S

500

R

G

P

d

Differential Gain

Differential Phase

Hostile Crosstalk

Input to Output Isolation

Input Noise Voltage

.06

0.1

-90

-70

20

°

X

I

6MHz

dB

T

dB

V

nV/√Hz

MHz

mV

N

CSW Freq

Load Reg

Charge Pump Switch Frequency

168

12

I

= 0mA to 10mA

60

EE

V

Ripple Voltage

30

mV

RIPPLE

DC Electrical Specifications

V

= D = +3.3V, REF = GND, T = 25°C, R = 150Ω, unless otherwise specified.

VCC A L

CC

PARAMETER

V+

DESCRIPTION

CONDITIONS

MIN

TYP

MAX

3.6

UNIT

V

Supply Range

Gain Error

3.0

V %

G

R

= 150Ω, V = +2.5V to -1V

1.5

%

L

IN

GM

Gain Matching

= 150Ω

0.5

1.7

7

%

L

R

Input Resistance

Output Offset Voltage

Output Current

V

= 0V to 1.5V

1.0

-25

50

15

MΩ

mV

mA

Ω

IN

V

= 0

+25

OS

REF

I

R

= 10Ω, V = 1.2V

IN

OUT +

OUT -

L

Output Current

= 10Ω, V = -0.3V

IN

-18

Z

Output Impedance

Enabled

1

OUT

Three-stated

10

90

MΩ

dB

mA

kΩ

PSRR

Power Supply Rejection Ratio

Supply Current

60

4

I

Enabled

150

6

S

Power Down Supply Current

Input Reference Resistor

EN = PD = 3.3V

0.9

5

S_PD

R

REF

FN6233.2

May 4, 2006

2

ISL59830A

Pin Descriptions

PIN NUMBER

PIN NAME

PIN FUNCTION

EQUIVALENT CIRCUIT

1

RIN

Analog input

V

CC

V

EE

CIRCUIT 1

2

3

4

GIN

BIN

Analog input

Reference input

Reference Circuit 1

REF

R

IN

V

CC

R

G

B

OUT

G

B

+

-

3

REF

V

EE

CIRCUIT 2

5

VEE

Chip substrate

V

CC

V

EE OUT

-

+

D

VCC

V

EE

CHARGE

PUMP

D

GND

CIRCUIT 3

6

7

GND

VEE OUT

DGND

DVCC

PD

Analog ground

Charge pump output

Charge pump ground

Charge pump supply voltage

Charge pump enable

Positive power supply

Chip enable

Reference Circuit 3

Reference Circuit 4

8

9

10

11, 13

12

VCC

EN

V

CC

V

EE

CIRCUIT 4

FN6233.2

May 4, 2006

3

ISL59830A

Pin Descriptions (Continued)

PIN NUMBER

PIN NAME

PIN FUNCTION

EQUIVALENT CIRCUIT

14

BOUT

Analog output

V

CC

V

EE

CIRCUIT 5

15

16

GOUT

ROUT

Analog output

Reference Circuit 5

Typical Performance Curves

3

5

A =+2

V

L

V

9pF

C =0pF

R =500Ω

L

2

1

4.7pF

2.2pF

3

1

1kΩ

0

500Ω

0pF

-1

-3

-5

-1

-2

-3

150Ω

75Ω

1M

10M

100M

1G

100K

1M

10M

100M

1G

FREQUENCY (Hz)

FIGURE 1. GAIN vs FREQUENCY FOR VARIOUS R

FIGURE 2. GAIN vs FREQUENCY FOR VARIOUS C

LOAD

5

300

A =+2

V

A =+2

V

L

C =0pF

R =500Ω

0

-5

L

-3dB ROLL-OFF

R =500Ω

L

240

180

120

60

-10

-15

-20

-25

-30

-35

-0.1dB ROLL-OFF

0

2.25

1

100

200

300

400

500

2.8

3.35

3.9

4.45

5

FREQUENCY (MHz)

SUPPLY VOLTAGE (V)

FIGURE 3. V

PIN OUTPUT FREQUENCY RESPONSE

FIGURE 4. GAIN ROLL-OFF vs FREQUENCY

REF

FN6233.2

May 4, 2006

4

ISL59830A

Typical Performance Curves (Continued)

-30

-20

-30

-40

-50

-60

-70

-80

-90

-100

A =+2

V

L

A =+2

V

L

-40

-50

R =500Ω

-60

ENABLED

-70

ENABLED

-80

DISABLED

-90

DISABLED

100M

-100

-110

-120

100K

1M

10M

FREQUENCY (Hz)

100M

1G

100K

1M

10M

1G

FREQUENCY (Hz)

FIGURE 5. CROSS TALK CHANNEL TO CHANNEL (TYPICAL)

FIGURE 6. INPUT TO OUTPUT ISOLATION vs FREQUENCY

120

200

A =+2

V

-3dB

R =500Ω

L

100

80

60

40

20

0

160

A =+2

V

R =500Ω

L

120

80

40

0

-0.1dB

68

1

1.5

2

2.5

3

3.5

27

47.5

88.5

109

129.5

150

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

FIGURE 7. SUPPLY CURRENT vs SUPPLY VOLTAGE

FIGURE 8. BANDWIDTH vs TEMPERATURE

95

100

10

A =+2

V

R =500Ω

L

90

85

80

75

1

0.1

0.01

27

55.6

84.2

112.8

141.4

170

10K

100K

1M

10M

100M

TEMPERATURE (°C)

FREQUENCY (Hz)

FIGURE 9. SUPPLY CURRENT vs TEMPERATURE

FIGURE 10. OUTPUT IMPEDANCE vs FREQUENCY

FN6233.2

May 4, 2006

5

ISL59830A

Typical Performance Curves (Continued)

-10

1K

100

10

-30

-50

e

N

PSRR-

-70

PSRR+

I +

N

1

-90

I -

N

-110

0.1

10

1K

10K

100K

1M

10M

100M

100

1K

10K

100K

1M

10M

FREQUENCY (Hz)

FIGURE 11. POWER SUPPLY REJECTION RATIO vs

FREQUENCY

FIGURE 12. VOLTAGE AND CURRENT NOISE vs FREQUENCY

-30

-40

-30

-40

THD

-50

-60

THD

F

=10MHz

-60

-70

-80

-90

IN

-70

2ND HD

3RD HD

-80

THD

=1MHz

IN

-90

F

-100

0

10

20

30

40

0.5

1

1.5

2

2.5

3

3.5

FUNDAMENTAL FREQUENCY (MHz)

OUTPUT VOLTAGE (V

FIGURE 14.

)

P-P

FIGURE 13. HARMONIC DISTORTION vs FREQUENCY

0

-0.02

-0.04

-0.06

-0.08

0

-0.02

-0.04

-0.06

-0.08

IRE

FIGURE 15. DIFFERENTIAL GAIN

FIGURE 16. DIFFERENTIAL PHASE

FN6233.2

May 4, 2006

6

ISL59830A

Typical Performance Curves (Continued)

TIME (200ns/DIV)

FIGURE 17. DISABLE TIME

FIGURE 18. ENABLE TIME

TIME (10ns/DIV)

FIGURE 19. SMALL SIGNAL RISE & FALL TIME

FIGURE 20. LARGE SIGNAL RISE & FALL TIMES

3.25

3

2.75

A =+2

V

C =3.9pF

L

2.5

50

250

450

650

850

1050

TIME (20ns/DIV)

LOAD RESISTANCE (Ω)

FIGURE 21. CHARGE PUMP OSCILLATION

FIGURE 22. MAXIMUM OUTPUT MAGNITUDE vs LOAD

RESISTANCE

FN6233.2

May 4, 2006

7

ISL59830A

Typical Performance Curves (Continued)

1.6

1.2

0.8

0.4

0

BACKDRIVE ACROSS 5Ω RESISTOR

A =+2

V

TYPICAL CHANNEL

R =500Ω

L

C =3.9pF

L

1.2

0.8

0.4

0

1

2

3

4

5

2.2 2.4 2.6 2.8

3

3.2 3.4 3.6 3.8

4

BACKDRIVE VOLTAGE (V)

SUPPLY VOLTAGE (V)

FIGURE 23. BACKDRIVE VOLTAGE vs CURRENT

FIGURE 24. PEAKING vs SUPPLY VOLTAGE

JEDEC JESD51-3 LOW EFFECTIVE THERMAL

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

1.4

CONDUCTIVITY TEST BOARD

1.8

1.6

1.2

1

1.4

1.116W

1.2

791mW

0.8

1

0.8

0.6

0.4

0.2

0

0.6

0.4

0.2

0

25

50

75 85 100

125

150

0

25

50

75 85 100

125

150

AMBIENT TEMPERATURE (°C)

FIGURE 25. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

FN6233.2

May 4, 2006

8

ISL59830A

Block Diagram

V

CC

R

G

B

IN

Y

+

R

OUT

6dB

-

REFERENCE

Pb

+

G

OUT

6dB

-

Pr

+

B

OUT

6dB

-

DV

CC

V

EE-OUT

CHARGE

PUMP

V

EE

V

OUT

= 2V - V

IN

REFERENCE

Demo Board Schematic

RED_IN

R

1

75Ω

RED_OUT

R

75Ω

4

5

6

GREEN_IN

BLUE_IN

1

RIN

ROUT 16

GOUT 15

BOUT 14

VCC 13

EN 12

R

2

75Ω

2

3

4

5

6

7

8

GIN

GREEN_OUT

BLUE_OUT

BIN

V

CC

REF

R

1kΩ

C

3

0.1µF

7

4

1.0µF

R

3

75Ω

VEE

R

4

GND

VEEOUT

VCC 11

PD 10

V

CC

V

CC

2

1

3

499Ω

DISABLE

ENABLE

R

1kΩ

C

2

0.1µF

8

C

0.1µF

5

V

DGND DVCC 9

CC

REFERENCE

CONTROL

D

1

1N4148

(or similar)

Option: Panasonic 120Ω Bead

EXC3BP121H

Lower Amp output noise from charge pump

FN6233.2

May 4, 2006

9

ISL59830A

distortion, low power, and high frequency amplifier capable

of driving moderately capacitive loads with near rail-to-rail

performance.

Description of Operation and Application

Information

Theory Of Operation

Input Output Range

The ISL59830A is a highly practical and robust marriage of

three high bandwidth, high speed, low power, rail-to-rail

voltage feedback amplifiers with a charge pump, to provide a

negative rail without an additional power supply. Designed to

operate with a single supply voltage range of from 0V to

3.3V, the ISL59830A eliminates the need for a split supply

with the incorporation of a charge pump capable of

generating a bottom rail as much as 1.6V below ground; for

a 4.9V range on a single 3.3V supply. This performance is

ideal for NTSC video with its negative-going sync pulses.

The three amplifier channels have an input common mode

voltage range from 0.15V below the bottom rail to within

100mV of the positive supply, V + pin (Note: bottom rail is

S

established by the charge pump at negative one half the

positive supply). As the input signal moves outside the

specified range, the output signal will exhibit increasingly

higher levels of harmonic distortion. And of course, as load

resistance becomes lower, the current drive capability of the

device will be challenged and its ability to drive close to each

rail is reduced. For instance, with a load resistance of 1kΩ

the output swing is within 100mV of the rails, while a load

resistance of 150Ω limits the output swing to within around

300mV of the rails.

The Amplifier

The ISL59830A fabricated on a dielectrically isolated high

speed 5V Bi-CMOS process with 4GHz PNPs and NPN

transistor exceeding 20GHz - perfect for low distortion, low

power demand and high frequency circuits. While the

ISL59830A utilizes somewhat standard voltage mode

feedback topologies, there are many non-standard analog

features providing its outstanding bandwidth, rail-to-rail

operation, and output drive capabilities. The input signal

initially passes through a folded cascode, a topology

providing enhanced frequency response essentially by fixing

the base collector voltage at the junction of the input and

gain stage. The collector of each input device looks directly

into an emitter that is tied closely to ground through a

resistor and biased with a very stable DC source. Since the

voltage of this collector is "locked stable" the effective

bandwidth limiting of the Miller capacitance is greatly

reduced. The signal is then passed through a second fully-

realized differential gain stage and finally through a

proprietary common emitter output stage for improved rail-

to-rail output performance. The result is a highly-stable, low

Amplifier Output Impedance

To achieve near rail-to-rail performance, the output stage of

the ISL59830A uses transistors in the common emitter

configuration, typically producing higher output impedance

than the standard emitter follower output stage. The

exceptionally high open loop gain of the ISL59830A and

local feedback reduces output impedance to less than 2Ω at

low frequency. However, since output impedance of the

device is exponentially modulated by the magnitude of the

open loop gain, output impedance increases with frequency

as the open loop gain decreases with frequency. This

inductive-like effect of the output impedance is countered in

the ISL59830A with proprietary output stage topology,

keeping the output impedance low over a wide frequency

range and making it possible to easily and effectively drive

relatively heavy capacitive loads (See Figure 10).

I +

N

I -

N

OUT

BIAS

FIGURE 27.

FN6233.2

May 4, 2006

11

ISL59830A

amp +input gain change. Offset on the VREF pin must be

The Charge Pump

low impedance to prevent gain error and cross talk. A

transistor emitter follower should work like an NPN

MMBT3904 with the emitter connected to the VREF pin and

1k pull down to V- with 1µF cap bypass to ground and the

collector to V+ and base to V offset source. If better tempco

is needed then a diode may be used in series with the pot to

ground. A 499W resistor may be added in series with the

collector to prevent damage when testing.

The ISL59830A charge pump provides a bottom rail up to

1.65V below ground while operating on a 0V to 3.3V power

supply. The charge pump is internally regulated to one-half

the potential of the positive supply. This internal multi-phase

charge pump is driven by a 160MHz differential ring

oscillator driving a series of inverters and charge storage

circuitry. Each series inverter charges and places parallel

adjoining charge circuitry slightly out of phase with the

immediately preceding block. The overall effect is sequential

discharge and generation of a very low ripple of about 10mV

that is applied to the amplifiers providing a negative rail of up

to -1.65V.

See the Block Diagram on page 9.

The V Pin

EE

The V pin is the output pin for the charge pump. A

EE

voltmeter applied to this pin will display the output of the

charge pump. This pin does not affect the functionality of the

part. One may use this pin as an additional voltage source.

Keep in mind that the output of this pin is generated by the

internal charge pump and a fully regulated supply that must

be properly bypassed. We recommend a 0.1µF ceramic

capacitor placed as close to the pin and connected to the

ground plane of the board.

There are two options to reduce the output supply noise.

• Add a 120Ω bead in series between V

and DV

to

CC

further reduce ripple.

• Add a 20pF capacitor between the back load 75Ω resistor

and ground (see the ISL59830A + DC-Restore Solution

schematic on page 10).

Input, Output, and Supply Voltage Range

The ISL59830A is designed to operate with a single supply

voltage range of from 0V to 3.3V. The need for a split supply

has been eliminated with the incorporation of a charge pump

capable of generating a bottom rail as much as 1.6V below

ground, for a 4.9V range on a single 3.3V supply. This

performance is ideal for NTSC video with its negative-going

sync pulses.

Video Performance

TIME (20ns/DIV)

For good video performance, an amplifier is required to

maintain the same output impedance and the same frequency

and phase response as DC levels are changed at the output.

This is especially difficult when driving a standard video load

of 150Ω because of the change in output current with

changing DC levels. Special circuitry has been incorporated

into the ISL59830A for the reduction of output impedance

variation with the current output. This results in outstanding

differential gain and differential phase specifications of 0.06%

and 0.1°, while driving 150Ω at a gain of +2. Driving higher

impedance loads would result in similar or better differential

gain and differential phase performance.

FIGURE 28. CHARGE PUMP OSCILLATION

The system operates at sufficiently high frequencies that any

related charge pump noise is far beyond standard video

bandwidth requirements. Still, appropriate bypassing

discipline must be observed, and all pins related to either the

power supply or the charge pump must be properly

bypassed. See "Power Supply Bypassing and Printed Circuit

Board Layout" in this section.

The V

REF

Applying a voltage to the VREF pin simply places that

voltage on what would usually be the ground side of the gain

resistor of the amplifier, resulting in a DC-level shift of the

output signal. Applying 100mV to the Vref pin would apply a

100mV DC level shift to the outgoing signal. The charge

pump provides sufficient bottom room to accommodate the

shifted signal.

NTSC

The ISL59830A, generating a negative rail internally, is

ideally suited for NTSC video with its accompanying

negative-going sync signals; easily handled by the

ISL59830A without the need of an additional supply as the

ISL59830A generates a negative rail with an internal charge

pump referenced at negative 1/2 the positive supply.

Note: The VREF input is the common point of the 3 amps

minus input resistors. Any common resistance on VREF

input will share the voltage induced on it with all the other

amps, so using a resistor source to get offset will cause

cross talk and gain change for the offset for all amps and

YPbPr

YPbPr signals originating from a DVD player requiring three

channels of very tightly-controlled amplifier gain accuracy

present no difficulty for the ISL59830A. Specifically, this

FN6233.2

May 4, 2006

12

ISL59830A

standard encodes sync on the Y channel and it is a negative-

exceeded and the part will be damaged. This limit is set by

the design of the internal metal interconnections.

going signal; easily handled by the ISL59830A without the need

of an additional supply as the ISL59830A generates a negative

rail placed at negative 1/2 the positive supply. Additionally, the

Pb and Pr are bipolar analog signals and the video signals are

negative-going; and again easily handled by the ISL59830A.

Power Dissipation

With the high output drive capability of the ISL59830A, it is

possible to exceed the 150°C absolute maximum junction

temperature under certain load current conditions.

Therefore, it is important to calculate the maximum junction

temperature for an application to determine if load conditions

or package types need to be modified to assure operation of

the amplifier in a safe operating area.

Driving Capacitive Loads and Cables

The ISL59830A, internally-compensated to drive 75Ω cables,

will drive 10pF loads in parallel with 1kΩ with less than 5dB of

peaking. If less peaking is required, a small series resistor,

usually between 5Ω to 50Ω, can be placed in series with the

output. This will reduce peaking at the expense of a slight

closed loop gain reduction. When used as a cable driver,

double termination is always recommended for reflection-free

performance. For those applications, a back-termination series

resistor at the amplifier's output will isolate the amplifier from

the cable and allow extensive capacitive drive. However, other

applications may have high capacitive loads without a back-

termination resistor. Again, a small series resistor at the output

can help to reduce peaking. The ISL59830A is a triple amplifier

designed to drive three channels; simply deal with each

channel separately as described in this section.

The maximum power dissipation allowed in a package is

determined according to:

T

– T

AMAX

JMAX

PD

= --------------------------------------------

MAX

Θ

JA

Where:

T

= Maximum junction temperature

= Maximum ambient temperature

JMAX

T

AMAX

Θ

= Thermal resistance of the package

JA

The maximum power dissipation actually produced by an IC

is the total quiescent supply current times the total power

supply voltage, plus the power in the IC due to the load, or:

DC-Restore

When the ISL59830A is AC-coupled it becomes necessary

to restore the DC reference for the signal. This is

for sourcing:

accomplished with a DC-restore system applied between the

capacitive "AC" coupling and the input of the device. Refer to

Application Circuit for reference DC-restore solution.

V

i

OUT

R i

L

-----------------

i) ×

OUT

PD

= V × I

+ (V – V

MAX

S

SMAX

S

Disable/Power-Down

for sinking:

The ISL59830A can be disabled and its output placed in a

high impedance state. The turn-off time is around 25ns and

the turn-on time is around 200ns. When disabled, the

amplifier's supply current is reduced to 0.9mA typically,

thereby effectively eliminating the power consumption. The

amplifier's power-down can be controlled by standard TTL or

CMOS signal levels at the EN and PD pins. The applied

PD

= V × I

+ (V

i – V ) × I

i

LOAD

MAX

S

SMAX

OUT

S

Where:

V = Supply voltage

S

I

= Maximum quiescent supply current

SMAX

logic signal is relative to V - pin. Letting the EN and PD pins

S

float or applying a signal that is less than 0.8V above V - will

enable the amplifier. The amplifier will be disabled when the

S

V

= Maximum output voltage of the application

OUT

R

= Load resistance tied to ground

signal at EN pin is 2V above V -. The amplifier must be

LOAD

S

disabled (EN pin is high) whenever the charge pump is

disabled (PD pin is high). EN and PD pins should be

connected together to allow amplifier and charge pump

to enable/disable simultaneously.

I

= Load current

LOAD

i = Number of output channels

By setting the two P equations equal to each other, we

DMAX

can solve the output current and R

overheat.

to avoid the device

LOAD

Output Drive Capability

The ISL59830A does not have internal short-circuit

protection circuitry. A short-circuit current of 80mA sourcing

and 150mA sinking for the output is connected to half way

between the rails with a 10Ω resistor. If the output is shorted

indefinitely, the power dissipation could easily increase such

that the part will be destroyed. Maximum reliability is

maintained if the output current never exceeds ±40mA, after

which the electro-migration limit of the process will be

FN6233.2

May 4, 2006

13

ISL59830A

Power Supply Bypassing and Printed Circuit

Board Layout

Strip line design techniques are recommended for the input

and output signal traces. As with any high frequency device,

a good printed circuit board layout is necessary for optimum

performance. Lead lengths should be as short as possible.

The power supply pin must be well bypassed to reduce the

risk of oscillation. For normal single supply operation, where

the V - pin is connected to the ground plane, a single 4.7µF

S

tantalum capacitor in parallel with a 0.1µF ceramic capacitor

from V + to GND will suffice. This same capacitor

S

combination should be placed at each supply pin to ground if

split-internal supplies are to be used. In this case, the V -

S

pin becomes the negative supply rail.

For good AC performance, parasitic capacitance should be

kept to a minimum. Use of wire-wound resistors should be

avoided because of their additional series inductance. Use

of sockets should also be avoided if possible. Sockets add

parasitic inductance and capacitance can result in

compromised performance. Minimizing parasitic capacitance

at the amplifier's inverting input pin is also very important.

FN6233.2

May 4, 2006

14

ISL59830A

Shrink Small Outline Plastic Packages (SSOP)

Quarter Size Outline Plastic Packages (QSOP)

M16.15A

N

16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE

(0.150” WIDE BODY)

INDEX

M

B

0.25(0.010)

H

AREA

E

INCHES

MILLIMETERS

GAUGE

PLANE

-B-

SYMBOL

MIN

MAX

MIN

1.55

0.102

1.40

0.20

0.191

4.80

3.81

MAX

1.73

0.249

1.55

0.31

0.249

4.98

3.99

NOTES

A

A1

A2

B

0.061

0.004

0.055

0.008

0.0075

0.189

0.150

0.068

0.0098

0.061

0.012

0.0098

0.196

0.157

-

1

2

3

-

L

-

0.25

0.010

SEATING PLANE

A

9

-A-

D

h x 45°

C

D

E

-

3

-C-

4

α

A2

e

A1

e

0.025 BSC

0.635 BSC

-

C

B

H

h

0.230

0.010

0.016

0.244

0.016

0.035

5.84

0.25

0.41

6.20

0.41

0.89

-

0.10(0.004)

M

S

B

0.17(0.007)

C

A

5

L

6

NOTES:

N

α

16

7

1. Symbols are defined in the “MO Series Symbol List” in Section

2.2 of Publication Number 95.

0°

8°

0°

8°

-

Rev. 2 6/04

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.

3. Dimension “D” does not include mold flash, protrusions or gate

burrs. Mold flash, protrusion and gate burrs shall not exceed

0.15mm (0.006 inch) per side.

4. Dimension “E” does not include interlead flash or protrusions.

Interlead flash and protrusions shall not exceed 0.25mm (0.010

inch) per side.

5. The chamfer on the body is optional. If it is not present, a visual

index feature must be located within the crosshatched area.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. Dimension “B” does not include dambar protrusion. Allowable

dambar protrusion shall be 0.10mm (0.004 inch) total in excess

of “B” dimension at maximum material condition.

10. Controlling dimension: INCHES. Converted millimeter dimen-

sions are not necessarily exact.

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN6233.2

May 4, 2006

15


型号：	ISL59830AIA
厂家：	RENESAS TECHNOLOGY CORP
描述：	3 CHANNEL, VIDEO AMPLIFIER, PDSO16, 0.150 INCH, PLASTIC, SSOP-16 放大器光电二极管
文件：	总15页 (文件大小：328K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ISL59830AIA [RENESAS]

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