EK42540-03 [PSEMI]
UltraCMOS SP4T RF Switch; 的UltraCMOS SP4T射频开关
| 型号： | EK42540-03 |
| 厂家： | 
Peregrine Semiconductor |
| 描述： | UltraCMOS SP4T RF Switch |
| 文件： | 总12页 (文件大小：548K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Product Specification
PE42540
UltraCMOS® SP4T RF Switch
10 Hz - 8 GHz, Absorptive
Product Description
Features
The PE42540 is a HaRP™ technology-enhanced
absorptive SP4T RF switch developed on UltraCMOS®
process technology. This switch is designed specifically
to support the requirements of the test equipment and
ATE market. It is comprised of four symmetric RF ports
and has very high isolation. An on-chip CMOS decode
logic facilitates a two-pin low voltage CMOS control
interface and an optional external Vss feature. High
ESD tolerance and no blocking capacitor requirements
make this the ultimate in integration and ruggedness.
HaRP™ technology enhanced
Fast settling time
Eliminates gate and phase lag
No drift in insertion loss and phase
High linearity: 58 dBm IIP3
Low insertion loss: 0.8 dB @ 3 GHz,
1.0 dB @ 6 GHz and 1.2 dB @ 8 GHz
High isolation: 45 dB @ 3 GHz,
The PE42540 is manufactured on Peregrine’s
UltraCMOS® process, a patented variation of silicon-on-
insulator (SOI) technology on a sapphire substrate,
offering the performance of GaAs with the economy
and integration of conventional CMOS.
39 dB @ 6 GHz and 31 dB @ 8 GHz
Maximum power handling: 30 dBm @
8 GHz
Absorptive switch design
High ESD tolerance of 2kV HBM on RFC
and 1kV HBM on all other pins
Figure 1. Functional Diagram
Figure 2. Package Type
32-lead 5x5 mm LGA
RFC
RF1
RF3
RF2
RF4
ESD
ESD
ESD
50
50
50
ESD
50
CMOS Control/
Driver and ESD
VDD V1
V2 VssEXT
71-0067
Document No. 70-0299-08
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www.psemi.com
©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 12
PE42540
Product Specification
Table 1. Electrical Specifications @ 25°C, VDD = 3.3V, VssEXT = 0V (ZS = ZL = 50Ω)
Parameter
Condition
Min
Typ
Max
Unit
Operating Frequency
10 Hz1
8 GHz
10 Hz-9 kHz
3000 MHz
6000 MHz
7500 MHz
8000 MHz
0.7
0.8
1.0
1.1
1.2
1.0
1.1
1.3
1.5
1.6
dB
dB
dB
dB
dB
RFC-RFX Insertion Loss
RFX-RFX Isolation
10 Hz-9 kHz
3000 MHz
6000 MHz
7500 MHz
8000 MHz
70
40
34
27
25
80
45
39
32
31
dB
dB
dB
dB
dB
10 Hz-9 kHz
3000 MHz
6000 MHz
7500 MHz
8000 MHz
74
40
28
24
21
84
45
33
29
27
dB
dB
dB
dB
dB
RFC-RFX Isolation
10 Hz-9 kHz
3000 MHz
6000 MHz
7500 MHz
8000 MHz
24
23
18
14
13
dB
dB
dB
dB
dB
Return Loss (RFC to active port)
10 Hz-9 kHz
3000 MHz
6000 MHz
7500 MHz
8000 MHz
35
18
13
11
10
dB
dB
dB
dB
dB
Return Loss (terminated port)
Settling Time
50% CTRL to 0.05dB final value (-40 to 85 ºC) Rising Edge
50% CTRL to 0.05dB final value (-40 to 85 ºC) Falling Edge
14
15
18
45
μs
μs
Switching Time (TSW
)
50% CTRL to 90% or 10% RF
5
8
μs
P1dB1 Input 1 dB Compression
RFX-RFC
All bands @ 1:1 VSWR, 100% duty cycle
31
33
dBm
Input IP3
Input IP2
8000 MHz
8000 MHz
58
dBm
dBm
100
Note 1: Maximum Operating Pin (50Ω) is shown in Table 3. Please refer to Figures 4, 5, and 6 when operating the part at low frequency
©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0299-08
|
UltraCMOS® RFIC Solutions
Page 2 of 12
PE42540
Product Specification
Figure 3. Pin Configuration (Top View)
Table 3. Operating Ranges
Parameter
Min
Typ
Max
Unit
V
DD Supply Voltage
3.0
3.3
3.55
V
VssEXT Negative Power Supply
Voltage1
-3.6
-3.3
-10
-3.0
-40
V
Iss Negative Supply Current
µA
IDD Power Supply Current
VDD = 3.3V, VssEXT = 0V,
Temp = 85°C
90
160
50
µA
µA
IDD Power Supply Current
V
DD = 3.6V, VssEXT used
VCTRL Control Voltage High
CTRL Control Voltage Low
1.2
0
1.5
0
VDD
0.4
1
V
V
V
ICTRL Control Current
µA
PIN Thru Path2 (50Ω, RF Power in)
figs.
9 kHz - 8 GHz
4,5,6
Pmax Max power into termination
(50Ω)
figs.
4,5,6
20
9 kHz ≤6 MHz2,3
6 MHz - 8 GHz2,3
dBm
Table 2. Pin Descriptions
Pin #
Pin Name
Description
P
max Max power, hot switching (50Ω)
9 kHz ≤6 MHz2,3
figs.
4,5,6
20
6 MHz - 8 GHz2,3
dBm
°C
1, 3-6, 8,
9-12, 14-17,
19-22, 24-26,
28, 32
GND
Ground
TOP Operating temperature range
-40
+85
Notes: 1. Applies only when external Vss power supply is used. Otherwise,
VssEXT = 0
2
RF42
RF22
RFC2
RF12
RF32
VDD
RF I/O
2. 100% duty cycle (-40 to +85° C, 1:1 VSWR)
3. Do not exceed 20 dBm
7
RF I/O
13
18
23
27
29
30
RF Common
RF I/O
RF I/O
Supply
V1
Switch control input, CMOS logic level
Switch control input, CMOS logic level
V2
External Vss Negative Voltage
Control
1
31
VssEXT
Exposed solder pad: Ground for
proper operation
Paddle
GND
Notes: 1. Use VssEXT (pin 31, VssEXT = -VDD) to bypass and disable internal
negative voltage generator. Connect VssEXT (pin 31) to GND
(VssEXT = 0V) to enable internal negative voltage generator
2. All RF pins must be DC blocked with an external series capacitor
or held at 0 VDC
Document No. 70-0299-08
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©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 12
PE42540
Product Specification
Table 4. Absolute Maximum Ratings
Switching Frequency
Parameter/Condition
Min
Max
+150
4
Unit
°C
V
The PE42540 has a maximum 25 kHz switching
rate when the internal negative voltage generator
is used (pin 31 = GND). The rate at which the
PE42540 can be switched is only limited to the
switching time (Table 1) if an external negative
supply is provided at (pin 31 = VssEXT).
TST Storage temperature range
-60
V
DD Supply Voltage
-0.3
VCTRL Control Voltage, V1 and V2
4
V
PIN Thru Path (50Ω, RF Power in)
figs.
4,5,6
9 kHz - 8 GHz
Pmax Max power into termination (50Ω)
9 kHz ≤6 MHz1
figs.
4,5,6
20
Optional External Vss Control (VssEXT
)
6 MHz - 8 GHz
dBm
For proper operation, the VssEXT control pin must
be grounded or tied to the Vss voltage specified
in Table 3. When the VssEXT control pin is
grounded, FETs in the switch are biased with an
internal voltage generator. For applications that
require the lowest possible spur performance,
VssEXT can be applied externally to bypass the
internal negative voltage generator.
VESD ESD Voltage HBM2
RFC
All Pins
2000
1000
V
V
VESD ESD Voltage MM, all pins3
100
V
Notes: 1. Do not exceed 20 dBm
2. HBM, MIL-STD 883 Method 3015.7
3. MM JEDEC JESD22-A115-A
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be
restricted to the limits in the Operating Ranges
table. Operation between operating range
maximum and absolute maximum for extended
periods may reduce reliability.
Spurious Performance
The typical spurious performance of the PE42540
is -144 dBm when VssEXT = 0V (pin 31 = GND). If
further improvement is desired, the internal
negative voltage generator can be disabled by
setting VssEXT = -VDD.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS® device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Table 5. Truth Table
State
V1
0
V2
0
RF1 on
RF2 on
RF3 on
RF4 on
1
0
0
1
1
1
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS®
devices are immune to latch-up.
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
PE42540 in the 32-lead 5x5 mm LGA package is
MSL3.
©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0299-08
|
UltraCMOS® RFIC Solutions
Page 4 of 12
PE42540
Product Specification
Low Frequency Operation
Table 6 shows the minimum and maximum
voltage limits when operating the device under
various VDD and VssEXT voltage conditions below
9 kHz. Refer to Figures 4, 5, and 6 to determine
the maximum operating power over the frequency
range of the device.
Table 6. Instantaneous RF Pin Voltage Limits
for Operation Below 9 kHz
Minimum Peak
Voltage at RF Port
Maximum Peak
Voltage at RF Port
VDD
VssEXT
≥3.0
3.0
0.0
-3.0
-3.3
-3.5
-3.6
-0.2
-0.6
-0.3
-0.1
0.0
1.2
1.6
1.3
1.1
1.0
3.3
3.5
3.6
Maximum Operating Power vs. Frequency
Figures 4, 5, and 6 show the power limit of the
device will increase with frequency. As the
frequency increases, the contours and maximum
power limit will increase as shown in the curves.
Document No. 70-0299-08
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©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 12
PE42540
Product Specification
Figure 4. Maximum Operating Power vs. Frequency (Tambient = 25oC)
35
30
25
20
15
10
5
0
VssEXT = -3.0V, VDD = +3.0V
VssEXT = 0.0V, VDD ≥ +3.0V
VssEXT= -3.5V, VDD=+3.5V
-5
-10
-15
0
1
10
100
1,000
10,000
100,000 1,000,000
Frequency (kHz)
Figure 5. Maximum Operating Power vs. Frequency (Tambient = 50oC)
35
30
25
20
15
10
5
0
VssEXT = -3.0V, VDD = +3.0V
VssEXT = 0.0V, VDD ≥ +3.0V
VssEXT= -3.5V, VDD=+3.5V
-5
-10
-15
0
1
10
100
1,000
10,000
100,000 1,000,000
Frequency (kHz)
Figure 6. Maximum Operating Power vs. Frequency (Tambient = 85oC)
35
30
25
20
15
10
5
0
VssEXT = -3.0V, VDD = +3.0V
-5
VssEXT = 0.0V, VDD ≥ +3.0V
-10
VssEXT= -3.5V, VDD=+3.5V
-15
0
1
10
100
1,000
10,000
100,000 1,000,000
Frequency (kHz)
©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0299-08
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UltraCMOS® RFIC Solutions
Page 6 of 12
PE42540
Product Specification
Figure 7. Insertion Loss vs. VDD
(Temp = 25°C, Vss = 0)
Figure 8. Insertion Loss vs. Temp
(VDD = 3.3V, Vss = 0)
Frequency (Hz)
Frequency (Hz)
Figure 9. Insertion Loss
Figure 10. Isolation: RFX-RFX vs. VDD
(Temp = 25°C, Vss = 0)
(Temp = 25°C, VDD = 3.3V, Vss = 0)
Frequency (Hz)
Frequency (Hz)
Figure 11. Isolation: RFX-RFX vs. Temp
(VDD = 3.3V, Vss = 0)
Figure 12. Isolation: RFX-RFC vs. VDD
(Temp = 25°C, Vss = 0)
Frequency (Hz)
Frequency (Hz)
©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Page 7 of 12
Document No. 70-0299-08
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PE42540
Product Specification
Figure 13. Isolation: RFX-RFC vs. Temp
(VDD = 3.3V, Vss = 0)
Figure 14. Active Port Return Loss vs. VDD
(Temp = 25°C, Vss = 0)
Frequency (Hz)
Frequency (Hz)
Figure 15. Active Port Return Loss vs. Temp
(VDD = 3.3V, Vss = 0)
Figure 16. Terminated Port Return Loss vs. VDD
(Temp = 25°C, Vss = 0)
Frequency (Hz)
Frequency (Hz)
Figure 17. Terminated Port Return Loss vs. Temp
(VDD = 3.3V, Vss = 0)
Figure 18. RFC Port Return Loss vs. VDD
(Temp = 25°C, Vss = 0)
Frequency (Hz)
Frequency (Hz)
©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Page 8 of 12
Document No. 70-0299-08
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UltraCMOS® RFIC Solutions
PE42540
Product Specification
Figure 19. RFC Port Return Loss vs. Temp
(VDD = 3.3V, Vss = 0)
Frequency (Hz)
Figure 20. Linearity Performance
(Temp = 25°C, VDD = 3.3V, Vss = 0)
1.0E+10
Frequency (Hz)
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Page 9 of 12
PE42540
Product Specification
Evaluation Kit
Figure 21. Evaluation Board Layouts
The SP4T switch EK Board was designed to ease
customer evaluation of Peregrine’s PE42540. The
RF common port is connected through a 50Ω
transmission line via the top SMA connector, J1.
RF1, RF2, RF3 and RF4 are connected through
50Ω transmission lines via SMA connectors J2, J4,
J3 and J5, respectively. A through 50Ω transmission
is available via SMA connectors J6 and J7. This
transmission line can be used to estimate the loss of
the PCB over the environmental conditions being
evaluated.
The board is constructed of a four metal layer
material with a total thickness of 62 mils. The dual
clad top RF layer is Rogers RO4003 material with
an 8 mil RF core and er = 3.55. The middle layers
provide ground for the transmission lines. The
transmission lines were designed using a coplanar
waveguide with ground plane model using a trace
width of 15 mils, trace gaps of 10 mils, and metal
thickness of 2.1 mils.
101-0515
Figure 22. Evaluation Board Schematic
J1
17
18
19
20
21
22
23
24
8
7
6
5
4
3
2
1
GND
RF1
GND
RF2
RF1
RF2
RF4
J2
J4
GND
GND
GND
GND
RF3
GND
GND
GND
GND
RF4
PE42540
U1
RF3
J3
J5
GND
GND
R1
R2
1M
1M
J8
HEADER 14
R3
0 OHM
0 OHM
2
4
6
1
3
5
7
9
11
13
2
4
6
8
10
12
14
1
3
5
7
9
R4
R6
0 OHM
0 OHM
J6
J7
8
R5
10
12
14
Through Line
11
13
C1
22pF
C2
22pF
C3
22pF
C4
22pF
C5
0.1uF
C6
0.1uF
102-0612
©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0299-08
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UltraCMOS® RFIC Solutions
Page 10 of 12
PE42540
Product Specification
Figure 23. Package Drawing
0.10
(2X)
C
0.34
(x32)
A
5.00
3.03±0.05
0.485
(x32)
DETAIL A
B
0.50
(x28)
17
24
0.50
(x28)
25
16
5.00
3.50
4.90
3.03±0.05
3.08
0.34
(x32)
32
0.26±0.05
(x32)
9
0.10
(2X)
C
8
1
3.08
4.90
0.435±0.050
(x32)
3.50
Pin #1 Corner
DETAIL B
TOP VIEW
BOTTOM VIEW
RECOMMENDED LAND PATTERN
1.01 MAX
0.10
C
181-0022
0.70
0.10
0.05
C
C
A B
0.05
C
SEATING PLANE
ALL FEATURES
0.24
C
SIDE VIEW
0.10
0.15
0.535
0.04
0.505
45° CHAMFER
0.11
0.10
DETAIL A
DETAIL B
Figure 24. Marking Specifications
42540
YYWW
ZZZZZZ
17-0085
YYWW = Date Code
ZZZZZ = Last six digits of Lot Number
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Page 11 of 12
PE42540
Product Specification
Figure 25. Tape and Reel Drawing
Tape Feed Direction
Ao = 5.25 ± 0.05 mm
Bo = 5.25 ± 0.05 mm
Ko = 1.1 ± 0.05 mm
Notes: 1. 10 sprocket hole pitch cumulative tolerance ±0.02
2. Camber not to exceed 1 mm in 100 mm
3. Material: PS + C
4. Ao and Bo measured as indicated
5. Ko measured from a plane on the inside bottom of
the pocket to the top surface of the carrier
6. Pocket position relative to sprocket hole measured
as true position of pocket, not pocket hole
Table 7. Ordering Information
Order Code
PE42540LGBC-Z
EK42540-03
Description
Package
Shipping Method
PE42540 SP4T RF switch
PE42540 Evaluation kit
Green 32-lead 5x5 mm LGA
Evaluation kit
3000 units / T&R
1 / Box
Sales Contact and Information
For Sales and contact information please visit www.psemi.com.
No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third
party.
Advance Information: The product is in a formative or design stage. The datasheet contains
design target specifications for product development. Specifications and features may change in
any manner without notice. Preliminary Specification: The datasheet contains preliminary data.
Additional data may be added at a later date. Peregrine reserves the right to change specifications
at any time without notice in order to supply the best possible product. Product Specification:
The datasheet contains final data. In the event Peregrine decides to change the specifications,
Peregrine will notify customers of the intended changes by issuing a CNF (Customer Notification
Form).
Peregrine’s products are not designed or intended for use in devices or systems intended for surgical
implant, or in other applications intended to support or sustain life, or in any application in which the
failure of the Peregrine product could create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of
the use of its products in such applications.
The Peregrine name, logo, UltraCMOS and UTSi are registered trademarks and HaRP, MultiSwitch and
DuNE are trademarks of Peregrine Semiconductor Corp.
The information in this datasheet is believed to be reliable. However, Peregrine assumes no
liability for the use of this information. Use shall be entirely at the user’s own risk.
©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0299-08
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UltraCMOS® RFIC Solutions
Page 12 of 12
相关型号：
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PSEMI
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