SAA4990H-T [NXP]
IC SPECIALTY CONSUMER CIRCUIT, PQFP80, Consumer IC:Other;
| 型号： | SAA4990H-T |
| 厂家： | 
NXP |
| 描述： | IC SPECIALTY CONSUMER CIRCUIT, PQFP80, Consumer IC:Other 商用集成电路 |
| 文件： | 总28页 (文件大小：145K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
SAA4990H
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
1996 Oct 25
Preliminary specification
File under Integrated Circuits, IC02
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
FEATURES
GENERAL DESCRIPTION
• Progressive scan conversion
(262.5 to 525 or 312.5 to 625 lines/field)
The Progressive scan-Zoom and Noise reduction IC,
abbreviated as PROZONIC, is designed for applications
together with:
• Field rate up-conversion (50 to 100 Hz or 60 to 120 Hz)
• Line flicker reduction
SAA4951WP Economy Controller (ECO3)
SAA4952H (memory controller)
• Noise and cross-colour reduction
• Variable vertical sample rate conversion
• Movie phase detection
SAA7158WP Back END IC (BENDIC)
SAA4995WP PANorama IC (PANIC)
SAA4970T ECOnomical video processing Back END IC
(ECOBENDIC)
• Synchronous No parity Eight bit Reception and
Transmission (SNERT) interface.
TMS4C2970/71 (serial field memories)
TDA8755/8753A (A/D converter 4 : 1 : 1 format)
83C652/54 type of microcontroller.
QUICK REFERENCE DATA
SYMBOL
VDDD
Tamb
PARAMETER
MIN.
MAX.
5.5
70
UNIT
digital supply voltage
operating ambient temperature
4.5
0
V
°C
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
SAA4990H QFP80 plastic quad flat package; 80 leads (lead length 1.95 mm); body 14 × 20 × 2.8 mm SOT318-2
1996 Oct 25
2
g
UV1
YUV
YUV
REFORMATTER
REFORMATTER
A
4
12
12
LINE
MEMORY 2
MIXER
LINE
MEMORY 3
MIXER
NOISE
REDUCTION
LINE
MEMORY 1
FORMATTER
UV2
B
4
YUV
D
12
Y1
Y2
LINE
MEMORY 2
MEDIAN
FILTER
8
8
LINE
MEMORY 3
MIXER
NOISE
REDUCTION
LINE
MEMORY 1
4
8
8
FORMATTER
SAA4990H
YUV
C
12
MOVIE
PHASE
DETECTOR
MICROPROCESSOR
RE1
RE2
WE2
INTERFACE
(SNERT)
CONTROL BLOCK
3
3
2
2
MGE024
SNCL, SNDA,
SNRST
CK
VD, HD RE, WE
Fig.1 Block diagram.
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
PINNING
SYMBOL
PIN
TYPE
DESCRIPTION
TEST1/AP
TEST2/SP
RE1
1
input
input
action pin for testing, to be connected to VSS
shift pin for testing, to be connected to VSS
read enable to FM1
ground 1
2
3
output
ground
supply
output
output
output
output
output
ground
supply
output
output
output
output
output
output
output
input
VSS1
4
VDD1
5
supply voltage 1
YUVC7
YUVC6
YUVC5
YUVC4
YUVC3
VSS2
6
Y bit 7 to FM2
7
Y bit 6 to FM2
8
Y bit 5 to FM2
9
Y bit 4 to FM2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Y bit 3 to FM2
ground 2
VDD2
supply voltage 2
YUVC2
YUVC1
YUVC0
YUVC11
YUVC10
YUVC9
YUVC8
CK
Y bit 2 to FM2
Y bit 1 to FM2
Y bit 0 to FM2
UV bit 3 to FM2
UV bit 2 to FM2
UV bit 1 to FM2
UV bit 0 to FM2
master clock, nominal 27 or 32 MHz
ground 3
VSS3
ground
supply
output
output
input
VDD3
supply voltage 3
WE2
write enable to FM2
read enable to FM2
UV bit 0 from FM2
UV bit 1 from FM2
UV bit 2 from FM2
UV bit 3 from FM2
Y bit 0 from FM2
Y bit 1 from FM2
Y bit 2 from FM2
Y bit 3 from FM2
supply voltage 4
RE2
YUVB8
YUVB9
YUVB10
YUVB11
YUVB0
YUVB1
YUVB2
YUVB3
VDD4
input
input
input
input
input
input
input
supply
ground
input
VSS4
ground 4
YUVB4
YUVB5
YUVB6
YUVB7
RE
Y bit 4 from FM2
Y bit 5 from FM2
Y bit 6 from FM2
Y bit 7 from FM2
master read enable
field frequent reset, vertical display
input
input
input
input
VD
input
1996 Oct 25
4
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
SYMBOL
PIN
TYPE
DESCRIPTION
HD
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
input
horizontal reference signal
UV bit 0
YUVD8
YUVD9
YUVD10
VDD5
output
output
output
supply
ground
output
output
output
output
supply
ground
output
output
output
output
output
supply
ground
input
UV bit 1
UV bit 2
supply voltage 5
ground 5
UV bit 3
VSS5
YUVD11
YUVD0
YUVD1
YUVD2
VDD6
Y bit 0
Y bit 1
Y bit 2
supply voltage 6
ground 6
Y bit 3
VSS6
YUVD3
YUVD4
YUVD5
YUVD6
YUVD7
VDD7
Y bit 4
Y bit 5
Y bit 6
Y bit 7
supply voltage 7
ground 7
VSS7
SNRST
SNDA
SNCL
AUX
field frequent reset from microcontroller; reset for SNERT interface
data for SNERT interface
clock for SNERT interface
spare output from line-sequencer
output hold to e.g. LC display
not connected
I/O
input
output
output
−
HO
n.c.
n.c.
−
not connected
YUVA7
YUVA6
YUVA5
YUVA4
YUVA3
YUVA2
VSS8
input
Y bit 7 from FM1
input
Y bit 6 from FM1
input
Y bit 5 from FM1
input
Y bit 4 from FM1
input
Y bit 3 from FM1
input
Y bit 2 from FM1
ground
supply
input
ground 8
VDD8
supply voltage 8
YUVA1
YUVA0
YUVA11
YUVA10
YUVA9
YUVA8
Y bit 1 from FM1
input
Y bit 0 from FM1
input
UV bit 3 from FM1
input
UV bit 2 from FM1
input
UV bit 1 from FM1
input
UV bit 0 from FM1
1996 Oct 25
5
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
H
64
TEST1/AP
TEST2/SP
RE1
1
2
O
63 AUX
3
62 SNCL
61 SNDA
60 SNRST
V
4
SS1
V
5
DD1
YUV
C7
V
V
6
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
SS7
DD7
YUV
C6
7
YUV
C5
YUV
YUV
YUV
YUV
YUV
V
8
D7
D6
D5
D4
D3
YUV
C4
9
YUV
C3
10
11
12
13
14
15
16
17
18
19
V
SS2
V
DD2
SAA4990H
YUV
C2
SS6
YUV
C1
V
DD6
YUV
C0
YUV
YUV
YUV
YUV
V
D2
YUV
C11
D1
YUV
C10
D0
YUV
C9
D11
YUV
C8
SS5
V
CK 20
DD5
V
V
YUV
YUV
YUV
21
22
SS3
D10
D9
DD3
WE2 23
RE2 24
D8
41 HD
MGE023
Fig.2 Pin configuration.
6
1996 Oct 25
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
FUNCTIONAL DESCRIPTION
Field rate up-conversion with line flicker reduction
frame
frame
handbook, halfpage
field
l, k = 1
l, k = 2
The line flicker reduction in conjunction with field rate
up-conversion is performed by generating a 50 Hz
interlace on the 100 Hz field rate display. Median filtering
supplies the data for the interlaced output fields.
A
n
B
n,m
A
B
m
field
field
field
m,n
DEFINITIONS
Framel: l is the number of an input/output frame
temporarily combinating an A and B field.
Fieldxn : x is the field raster where A means an odd field and
B means an even field.
Framel, k: l is the number of an output frame temporarily
combinating an origin/interpolated A and B field;
k indicates the origin input field with
t
k = 1: odd input field and raster A
MGE026
k = 2: even input field and raster B within framel.
y
Fieldxn, m : n, m = lines of fieldn, m are interpolated by
2 lines of fieldn and 1 line of fieldm using the median filter
(see Fig.3); x is the field raster where A means an odd field
and B means an even field.
Fig.3 Generation of fieldnB, m (median filter).
frame
frame
2
1
B
2
B
4
A
1
A
3
field
field
field
field
input
1f , 1f
H
v
median
median
median
median
output
2f , 2f
H
v
A
1
B
1, 2
A
field
B
2
A
3
B
3, 4
A
4, 3
B
4
field
field
field
field
field
field
field
2, 1
frame
1, 1
frame
frame
2, 1
frame
2, 2
1, 2
MGE027
Fig.4 Scan rate up-conversion.
7
1996 Oct 25
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
Progressive scan
NON-INTERLACE MODE
Progressive scan conversion produces a double number
of lines per field on the output. The field frequency is not
changed, while the line frequency is doubled.
With non-interlaced progressive scan output, line flicker is
removed because interlace is removed.
INTERLACE MODE
Processing for progressive scan is different for two
successive output fields, e.g. the first output field has a
median operation on the odd lines, while the second has
the median operation on the even lines.
With interlaced progressive scan the output line structure
and line flicker is less visible (projection TV).
PROGRESSIVE SCAN CONVERSION
frame
frame
2
1
B
2
B
4
A
1
A
3
A
5
field
field
field
field
field
output
1f , 1f
H
v
median
median
median
median
output
2f , 1f
H
v
A
1
B
1, 2
B
2
A
2,3
A
3
B
3, 4
B
4
A
4,5
field
field
field
field
field
field
field
field
frame
1, 1
frame
1, 2
frame
2, 1
frame
2, 2
a. Non-interlaced output; (625/50/1:1) or (525/60/1:1):
frame
1, 1
frame
1, 2
frame
2, 1
frame
2, 2
b. Interlaced output; (1250/50/2:1) or (1050/60/2:1):
A
1,1
B
1,2
A
2,1
B
2,2
field
field
field
field
MGE028
frame
frame
2
1
Fig.5 Progressive scan conversion.
8
1996 Oct 25
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
To latter remark, note that recursion is done over a field,
and the pixel positions one field apart always have a
vertical offset of one frame line. So averaging is not only
done in the dimension of time but also in the vertical
direction. Therefore averaging vertically on e.g. a vertical
black to white edge would provide a grey result if this was
not adapted for.
Noise and cross-colour reduction
The noise reduction is field recursive with an average ratio
between fresh and over previous fields averaged
luminance and chrominance.
Two operating modes can be used in principal: the fixed
and the adaptive mode (see Table 6).
The averaging in chrominance is slaved to the luminance
averaging. This implies that differences in the
chrominance are not taken into account for the k-factor
setting.
In the fixed mode, the averaging produces a constant
linear combination of the inputs. Except for k = 1, the fixed
mode should not be used for normal operation, because of
its smearing effects.
The noise reduction scheme effectively decreases both
noise and cross-colour patterns.
In the adaptive mode, the averaging ratio switches softly
on the basis of absolute differences in luminance among
the inputs. When the absolute difference is low, only a
small part of the fresh data will be added. When the
difference is high, much of the fresh data will be taken.
This occurs in either the situation of movement or where a
significant vertical contrast is seen.
The cross-colour pattern does not produce an increase of
the measured luminance difference, therefore this pattern
will be averaged over many fields.
Y
A
k
Y
out
(1)
Y
B
FIELD
MEMORY
TF1
TF2
FILTER
LIMITER
FILTER
MULTIPLIER
(2)
k-CURVE
(3)
MGE029
(1) Yout = YA × k + YB × (1 − k).
(2) see Table 9.
(3) see Fig.11.
Fig.6 Noise reduction scheme.
1996 Oct 25
9
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
Vertical sample rate conversion
Movie phase detection
The variable vertical sample rate conversion is performed
on top of the noise reduced and progressively scanned
data.
While processing video, that was originally film
(25 movement phases per second in the case of 50 Hz
field rates), median filtering is not needed when fields are
combined that have the same movement phase. As this
phase is not generally known, the PROZONIC has a
detection circuit to help determine it. The detection is
based on measurement of absolute luminance differences
between successive input fields, pixel by pixel. These
differences are summed over all active video and give a
number every field. In case of video from film with sufficient
movement, the measured number will alternately be HIGH
and LOW. With the controlling microcontroller, this data
can be filtered appropriately to switch to movie processing
in the correct phase.
The vertical sample rate conversion is intended to cope
with the various letter box formats, to be displayed on
displays with e.g. 16:9 aspect ratio. For this sample rate
conversion, which usually has both a vertical and a
horizontal component, the vertical sample rate conversion
is taken care of in the PROZONIC, while the horizontal
compression can be done in e.g. TDA8753A or
SAA4995WP.
The vertical sample rate conversion can also be used to
convert from an NTSC 525 lines source to a 625 line
display, by setting a vertical sample rate conversion factor
of 6⁄5 and necessarily some line-time reduction.
The PROZONIC has a provision to generate a rectangular
box, which is position and size programmable. This box
can be used to enable the measurement in the movie
phase detection circuit, only within this rectangle.
Otherwise, the active video part in a field is marked with a
derivative of the RE pulse.
Conversion from 625 to 525 lines is possible with
progressive scan output, by setting a vertical sample rate
conversion of 5⁄6.
The principle of vertical sample rate conversion is based
on linear interpolation from two successive lines of video in
a frame to produce an output line in either a field or a
frame.
Box generation
A rectangular box is defined by the coordinates of the
left-upper edge (hor_start_box, vert_start_box) and the
right-lower edge (hor_stop_box, vert_stop_box). The
reference for the coordinates are the HD positive edge
(with some processing delay) for the horizontal direction
and the VD positive edge for the vertical.
The vertical sample rate conversion factor can be switched
to the following settings for increasing the number of
output lines w.r.t. the number of input lines; see Table 1.
Table 1 Vertical sample rate conversion factor
The box can serve the following purposes:
INPUT LINES
OUTPUT LINES
FACTOR
• Switch between adaptive and fixed k in noise reduction.
If k-fixed is set to 0, then the box switches between
adaptive noise reduced and fully still picture areas. This
provides an option for producing multi picture (still)
images. If no noise reduction is desired in the area
where NR is adaptive, the adaptive setting can be
programmed with k steps to all zeros.
2
14
12
10
8
2
1.00
1.14
1.16
1.20
1.25
1.33
1.40
1.50
1.60
1.67
1.75
2.00
16
14
12
10
8
6
• Switch the movie phase detect measurement to a
defined area of the video.
10
4
14
6
10
6
16
10
14
4
8
2
Decreasing the number of lines on the display w.r.t. the
number of input lines is only possible with progressive
scan output.
1996 Oct 25
10
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
RE2
Read enable for FM2, processed from RE by PROZONIC.
hor_start_box
hor_stop_box
handbook, halfpage
WE2
Write enable for FM2, processed from RE by PROZONIC.
vert_start_box
HO
Holds the writing of the LC display when active.
AUX
vert_stop_box
MGE033
Spare output from line-sequencer.
VD
Field frequent reset signal, used in PROZONIC to reset
line counting for boxing. The rising edge of VD is taken as
reference. This may be the display related vertical pulse.
Fig.7 Box dimensions and position.
Control and microcontroller (SNERT-) interface
SNRST
Field frequent asynchronous reset signal, used in
PROZONIC to reset the communication with
microcontroller. After the rising edge of SNRST,
communication is in its defined state. SNRST is also used
to define the initial phase of the line-sequencer.
CONTROL SIGNALS
CK
Line-locked clock of nominal 27 or 32 MHz. This is the
system clock, nominally 864 or 1024 × fh, where fh is the
line frequency. Within the PROZONIC, CK is distributed to
different blocks.
SNCL
microcontroller interface clock signal. This signal is
transferred asynchronous to CK by a microcontroller
(UART of 8051 family, mode 0) as communication clock
signal at a frequency of 1 MHz.
HD
Horizontal reference signal. This signal defines with its
rising edge the start phase of the UV 4 : 1 : 1 format. If the
HD signal has a period equal to 4 clock periods, the UV
data will remain in phase without disruptions, once it has
become in phase. For any mismatch between the applied
HD to the UV data phase, an appropriate HD delay can be
set in the PROZONIC. HD is also used to count lines for
boxing.
SNDA
microcontroller interface data signal. This signal is
transferred or received (asynchronous to CK) by a
microcontroller (UART of 8051 family, mode 0) as
communication data signal at 1 MBaud, related to SNCL.
RE
EXTERNAL CONTROL
Master read enable from memory controller or
The PROZONIC is controlled via the microcontroller
(SNERT) interface, by sending an address byte and a data
byte to it, with the controllable items as in the register
descriptions in Tables 2 and 3.
ECOBENDIC. This signal controls the memory read
enable if only one field memory is present. To control two
field memories, the PROZONIC generates RE1, RE2 and
WE2 from RE. The vertical sample rate conversion
function has a major influence on these signals.
RE1
Read enable for FM1, processed from RE by PROZONIC.
1996 Oct 25
11
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
Table 2 Write registers
REGISTER
BIT
NAME
FUNCTION
Register 10H to 13H (Kstep)
10H
11H
12H
13H
0 to 3 Kstep0
step in adaptive curve from k = 1⁄16 to k = 1⁄8; weight of 1
step in adaptive curve from k = 1⁄8 to k = 2⁄8; weight of 1
step in adaptive curve from k = 2⁄8 to k = 3⁄8; weight of 2
step in adaptive curve from k = 3⁄8 to k = 4⁄8; weight of 2
step in adaptive curve from k = 4⁄8 to k = 5⁄8; weight of 4
step in adaptive curve from k = 5⁄8 to k = 6⁄8; weight of 4
step in adaptive curve from k = 6⁄8 to k = 7⁄8; weight of 8
step in adaptive curve from k = 7⁄8 to k = 8⁄8; weight of 8
4 to 7 Kstep1
0 to 3 Kstep2
4 to 7 Kstep3
0 to 3 Kstep4
4 to 7 Kstep5
0 to 3 Kstep6
4 to 7 Kstep7
Register 14H (fixed_k)
14H 0 to 3 fixed_k
4 to 5 mult
determines k value in fixed k mode; see Table 8
weighting of TF2 output; see Table 9
6
7
_upbox
_adfix
microcontroller (_upbox = 0) or box controlled (_upbox = 1); see Table 6
adaptive (_adfix = 0) or fixed k (_adfix = 1); see Table 6
Register 15H (Tfilter)
15H
0 to 1 Tfilter1_select determines filter1 characteristic; see Table 5
2 to 7 Tfilter2_select determines filter2 characteristic; see Table 7
Register 16H (hor_start_box)
16H
0 to 7 hor_start_box horizontal start position of box w.r.t. picture
Register 17H (hor_stop_box)
17H
0 to 7 hor_stop_box horizontal stop position of box w.r.t. picture
Register 18H and 19H (vert_start_box)
18H (bit 8 = 0)
19H (bit 8 = 1)
0 to 7 vert_start_box vertical start position of box w.r.t. picture; bit 8 (MSB) is encoded in the
address
Register 1AH and 1BH (vert_stop_box)
1AH (bit 8 = 0)
1BH (bit 8 = 1)
0 to 7 vert_stop_box vertical stop position of box w.r.t. picture; bit 8 (MSB) is encoded in the
address
Register 1CH (box generation and UV processing)
1CH
0
1
UV8bit
UVbin
U/V signals are taken from input as 8-bit values instead of 7-bit
U/V signals are taken from input as binary signals instead of
twos complement
2
inv_box
en_box
inversion of box signal (inv_box = 1)
overall enable box signal
3
4
en_box_mpd enable box signal to define movie phase detection area
5
boxPSC
box generation for progressive scan with more than 511 lines
reserved
6, 7
Register 1DH (reserved)
1996 Oct 25
12
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
REGISTER
Register 1EH (horizontal delay)
1EH 0 to 2 in_del
BIT
NAME
FUNCTION
programmable horizontal delay (0 to 7 clock periods) of the luminance data
input in comparison to the U/V data input (from FM1)
3, 4
5, 6
7
HD_del
determines 1 to 4 clock pulse shift for horizontal reference HD
determines 1 to 4 clock pulse shift for WE2 output
reserved
WE2_del
Register 1FH (sequence data)
1FH 0 to 2 mix
setting of mixer to 0, 1⁄4, 1⁄4, 1⁄2, 1⁄2, 3⁄4, 3⁄4, 1; setting per line in 1 to 16 lines
of line sequencer
3
4
5
6
7
post_zoom
setting of multiplexer pre or post LM_zoom to MIX; setting per line in
1 to 16 lines of line sequencer
post_lfr
mem_hold
o_hold
aux
setting of multiplexer pre or post LM_lfr to MIX; setting per line in
1 to 16 lines of line sequencer
setting of field and line memory hold; setting per line in 1 to 16 lines of line
sequencer
setting of output hold, may stop e.g. LC display; setting per line in
1 to 16 lines of line sequencer
setting of auxiliary sequencer output signal; setting per line in 1 to 16 lines
of line sequencer
Register 20H (sequence length)
20H
0 to 3 seq_length
4 to 7
setting of sequence length to 1, 2, 3 to 16 lines
reserved
Register 21H (field control 1); note 1
21H
0
FCM4
see Fig.12 and Table 10
1
FCM23
FCM1
2
3, 4
5, 6
7
fixselUV
fixselY
RAM1wr
defines UV data output; see Fig.12 and Table 11
defines Y data output; see Fig.12 and Table 11
selects RAM1 for write operation; note 2; see Fig.13
Register 22H (field control 2); note 1
22H
0
WE2act
RE1del
RE2del
WE2del
UV_av
activates field controlled write enable 2 for FM2
1, 2
3, 4
5, 6
7
line delay for read enable 1 (FM1) w.r.t. RE input (pin 39)
line delay for read enable 2 (FM2) w.r.t. RE input (pin 39)
line delay for write enable 2 (FM2) w.r.t. RE input (pin 39)
UV averaged while luminance signal is median filtered
Notes
1. Data will be active after next VD pulse (pin 40).
2. In normal conditions control bit should be toggled field by field.
1996 Oct 25
13
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
Table 3 Read registers
Table 6 Adaptive/fixed_k selection
Dynamic box signal, active in user defined rectangular
part of the picture, enable with en_box, may be inverted
with inv_box.
REGISTER
Register 26H (MPD_LSB)
26H 0 to 7
Register 27H (MPD_MSB)
27H 0 to 7
BIT
NAME
MPD_LSB
_upbox
_adfix
box
k
0
0
0
0
1
1
1
1
0
0
X(1)
X(1)
X(1)
X(1)
0
adapt
adapt
fixed
fixed
fixed
adapt
fixed
adapt
MPD_MSB
1
Table 4 Output multiplex control
1
X(1)
X(1)
X(1)
X(1)
output_mux[2:0]
THROUGHPUT
1
000
011
111
video
grey
0
1
sawtooth
Note
Table 5 Filter1 characteristic
1. X = don’t care bits.
Tfilter1_select[1:0]
Tfilter1-TRANSFER (z)
00
01
10
11
1
1⁄2 × z + 1 + 1⁄2 × z−1
1
⁄
2
1⁄2 × z + 1⁄2 + 1⁄2 × z−1
MGE035
15
handbook, halfpage
10
IH_TF1I
(dB)
5
0
(1)
−5
(2)
−10
−15
−20
−25
1/4 f
1/2 f
s
s
⁄ ⁄ .
TF1(z) = 1 2 z + a + 1 2 z−1
(1) a = 1.
(2) a = 1⁄2.
Fig.8 Characteristic pre-filter TF1.
14
1996 Oct 25
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
Table 7 Filter2 characteristic
Tfilter2_select[5:0]
Tfilter2-TRANSFER (z)
1⁄2 × z2 + 1⁄2 × z + 1 + 1⁄2 × z−1 + 1⁄2 × z−2
HEX
DECIMAL
00
01
02
04
05
06
08
09
0A
10
11
12
14
15
16
18
19
1A
20
21
22
24
25
26
28
29
2A
00
01
02
04
05
06
08
09
10
16
17
18
20
21
22
24
25
26
32
33
34
36
37
38
40
41
42
1 × z2 + 1⁄2 × z + 1 + 1⁄2 × z−1 + 1 × z−2
0 × z2 + 1⁄2 × z + 1 + 1⁄2 × z−1 + 0 × z−2
1⁄2 × z2 + 1 × z + 1 + 1 × z−1 + 1⁄2 × z−2
1 × z2 + 1 × z + 1 + 1 × z−1 + 1 × z−2
0 × z2 + 1 × z + 1 + 1 × z−1 + 0 × z−2
1⁄2 × z2 + 0 × z + 1 + 0 × z−1 + 1⁄2 × z−2
1 × z2 + 0 × z + 1 + 0 × z−1 + 1 × z−2
0 × z2 + 0 × z + 1 + 0 × z−1 + 0 × z−2
1⁄2 × z2 + 1⁄2 × z + 2 + 1⁄2 × z−1 + 1⁄2 × z−2
1 × z2 + 1⁄2 × z + 2 + 1⁄2 × z−1 + 1 × z−2
0 × z2 + 1⁄2 × z + 2 + 1⁄2 × z−1 + 0 × z−2
1⁄2 × z2 + 1 × z + 2 + 1 × z−1 + 1⁄2 × z−2
1 × z2 + 1 × z + 2 + 1 × z−1 + 1 × z−2
0 × z2 + 1 × z + 2 + 1 × z−1 + 0 × z−2
1⁄2 × z2 + 0 × z + 2 + 0 × z−1 + 1⁄2 × z−2
1 × z2 + 0 × z + 2 + 0 × z−1 + 1 × z−2
0 × z2 + 0 × z + 2 + 0 × z−1 + 0 × z−2
1⁄2 × z2 + 1⁄2 × z + 0 + 1⁄2 × z−1 + 1⁄2 × z−2
1 × z2 + 1⁄2 × z + 0 + 1⁄2 × z−1 + 1 × z−2
0 × z2 + 1⁄2 × z + 0 + 1⁄2 × z−1 + 0 × z−2
1⁄2 × z2 + 1 × z + 0 + 1 × z−1 + 1⁄2 × z−2
1 × z2 + 1 × z + 0 + 1 × z−1 + 1 × z−2
0 × z2 + 1 × z + 0 + 1 × z−1 + 0 × z−2
1⁄2 × z2 + 0 × z + 0 + 0 × z−1 + 1⁄2 × z−2
1 × z2 + 0 × z + 0 + 0 × z−1 + 1 × z−2
0 × z2 + 0 × z + 0 + 0 × z−1 + 0 × z−2
1996 Oct 25
15
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
MGE037
MGE036
15
15
handbook, halfpage
handbook, halfpage
10
10
IH_TF2I
(dB)
IH_TF2I
(dB)
5
5
(2)
0
−5
0
(1)
(2)
(1)
−5
−10
−15
−20
−25
−10
−15
−20
−25
1/4 f
1/2 f
s
1/4 f
1/2 f
s
s
s
TF2(z) = a z2 + b z + 2 c + b z−1 + a z−2
.
TF2(z) = a z2 + b z + 2 c + b z−1 + a z−2
.
(1) b = 1.
(2) b = 0.
(1) c = 0.
(2) c = 1.
Fig.9 Characteristic pre-filter TF2 (a = 0; b = 1).
Fig.10 Characteristic pre-filter TF2 (a = 1; c = 1).
Table 8 Fixed_k setting
Table 9 Mult setting
Fixed_k SETTING [3:0]
k
MULT SETTING [1:0]
FACTOR
HEX
DECIMAL
HEX
DECIMAL
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
0
00
01
02
03
00
01
02
03
1
2
4
8
1
2
3
4
5
6
7
8
9
⁄
16
⁄
⁄
⁄
⁄
⁄
⁄
⁄
⁄
16
16
16
16
16
16
16
16
10
11
12
13
14
16
⁄
16
⁄
16
⁄
16
⁄
16
⁄
16
⁄
16
1996 Oct 25
16
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
MGE034
1
14/16
k
12/16
10/16
8/16
6/16
4/16
2/16
0
1
10
20
30
40
50
60
70
80
90
100
110
120
128
input amplitude
Fig.11 k factor curve (example) from filter TF2 and multiplier (see Fig.6).
a
FM1
MUX2
b
a
a
b
MEDIAN (Y)
or
MULTIPLEXER (UV)
data
output
MUX1
LM1
MUX4
LM2
b
a
b
MUX3
FM2
fixselY
fixselUV
CONTROL LOGIC
FCM23
FCM1
FCM4
MGE030
FM1 and FM2: field memories (external).
LM1 and LM2: line memories.
Fig.12 Extract of the Progressive scan-Zoom and Noise reduction IC (PROZONIC) data path.
17
1996 Oct 25
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
Table 10 Field controlled output
FIELD CONTROLLED OUTPUT TO MEDIAN (Y) OR MULTIPLEXER (UV)
MUX1 MUX2 MUX3 MUX4
FCM23(1)
FCM1(2)
FCM4(3)
0
0
1
1
1
1
X
X
0
0
1
1
0
1
0
1
0
1
X
FM1
FM1
FM1
FM1
FM2
FM2
FM1
FM2
FM1
X
FM2
FM2
FM1
FM1
FM2/1H delay
FM2/1H delay
FM2
FM2/1H delay
FM1/1H delay
FM2
FM1/1H delay
FM1/1H delay
FM2
Notes
1. FCM23 is the field controlled MUX2, MUX3.
2. FCM1 is the field controlled MUX1.
3. FCM4 is the field controlled MUX4.
Table 11 Data output
fixselY/fixselUV
DATA OUTPUT FROM
HEX
DECIMAL
00
01
02
03
00
01
02
03
MUX2
MUX4/1H delay
MUX3
MEDIAN (Y)/median controlled MULTIPLEXER (UV)
RAM1
sequence data 1
sequence data 2
to
(1)
sequence data n
from SNERT
register
to internal
processing
RAM2
R/W control
(RAM1wr)
sequence data 1
sequence data 2
to
(1)
sequence data n
MGE031
(1) n = sequence length + 1
Fig.13 Internal RAM control.
18
1996 Oct 25
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
For each of the functions vert_start_box and
Microcontroller interface (SNERT)
vert_stop_box, two addresses are used, in which the LSB
from the address is taken as an extra MSB for the data.
This is done because vert_start_box and vert_stop_box
must be supplied with 9-bit data. All other data from the
SNERT-bus has only relevance in the 7:0 range.
In the microcontroller interface the external signals SNDA
and SNCL are processed to address and data. Data
enable pulses are derived from the received addresses.
The data enable pulses are used elsewhere for input
enabling the delivered data into various control registers.
During the data phases (phase 8 to 15), each negative
edge produces a shift pulse for the movie phase detect
circuit that produces output data on the SNDA signal. The
data enables for the movie phase detect circuit are active
in all of the data phases, when an address 26 or 27 has
been decoded.
The microcontroller interface operates in a few stages:
1. SNCL positive and negative edges are sampled
2. on each negative edge of SNCL and SNDA data is
shifted in a shift register
3. starting from phase 0, a counter counts positive edges
of SNCL
After an MPD read transmission it is necessary to send a
second (dummy) transmission to the PROZONIC.
4. during phase 7, but waited for a negative edge of
SNCL, so after the 8th negative edge of SNCL, an
address latch enable pulse is made, whereby the shift
register contents are taken over in the address register
5. in the address range 10H to 27H, the addresses are
decoded in two steps
6. during phase 15, but waited for a negative edge of
SNCL, so after the 16th negative edge of SNCL, the
address has been decoded and will be passed to any
of the data enable pulses.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER
VI
MIN.
−0.5
MAX.
+7
UNIT
input voltage
V
VDDD
VDDA
Tstg
digital supply voltage
analog supply voltage
storage temperature
−0.5
−0.5
−65
0
+7
V
+7
V
+150
70
°C
°C
Tamb
operating ambient temperature
1996 Oct 25
19
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
CHARACTERISTICS
VDDD = 4.5 to 5.5 V; Tamb = 0 to 70 °C; unless otherwise specified.
SYMBOL
Supply
VDDD
IDDD
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
supply voltage
supply current
4.5
5.5
V
−
180
mA
Digital inputs
VIL
LOW level input voltage except CK
LOW level input voltage for CK
HIGH level input voltage except CK
HIGH level input voltage for CK
input leakage current
−0.5
−0.5
2.0
2.4
−
+0.8
V
+0.6
V
VIH
VDDD + 0.5
V
VDDD + 0.5
V
ILI
CI
10
10
µA
pF
input capacitance
−
Digital outputs
VOH
VOL
HIGH level output voltage
LOW level output voltage
note 1
note 1
2.4
0
VDDD
0.6
V
V
Timing
TcyCK
δCK
tr
CK cycle time
27
40
−
−
ns
%
CK duty factor tCKH/tCKL
CK rise time
60
5
ns
ns
ns
ns
ns
ns
tf
CK fall time
−
6
tSU
tHD
tOH
tOD
input data set-up time
input data hold time
output data hold time
output data delay time
−
3
−
3
note 1
note 1
3
−
−
23
Data output loads (3-state outputs)
CL
output load capacitance
10
10
20
35
pF
pF
output load capacitance for RE1, RE2, WE2
and SNDA
Note
1. Timings and levels have to be measured with load circuits 1.2 kΩ connected to 3.0 V (TTL load) and CL = 20 pF.
1996 Oct 25
20
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
Input/output timing
t
t
r
f
2.4 V
1.5 V
CLOCK
CK1, CK2
0.6 V
T
cyCKH
T
cyCK
t
HD
t
SU
2.0 V
0.8 V
INPUT
DATA
t
OD
t
OH
2.4 V
OUTPUT
DATA
0.6 V
MGE032
Fig.14 Timing diagram.
1996 Oct 25
21
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
APPLICATION INFORMATION
Table 12 Abbreviations used in Fig.15
BLND horizontal blanking signal, display related
The basic application of PROZONIC in a feature box is
shown in Fig.15. Here, apart from the data streams, the
‘timed control data’ streams indicate that some memory
control signals have to be processed by the PROZONIC,
in order to let the vertical sample rate conversion function
correctly.
HDFL
horizontal synchronization signal, deflection
related
HA
horizontal synchronization signal, acquisition
related
HRA
HRD
horizontal reference signal, acquisition related
horizontal reference signal, display related
Horizontal scaling factors are performed by the memory
controller SAA4951WP/SAA4952H.
HRDFL horizontal reference signal, deflection related
All basic clock signals in the feature box are provided by
the memory controller, nominal frequencies on the double
scan parts of the system are 27, 32 or 36 MHz. In any case
the display frequency is decoupled from the acquisition
clock.
IE
input enable signal
LLA
LLD
line locked clock signal, acquisition related
line locked clock signal, display related
LLDFL line locked clock signal, deflection related
RE read enable signal
The memory controller supplies the deflection processor
with clock, horizontal and vertical pulses.
RSTR reset read signal
RSTW reset write signal
The SNERT-bus is used to control the PROZONIC at a
data rate of typically 1 Mbits/s.
SCL
SDA
serial clock signal (I2C-bus)
serial data signal (I2C-bus)
SNERT synchronous no parity eight bit reception and
transmission (serial control bus)
SRC
SWC
VA
serial read clock signal
serial write clock signal
vertical synchronization signal,
acquisition related
VDFL
vertical synchronization signal,
deflection related
1996 Oct 25
22
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
WE2
RE2
n.c.
+5 V
C0
C1
18,19,
20
1,36 16,17 21
B0
B1
24 23
63,64,
65,66
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
31
30
29
28
27
26
25
24
35
34
33
32
15
14
13
10
9
6
29
30
31
32
35
36
37
38
25
26
27
28
7
C2
B2
8
C3
B3
9
C4
B4
10
11
12
13
2
C5
B5
8
FM 2
C6
B6
TMS4C2970
7
C7
B7
6
C8
B8
19
18
17
16
C9
B9
3
C10
C11
B10
B11
4
PROZONIC
SAA4990H
5
15,22 14,23
+5 V
RSTR
5,12,22,33,45
51,58,74
40,60
20
+5 V
SRC
RE1
1.5
µF
10
nF
220
nF
220
nF
+5 V
1,2,4,11,21,34
46,52,59,73
10 kΩ
3
2
4
13
8
A0
A1
D0
9,25,
40,62,
65,66
0
1
18,19, 1,36 22
20
23 21
8,27,
60,63,
68
59
24
25
26
27
28
29
30
31
19
20
21
22
28
29
30
31
32
33
34
35
24
25
26
27
76
75
72
71
70
69
68
67
80
79
78
77
48
49
50
53
54
55
56
57
42
43
44
47
9
45
46
47
48
49
50
51
52
41
42
43
44
D1
D2
8
Y
−(R−Y)
−(B−Y)
A2
in
in
in
2
3
9
7
7
Y
out
A3
D3
3
61
67
64
6
−(R−Y)
−(B−Y)
A4
D4
4
out
out
5
A5
D5
5
ADC
4
FM 1
TMS4C2970
BENDIC
SAA7158
A6
D6
6
TDA8755
100 nF
100 nF
3
18 nF
33 nF
33 nF
54
57
A7
D7
7
5
2
A8
D8
8
13
12
11
10
A9
D9
9
11
12
A10
A11
D10
D11
10
11
10,
18
6,23,
32
20,21,
22
39
41
62
61
26 19
23
24
15 16 17
14
15
17
16
IE
SWC RSTW WE
RE
1
2
0
1
2
SNERT
BLND
+5 V
2
0
1
6
2
13
11
3
42
8
7
4
18
20
0
1
2
3
4
5
6
7
8
9
25
26
27
28
29
30
31
32
21
22
43
42
41
40
39
38
37
36
33
22
12,24,34,44
+5 V
35,44
10
ECO 3
SAA4951
µC
S87C654
2.2 µF
2,10,23,36
39
+5 V
8
9
VA
SCL
SDA
18,19
15 14
37
1
11
35
33
13
43
LLD
38
20
21
HDFL HRD HRA HRDFL
LLDFL LLA
12 MHz
22 pF
22 pF
VDFL
LLDFL
DEFLECTION PLL
ACQUISITION PLL
DISPLAY PLL
HA
HDFL
MGE025
Fig.15 Application circuit.
23
1996 Oct 25
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
PACKAGE OUTLINE
QFP80: plastic quad flat package; 80 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm
SOT318-2
y
X
A
64
65
41
40
Z
E
e
A
2
H
A
E
(A )
3
E
A
1
w M
p
θ
pin 1 index
L
p
b
L
80
25
detail X
1
24
w M
Z
v
M
M
D
A
B
b
p
e
D
B
H
v
D
0
5
scale
10 mm
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.25 2.90
0.05 2.65
0.45 0.25 20.1 14.1
0.30 0.14 19.9 13.9
24.2 18.2
23.6 17.6
1.0
0.6
1.0
0.6
1.2
0.8
mm
3.2
0.25
0.8
1.95
0.2
0.2
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-02-04
97-08-01
SOT318-2
1996 Oct 25
24
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
If wave soldering cannot be avoided, the following
conditions must be observed:
SOLDERING
Introduction
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Even with these conditions, do not consider wave
soldering the following packages: QFP52 (SOT379-1),
QFP100 (SOT317-1), QFP100 (SOT317-2),
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
QFP100 (SOT382-1) or QFP160 (SOT322-1).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering
Reflow soldering techniques are suitable for all QFP
packages.
The choice of heating method may be influenced by larger
plastic QFP packages (44 leads, or more). If infrared or
vapour phase heating is used and the large packages are
not absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our “Quality
Reference Handbook” (order code 9397 750 00192).
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
Wave soldering
Wave soldering is not recommended for QFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
1996 Oct 25
25
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Oct 25
26
Philips Semiconductors
Preliminary specification
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
NOTES
1996 Oct 25
27
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Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1996
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1200/01/pp28
Date of release: 1996 Oct 25
Document order number: 9397 750 01435
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