NTMFS0D8N02P1ET1G [ONSEMI]
MOSFET, Power, 25V Single N-Channel, SO-8FL;型号: | NTMFS0D8N02P1ET1G |
厂家: | ONSEMI |
描述: | MOSFET, Power, 25V Single N-Channel, SO-8FL |
文件: | 总8页 (文件大小:231K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MOSFET - Power, Single
N-Channel, SO8-FL
25 V, 0.68 mW, 365 A
NTMFS0D8N02P1E
Features
• Small Footprint (5x6mm) for Compact Design
www.onsemi.com
• Low R
to Minimize Conduction Losses
DS(on)
• Low Q and Capacitance to Minimize Driver Losses
G
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
Compliant
0.68 mW @ 10 V
0.80 mW @ 4.5 V
25 V
365 A
Applications
• DC−DC Converters
• Power Load Switch
• Notebook Battery Management
D (5−8)
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
Unit
V
V
DSS
25
G (4)
Gate−to−Source Voltage
V
GS
+16/
−12
V
S (1,2,3)
N−CHANNEL MOSFET
Continuous Drain
Current R
T
= 25°C
=85°C
= 25°C
I
365
263
139
A
C
D
q
JC
T
Steady
(Note 1)
C
C
State
Power Dissipation
T
P
W
A
D
D
D
MARKING
DIAGRAMS
D
R
(Note 1)
q
JC
Continuous Drain
Current R
T = 25°C
A
I
D
55
40
q
JA
S
S
S
D
D
T = 85°C
A
Steady
State
(Notes 1, 3)
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
2EFN
AYWZZ
Power Dissipation
T = 25°C
A
P
3.2
W
A
R
(Notes 1, 3)
q
JA
G
1
D
Continuous Drain
Current R
T = 25°C
A
I
D
30
21
q
JA
2EFN = Specific Device Code
T = 85°C
A
Steady
State
(Notes 2, 3)
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceabililty
Power Dissipation
T = 25°C
A
P
0.93
W
R
(Notes 2, 3)
q
JA
Pulsed Drain Current T = 25°C, t = 10 ms
I
DM
762
666
A
A
p
Single Pulse Drain−to−Source Avalanche
Energy (I = 115.4 A , L = 0.1 mH) (Note 4)
E
AS
mJ
L
pk
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 6 of this data sheet.
Operating Junction and Storage Temperature
Range
T , T
−55 to
+150
°C
°C
J
STG
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
260
L
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
1. Surface−mounted on FR4 board using 1 in pad size, 2 oz Cu pad.
2. Surface−mounted on FR4 board using minimum pad size, 2 oz Cu pad.
3. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted. Actual continuous current will be limited by thermal & electro−mechanical
application board design. R
is determined by the user’s board design.
AS
q
JC
4. 100% UIS tested at L = 1 mH, I = 30.7 A.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
April, 2021 − Rev. 1
NTMFS0D8N02P1E/D
NTMFS0D8N02P1E
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
0.9
Unit
Junction−to−Case – Steady State (Note 1)
Junction−to−Ambient – Steady State (Note 1)
Junction−to−Ambient – Steady State (Note 2)
R
q
JC
°C/W
°C/W
R
39
q
JA
R
135
q
JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 1 mA
25
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
I
D
= 1 mA. ref to 25°C
16
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
= 0 V,
T = 25°C
1
DSS
GS
DS
J
V
= 20 V
mA
T = 125°C
J
250
100
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
I
V
= 0 V, V = +16 V/−12 V
nA
GSS
DS
GS
V
V
= V , I = 2 mA
1.2
2.0
V
GS(TH)
GS
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
I = 2 mA. ref to 25°C
D
−4.4
0.44
0.54
307
mV/°C
GS(TH)
J
R
V
= 10 V, I = 46 A
0.68
0.80
DS(on)
GS
GS
D
mW
V
= 4.5 V, I = 43 A
D
Forward Transconductance
Gate Resistance
g
FS
V
DS
= 5 V, I = 46 A
S
D
R
T = 25°C
A
0.48
W
G
CHARGES AND CAPACITANCES
Input Capacitance
C
8600
2285
129
52
ISS
Output Capacitance
C
V
GS
= 0 V, V = 13 V, f = 1 MHz
pF
OSS
RSS
DS
Reverse Transfer Capacitance
Total Gate Charge
C
Q
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
Q
10
G(TH)
V
= 4.5 V, V = 13 V; I = 46 A
nC
nC
GS
DS
D
Q
21
GS
Q
9
GD
Q
V
= 10 V, V = 13 V; I = 46 A
116
G(TOT)
GS
DS
D
SWITCHING CHARACTERISTICS, V = 4.5 V (Note 6)
GS
Turn−On Delay Time
Rise Time
t
45
24
68
20
d(ON)
t
r
V
= 4.5 V, V = 13 V,
DS
GS
D
ns
I
= 46 A, R = 6.0 W
G
Turn−Off Delay Time
Fall Time
t
d(OFF)
t
f
SWITCHING CHARACTERISTICS, V = 10 V (Note 6)
GS
Turn−On Delay Time
Rise Time
t
23
6.8
123
19
d(ON)
t
r
V
= 10 V, V = 13 V,
DS
GS
D
ns
V
I
= 46 A, R = 6.0 W
G
Turn−Off Delay Time
Fall Time
t
d(OFF)
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
T = 25°C
0.77
0.62
1.2
J
V
= 0 V,
= 46 A
GS
I
S
T = 125°C
J
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2
NTMFS0D8N02P1E
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
DRAIN−SOURCE DIODE CHARACTERISTICS
Reverse Recovery Time
t
64
87
ns
RR
V
GS
= 0 V, dIS/dt = 100 A/ms,
I
= 46 A
S
Reverse Recovery Charge
Q
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
NTMFS0D8N02P1E
TYPICAL CHARACTERISTICS
300
250
200
150
100
300
250
V
GS
= 10 V to 3.2 V
2.8 V
200
150
T = 25°C
J
100
2.6 V
50
0
50
0
T = 125°C
J
T = −55°C
J
0
1
2
3
0
1
2
3
4
5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
5
4
3
2
1.0
0.9
0.8
0.7
0.6
0.5
T = 25°C
D
T = 25°C
J
J
I
= 46 A
V
= 4.5 V
= 10 V
GS
V
GS
0.4
0.3
0.2
1
0
2
3
4
5
6
7
8
9
10
20
60
100
140
180
220
260 300
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
100K
10K
1K
1.8
T = 150°C
J
V
= 10 V
= 46 A
GS
1.6
1.4
1.2
1.0
0.8
I
D
T = 125°C
J
T = 85°C
J
100
10
T = 25°C
J
1
0.6
0.4
0.1
−50 −25
0
25
50
75 100 125 150 175
5
7
9
11
13 15
17 19
21 23 25
T , JUNCTION TEMPERATURE (°C)
J
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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4
NTMFS0D8N02P1E
TYPICAL CHARACTERISTICS
100K
10K
1K
10
9
C
ISS
8
7
6
5
4
3
2
C
OSS
C
RSS
Q
100
GD
Q
GS
V
I
= 13 V
= 46 A
V
= 0 V
DS
GS
10
1
T = 25°C
D
J
1
0
T = 25°C
J
f = 1 MHz
0
5
10
15
20
25
100
100
0
20
40
60
80
100
120
V
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
DS
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
100
100
10
V
= 0 V
GS
t
t
d(off)
d(on)
T = 125°C
t
r
J
10
1
1
t
f
V
V
= 4.5 V
= 13 V
GS
DS
I
D
= 46 A
T = −55°C
J
T = 25°C
J
0.1
1
10
R , GATE RESISTANCE (W)
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
100
25°C
100°C
500 ms
10
10
1 ms
10 ms
100 ms
1 s
T
= 25°C
Single Pulse
C
125°C
V
≤ 10 V
GS
1
R
Limit
DS(on)
Thermal Limit
Package Limit
0.1
1
0.00001 0.0001 0.001
0.1
1
10
0.01
T , TIME IN AVALANCHE (s)
AV
0.1
1
10
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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5
NTMFS0D8N02P1E
TYPICAL CHARACTERISTICS
1
50% Duty Cycle
20%
10%
0.1
5%
2%
1%
0.01
Single Pulse
0.001
0.00001
0.0001
0.001
PULSE TIME (sec)
0.01
0.1
1
Figure 13. Thermal Impedance
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NTMFS0D8N02P1ET1G
2EFN
DFN5
(Pb−Free)
1500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
SCALE 2:1
2 X
DATE 25 JUN 2018
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
MIN
0.90
0.00
0.33
0.23
5.00
4.70
3.80
6.00
5.70
3.45
NOM
1.00
−−−
0.41
0.28
5.15
4.90
4.00
6.15
MAX
1.10
0.05
0.51
0.33
5.30
5.10
4.20
6.30
6.10
3.85
4 X
q
E1
2
c
A1
5.90
3.65
1
2
3
4
1.27 BSC
0.575
1.35
0.575
0.125 REF
3.40
0.51
1.20
0.51
0.71
1.50
0.71
TOP VIEW
C
SEATING
DETAIL A
PLANE
0.10
0.10
C
C
3.00
0
3.80
q
−−−
12
A
_
_
GENERIC
SIDE VIEW
MARKING DIAGRAM*
DETAIL A
1
8X b
A B
XXXXXX
AYWZZ
0.10
0.05
C
c
e/2
e
L
1
4
XXXXXX = Specific Device Code
A
Y
= Assembly Location
= Year
K
RECOMMENDED
SOLDERING FOOTPRINT*
W
ZZ
= Work Week
= Lot Traceability
E2
2X
PIN 5
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
(EXPOSED PAD)
L1
0.495
4.560
2X
1.530
D2
G
2X
BOTTOM VIEW
0.475
3.200
1.330
4.530
STYLE 1:
STYLE 2:
PIN 1. ANODE
2. ANODE
2X
0.905
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
1
3. ANODE
4. NO CONNECT
5. CATHODE
0.965
5. DRAIN
4X
1.000
1.270
PITCH
DIMENSIONS: MILLIMETERS
4X
0.750
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
PAGE 1 OF 1
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© Semiconductor Components Industries, LLC, 2018
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