NTD60N02RT4G [ONSEMI]
Power MOSFET 62 A, 24 V, N−Channel, DPAK; 功率MOSFET 62 A， 24 V ， N沟道， DPAK
| 型号： | NTD60N02RT4G |
| 厂家： | 
ONSEMI |
| 描述： | Power MOSFET 62 A, 24 V, N−Channel, DPAK |
| 文件： | 总8页 (文件大小：85K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NTD60N02R
Power MOSFET
62 A, 24 V, N−Channel, DPAK
Features
• Planar HD3e Process for Fast Switching Performance
• Low R
to Minimize Conduction Loss
DS(on)
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• Low C to Minimize Driver Loss
iss
• Low Gate Charge
• Optimized for High Side Switching Requirements in
High−Efficiency DC−DC Converters
V
R
TYP
I MAX
D
(BR)DSS
DS(on)
24 V
8.4 mW @ 10 V
62 A
• Pb−Free Packages are Available
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
N−Channel
J
D
Rating
Drain−to−Source Voltage
Symbol Value Unit
V
DSS
24
Vdc
Vdc
Gate−to−Source Voltage − Continuous
V
GS
±20
G
Thermal Resistance
Junction−to−Case
Total Power Dissipation @ T = 25°C
R
P
2.6
58
°C/W
W
q
JC
C
D
S
Drain Current
Continuous @ T = 25°C, Chip
I
I
I
62
50
32
A
A
A
C
D
D
D
Continuous @ T = 25°C, Limited by Package
C
4
Continuous @ T = 25°C, Limited by Wires
A
4
4
Thermal Resistance
Junction−to−Ambient (Note 1)
R
P
I
80
1.87
10.5
C/W
W
A
q
JA
Total Power Dissipation @ T = 25°C
2
3
A
D
2
1
1
Drain Current − Continuous @ T = 25°C
1
A
D
3
2
3
Thermal Resistance
Junction−to−Ambient (Note 2)
Total Power Dissipation @ T = 25°C
R
P
I
120
1.25
8.5
°C/W
W
A
q
JA
CASE 369AA
DPAK
CASE 369C
DPAK
CASE 369D
DPAK
A
D
Drain Current − Continuous @ T = 25°C
A
D
(Surface Mount) (Surface Mount) (Straight Lead)
STYLE 2
STYLE 2
STYLE 2
Operating and Storage Temperature
T , and −55 to
J
°C
T
stg
175
Single Pulse Drain−to−Source Avalanche Energy
E
AS
60
mJ
MARKING DIAGRAM
& PIN ASSIGNMENTS
− Starting T = 25°C
J
(V = 50 Vdc, V = 10.0 Vdc,
DD
GS
I = 11 Apk, L = 1.0 mH, R = 25 W)
4
L
G
Drain
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
T
L
260
°C
4
Drain
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR4 board using 0.5 in sq drain pad size.
2. When surface mounted to an FR4 board using the minimum recommended
pad size.
2
1
Gate
3
1
2
3
Drain
Source
Gate Drain Source
Y
WW
= Year
= Work Week
60N02R = Device Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
December, 2004 − Rev. 10
NTD60N02R/D
NTD60N02R
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Characteristic
OFF CHARACTERISTICS
Symbol
Min
Typ
Max
Unit
Drain−to−Source Breakdown Voltage (Note 3)
V
Vdc
mV/°C
mAdc
(BR)DSS
24
−
27.5
25.5
−
−
(V = 0 Vdc, I = 250 mAdc)
GS
D
Temperature Coefficient (Positive)
Zero Gate Voltage Drain Current
I
DSS
−
−
−
−
1.5
10
(V = 20 Vdc, V = 0 Vdc)
DS
GS
(V = 20 Vdc, V = 0 Vdc, T = 150°C)
DS
GS
J
Gate−Body Leakage Current (V = ±20 Vdc, V = 0 Vdc)
I
−
−
±100
nAdc
GS
DS
GSS
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3)
V
Vdc
mV/°C
mW
GS(th)
1.0
−
1.5
4.1
2.0
−
(V = V , I = 250 mAdc)
DS
GS
D
Threshold Temperature Coefficient (Negative)
Static Drain−to−Source On−Resistance (Note 3)
R
DS(on)
−
−
−
11.2
8.4
8.2
12.5
10.5
−
(V = 4.5 Vdc, I = 15 Adc)
GS
D
(V = 10 Vdc, I = 20 Adc)
GS
D
(V = 10 Vdc, I = 31 Adc)
GS
D
Forward Transconductance (V = 10 Vdc, I = 15 Adc) (Note 3)
g
FS
−
27
−
Mhos
pF
DS
D
DYNAMIC CHARACTERISTICS
Input Capacitance
C
−
−
−
1000
480
1330
640
iss
(V = 20 Vdc, V = 0 Vdc,
DS
GS
Output Capacitance
C
oss
f = 1.0 MHz)
Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
C
180
225
rss
t
−
−
−
−
−
−
−
7.0
33
−
−
−
−
−
−
−
ns
d(on)
t
r
(V = 10 Vdc, V = 10 Vdc,
GS
DD
I
D
= 31 Adc, R = 3.0 W)
G
Turn−Off Delay Time
Fall Time
t
19
d(off)
t
f
9.0
9.5
2.2
5.0
Gate Charge
Q
nC
T
(V = 4.5 Vdc, I = 31 Adc,
GS
D
Q
GS
GD
V
DS
= 10 Vdc) (Note 3)
Q
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage
V
−
−
−
0.88
1.15
0.80
1.2
−
−
Vdc
ns
(I = 20 Adc, V = 0 Vdc) (Note 3)
SD
S
GS
(I = 31 Adc, V = 0 Vdc)
S
GS
(I = 15 Adc, V = 0 Vdc, T = 125°C)
S
GS
J
Reverse Recovery Time
t
−
−
−
−
29.1
13.6
15.5
0.02
−
−
−
−
rr
(I = 31 Adc, V = 0 Vdc,
S
GS
t
a
dI /dt = 100 A/ms) (Note 3)
S
t
b
Reverse Recovery Stored Charge
Q
mC
rr
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
NTD60N02R
TYPICAL CHARACTERISTICS
140
120
V
GS
= 10 V
T = 25°C
J
V
DS
w 10 V
5.0 V
4.5 V
8.0 V
6.0 V
120
100
80
60
40
20
0
100
80
60
40
20
0
4.2 V
4.0 V
3.8 V
3.6 V
3.4 V
T = 175°C
J
3.2 V
3.0 V
2.8 V
T = 25°C
J
2.6 V
2.4 V
T = −55°C
J
0
2
4
6
8
10
0
2
4
6
8
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.05
0.04
0.03
0.02
0.01
0
0.05
0.04
0.03
0.02
0.01
0
T = 25°C
I
= 62 A
J
D
T = 25°C
J
V
GS
= 4.5 V
V
GS
= 10 V
120
4
6
2
8
10
20
40
60
80
100
140
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance versus
Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
100000
10000
1000
100
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
I
V
= 31 A
D
V
GS
= 0 V
= 10 V
GS
T = 175°C
J
T = 100°C
J
10
0
−50 −25
0
25
50
75
100 125 150 175
6
12
18
24
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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3
NTD60N02R
5
20
16
12
8
2000
1500
1000
500
0
T = 25°C
J
Q
T
C
iss
4
3
2
1
0
V
GS
V
= 0 V
Q
Q
DS
GS
GS
V
= 0 V
DS
C
iss
V
DS
C
rss
C
oss
4
C
rss
I
= 31 A
D
T = 25°C
J
0
10
10
5
0
5
10
15
20
0
2
4
6
8
V
V
DS
GS
Q , TOTAL GATE CHARGE (nC)
g
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and Drain−to−Source
Voltage versus Total Charge
1000
100
10
80
V
= 10 V
= 31 A
= 10 V
DD
V
= 0 V
GS
I
D
70
60
50
40
30
20
10
0
T = 25°C
J
V
GS
t
r
t
f
t
d(off)
t
d(on)
1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
1
10
100
R , GATE RESISTANCE (W)
G
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
100
10 ms
V
= 20 V
GS
SINGLE PULSE
T
C
= 25°C
100 ms
10
1 ms
10 ms
dc
R
LIMIT
DS(ON)
THERMAL LIMIT
PACKAGE LIMIT
1
0.1
1
10
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased Safe Operating Area
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4
NTD60N02R
1.0
D = 0.5
0.2
0.1
0.05
0.02
P
(pk)
0.1
R
(t) = r(t) R
q
JC
q
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
0.01
SINGLE PULSE
t
1
1
t
2
T
J(pk)
− T = P
R
q
(t)
JC
C
(pk)
DUTY CYCLE, D = t /t
1
2
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t, TIME (s)
Figure 12. Thermal Response
ORDERING INFORMATION
Order Number
†
Package
Shipping
NTD60N02R
DPAK−3
75 Units / Rail
75 Units / Rail
NTD60N02RG
DPAK−3
(Pb−Free)
NTD60N02RT4
DPAK−3
2500 / Tape & Reel
2500 / Tape & Reel
NTD60N02RT4G
DPAK−3
(Pb−Free)
NTD60N02R−001
NTD60N02R−1G
DPAK−3 Straight Lead
75 Units / Rail
75 Units / Rail
DPAK−3 Straight Lead
(Pb−Free)
NTD60N02R−032
NTD60N02R−032G
DPAK−3 Straight Lead
75 Units / Rail
75 Units / Rail
(3.2 ± 0.5 mm)
DPAK−3 Straight Lead
(3.2 ± 0.5 mm)
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifi-
cations Brochure, BRD8011/D.
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5
NTD60N02R
PACKAGE DIMENSIONS
DPAK
CASE 369C−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
SEATING
PLANE
−T−
2. CONTROLLING DIMENSION: INCH.
C
B
R
INCHES
DIM MIN MAX
MILLIMETERS
E
V
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.22
6.73
2.38
0.88
0.58
1.14
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.180 BSC
4
2
Z
A
K
S
1
3
4.58 BSC
U
0.034 0.040
0.018 0.023
0.102 0.114
0.090 BSC
0.87
0.46
2.60
1.01
0.58
2.89
K
L
2.29 BSC
F
J
R
S
U
V
Z
0.180 0.215
0.025 0.040
4.57
0.63
0.51
0.89
3.93
5.45
1.01
−−−
1.27
−−−
L
H
0.020
0.035 0.050
0.155 −−−
−−−
D 2 PL
M
G
0.13 (0.005)
T
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
SOLDERING FOOTPRINT*
6.20
3.0
0.244
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
NTD60N02R
PACKAGE DIMENSIONS
DPAK
CASE 369AA−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
SEATING
PLANE
−T−
2. CONTROLLING DIMENSION: INCH.
C
B
R
INCHES
DIM MIN MAX
MILLIMETERS
E
V
MIN
5.97
6.35
2.19
0.63
0.46
0.83
0.46
MAX
6.22
6.73
2.38
0.88
0.61
1.14
0.58
A
B
C
D
E
F
J
0.235 0.245
0.250 0.265
0.086 0.094
0.025 0.035
0.018 0.024
0.033 0.045
0.018 0.023
0.090 BSC
4
2
Z
A
S
1
3
U
L
R
S
U
V
Z
2.29 BSC
0.180 0.215
0.025 0.040
4.57
0.63
0.51
0.89
3.93
5.45
1.01
−−−
1.27
−−−
0.020
0.035 0.050
0.155 −−−
−−−
F
J
L
STYLE 2:
PIN 1. GATE
2. DRAIN
D 2 PL
M
3. SOURCE
4. DRAIN
0.13 (0.005)
T
SOLDERING FOOTPRINT*
6.20
3.0
0.244
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
NTD60N02R
PACKAGE DIMENSIONS
DPAK
CASE 369D−01
ISSUE B
C
B
R
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
V
S
E
INCHES
DIM MIN MAX
MILLIMETERS
4
2
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.35
6.73
2.38
0.88
0.58
1.14
Z
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
A
K
1
3
−T−
SEATING
PLANE
2.29 BSC
0.87
0.46
8.89
4.45
0.63
0.89
3.93
1.01
0.58
9.65
5.45
1.01
1.27
−−−
J
F
H
0.155
−−−
D 3 PL
STYLE 2:
PIN 1. GATE
G
M
T
0.13 (0.005)
2. DRAIN
3. SOURCE
4. DRAIN
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NTD60N02R/D
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