NTD6415ANL [ONSEMI]

N-Channel Power MOSFET 100 V, 23 A, 56 mΩ, Logic Level; N沟道功率MOSFET的100 V, 23 A, 56英里© ,逻辑电平
NTD6415ANL
型号: NTD6415ANL
厂家: ONSEMI    ONSEMI
描述:

N-Channel Power MOSFET 100 V, 23 A, 56 mΩ, Logic Level
N沟道功率MOSFET的100 V, 23 A, 56英里© ,逻辑电平

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NTD6415ANL  
N--Channel Power MOSFET  
100 V, 23 A, 56 mΩ, Logic  
Level  
Features  
Low RDS(on)  
http://onsemi.com  
100% Avalanche Tested  
AEC--Q101 Qualified  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(on)  
These Devices are Pb--Free, Halogen Free/BFR Free and are RoHS  
Compliant  
56 mΩ @ 4.5 V  
52 mΩ @ 10 V  
100 V  
23 A  
MAXIMUM RATINGS (T = 25C unless otherwise noted)  
J
Parameter  
Drain--to--Source Voltage  
Gate--to--Source Voltage -- Continuous  
Symbol  
Value  
100  
±20  
23  
Unit  
V
D
V
DSS  
V
V
GS  
Continuous Drain  
Current  
Steady  
State  
T
= 25C  
= 100C  
= 25C  
I
A
C
D
G
T
C
16  
Power Dissipation  
Steady  
State  
T
C
P
83  
W
S
D
Pulsed Drain Current  
t
= 10 ms  
I
80  
A
p
DM  
4
Operating and Storage Temperature Range  
T , T  
J
-- 5 5 t o  
+175  
C  
stg  
2
1
Source Current (Body Diode)  
I
23  
79  
A
S
3
Single Pulse Drain--to--Source Avalanche  
E
mJ  
AS  
DPAK  
CASE 369AA  
STYLE 2  
Energy (V = 50 Vdc, V = 10 Vdc, I =  
DD  
GS  
L(pk)  
23 A, L = 0.3 mH, R = 25 Ω)  
G
Lead Temperature for Soldering  
Purposes, 1/8from Case for 10 Seconds  
T
L
260  
C  
MARKING DIAGRAM  
& PIN ASSIGNMENT  
THERMAL RESISTANCE RATINGS  
Parameter  
Symbol  
Max  
1.8  
39  
Unit  
4 Drain  
Junction--to--Case (Drain) -- Steady State  
R
θ
C/W  
JC  
JA  
Junction--to--Ambient -- Steady State (Note 1)  
R
θ
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Surface mounted on FR4 board using 1 sq in pad size,  
1
Gate  
3
2
Source  
Drain  
(Cu Area 1.127 sq in [2 oz] including traces).  
6415ANL = Device Code  
Y
= Year  
WW  
G
= Work Week  
= Pb--Free Package  
ORDERING INFORMATION  
Seedetailedorderingandshippinginformationinthepackage  
dimensions section on page 2 of this data sheet.  
Semiconductor Components Industries, LLC, 2010  
1
Publication Order Number:  
March, 2010 -- Rev. 0  
NTD6415ANL/D  
NTD6415ANL  
ELECTRICAL CHARACTERISTICS (T = 25C unless otherwise noted)  
J
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain--to--Source Breakdown Voltage  
V
V
= 0 V, I = 250 mA  
100  
92  
V
(BR)DSS  
GS  
D
V
= 0 V, I = 250 mA, T = --40C  
GS  
D
J
Drain--to--Source Breakdown Voltage  
Temperature Coefficient  
V
/T  
J
115  
mV/C  
mA  
(BR)DSS  
Zero Gate Voltage Drain Current  
I
T = 25C  
1.0  
100  
DSS  
J
V
DS  
= 0 V,  
GS  
V
= 100 V  
T = 125C  
J
Gate--to--Source Leakage Current  
I
V
= 0 V, V = 20 V  
100  
nA  
GSS  
DS  
GS  
ON CHARACTERISTICS (Note 2)  
Gate Threshold Voltage  
V
V
= V , I = 250 mA  
1.0  
2.0  
V
GS(TH)  
GS  
DS  
D
Negative Threshold Temperature  
Coefficient  
V
/T  
J
4.8  
mV/C  
GS(TH)  
Drain--to--Source On--Resistance  
R
mΩ  
V
= 4.5 V, I = 10 A  
44  
43  
24  
56  
52  
DS(on)  
GS  
D
V
= 10 V, I = 10 A  
D
GS  
DS  
Forward Transconductance  
g
V
= 5.0 V, I = 10 A  
S
FS  
D
CHARGES, CAPACITANCES AND GATE RESISTANCE  
pF  
Input Capacitance  
C
1024  
156  
70  
ISS  
Output Capacitance  
C
OSS  
C
RSS  
V
= 0 V, f = 1.0 MHz, V = 25 V  
DS  
GS  
Reverse Transfer Capacitance  
Total Gate Charge  
nC  
Q
20  
G(TOT)  
Threshold Gate Charge  
Gate--to--Source Charge  
Gate--to--Drain Charge  
Total Gate Charge  
Q
1.1  
3.1  
14  
G(TH)  
V
= 4.5 V, V = 80 V, I = 23 A  
DS D  
GS  
Q
GS  
GD  
Q
Q
V
= 10 V, V = 80 V, I = 23 A  
35  
nC  
ns  
G(TOT)  
GS  
DS  
D
SWITCHING CHARACTERISTICS (Note 3)  
Turn--On Delay Time  
t
11  
91  
40  
71  
d(on)  
Rise Time  
t
r
V
= 4.5 V, V = 80 V,  
DD  
GS  
D
I
= 23 A, R = 6.1 Ω  
G
Turn--Off Delay Time  
Fall Time  
t
d(off)  
t
f
DRAIN--SOURCE DIODE CHARACTERISTICS  
Forward Diode Voltage  
V
V
T = 25C  
0.87  
0.74  
64  
1.2  
SD  
RR  
J
V
= 0 V, I = 23 A  
S
GS  
T = 125C  
J
ns  
Reverse Recovery Time  
Charge Time  
t
T
40  
a
V
= 0 V, dI /dt = 100 A/ms,  
S
GS  
I
= 23 A  
S
Discharge Time  
T
24  
b
Reverse Recovery Charge  
Q
152  
nC  
RR  
2. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%.  
3. Switching characteristics are independent of operating junction temperatures.  
ORDERING INFORMATION  
Device  
Package  
Shipping  
NTD6415ANLT4G  
DPAK  
(Pb--Free)  
2500 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specification Brochure, BRD8011/D.  
http://onsemi.com  
2
NTD6415ANL  
45  
45  
40  
35  
30  
25  
20  
15  
10  
5
T = 25C  
V
10 V  
J
DS  
V
= 10 V  
GS  
40  
35  
30  
25  
20  
15  
10  
5
3.6 V  
4 V  
5 V  
3.4 V  
3.2 V  
T = 25C  
J
3.0 V  
2.8 V  
T = 125C  
J
T = --55C  
J
0
0
0
1
2
3
4
5
1
2
3
4
V
, DRAIN--TO--SOURCE VOLTAGE (V)  
V
, GATE--TO--SOURCE VOLTAGE (V)  
GS  
DS  
Figure 1. On--Region Characteristics  
Figure 2. Transfer Characteristics  
0.050  
0.048  
0.046  
0.044  
0.042  
0.040  
0.050  
0.048  
0.046  
0.044  
0.042  
0.040  
I
= 23 A  
T = 25C  
J
D
T = 25C  
J
V
= 4.5 V  
GS  
V
= 10 V  
GS  
2
3
4
5
6
7
8
9
10  
5
10  
15  
I , DRAIN CURRENT (A)  
20  
25  
V
, GATE--TO--SOURCE VOLTAGE (V)  
GS  
D
Figure 3. On--Region versus Gate Voltage  
Figure 4. On--Resistance versus Drain  
Current and Gate Voltage  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
10000  
1000  
100  
V
= 0 V  
I
= 23 A  
= 4.5 V  
GS  
D
V
GS  
T = 150C  
J
T = 125C  
J
--50 --25  
0
25  
50  
75  
100 125 150 175  
10  
20  
30  
40  
50  
60  
70  
80  
90 100  
T , JUNCTION TEMPERATURE (C)  
J
V
DS  
, DRAIN--TO--SOURCE VOLTAGE (V)  
Figure 5. On--Resistance Variation with  
Temperature  
Figure 6. Drain--to--Source Leakage Current  
versus Voltage  
http://onsemi.com  
3
NTD6415ANL  
2500  
2000  
1500  
1000  
500  
10  
Q
T
T = 25C  
J
V
= 0 V  
GS  
8
6
4
2
0
C
iss  
Q
ds  
Q
gs  
V
I
= 80 V  
= 23 A  
DS  
C
rss  
D
C
oss  
T = 25C  
J
0
0
10 20 30 40 50 60 70 80 90 100  
, DRAIN--TO--SOURCE VOLTAGE (V)  
0
5
10  
15  
20  
25  
30  
35  
V
Q , TOTAL GATE CHARGE (nC)  
DS  
g
Figure 7. Capacitance Variation  
Figure 8. Gate--to--Source Voltage and  
Drain--to--Source Voltage versus Total Charge  
1000  
100  
10  
25  
20  
15  
10  
5
V
I
= 80 V  
= 23 A  
= 4.5 V  
T = 25C  
J
DS  
V
= 0 V  
D
GS  
V
GS  
t
r
t
f
t
d(off)  
t
d(on)  
0
1
1
10  
R , GATE RESISTANCE (Ω)  
100  
0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95  
V
, SOURCE--TO--DRAIN VOLTAGE (V)  
G
SD  
Figure 9. Resistive Switching Time Variation  
versus Gate Resistance  
Figure 10. Diode Forward Voltage versus  
Current  
125  
100  
75  
50  
25  
0
100  
10  
1
I
= 23 A  
D
10 ms  
100 ms  
V
= 10 V  
GS  
1 ms  
SINGLE PULSE  
= 25C  
10 ms  
T
C
dc  
R
DS(on)  
LIMIT  
THERMAL LIMIT  
PACKAGE LIMIT  
0.1  
1
10  
100  
1000  
25  
50  
75  
100  
125  
150  
175  
V
, DRAIN--TO--SOURCE VOLTAGE (V)  
T , STARTING JUNCTION TEMPERATURE  
J
DS  
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
Figure 12. Maximum Avalanche Energy versus  
Starting Junction Temperature  
http://onsemi.com  
4
NTD6415ANL  
10  
1
Duty Cycle = 0.5  
0.2  
0.1  
0.05  
0.02  
0.1  
0.01  
0.01  
SINGLE PULSE  
0.001  
0.000001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
t, PULSE TIME (s)  
Figure 13. Thermal Response  
http://onsemi.com  
5
NTD6415ANL  
PACKAGE DIMENSIONS  
DPAK (SINGLE GUAGE)  
CASE 369AA--01  
ISSUE A  
NOTES:  
1. DIMENSIONING AND TOLERANCING  
PER ANSI Y14.5M, 1982.  
SEATING  
PLANE  
-- T --  
2. CONTROLLING DIMENSION: INCH.  
C
B
R
INCHES  
DIM MIN MAX  
MILLIMETERS  
E
V
MIN  
5.97  
6.35  
2.19  
0.63  
0.46  
0.77  
MAX  
6.22  
6.73  
2.38  
0.89  
0.61  
1.14  
A
B
C
D
E
F
0.235 0.245  
0.250 0.265  
0.086 0.094  
0.025 0.035  
0.018 0.024  
0.030 0.045  
0.386 0.410  
0.018 0.023  
0.090 BSC  
4
2
Z
A
H
S
1
3
H
J
L
9.80 10.40  
U
0.46  
0.58  
2.29 BSC  
R
S
U
V
Z
0.180 0.215  
0.024 0.040  
4.57  
0.60  
0 . 5 1  
0.89  
3 . 9 3  
5.45  
1.01  
-- -- --  
1.27  
-- -- --  
F
J
0 . 0 2 0  
0.035 0.050  
0 . 1 5 5 -- -- --  
-- -- --  
L
STYLE 2:  
PIN 1. GATE  
2. DRAIN  
D 2 PL  
M
0.13 (0.005)  
T
3. SOURCE  
4. DRAIN  
SOLDERING FOOTPRINT*  
6.20  
3.0  
0.244  
0.118  
2.58  
0.101  
5.80  
0.228  
1.6  
0.063  
6.172  
0.243  
mm  
inches  
SCALE 3:1  
*For additional information on our Pb--Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
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For additional information, please contact your local  
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NTD6415ANL/D  

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