NLAS4684FCTCG [ONSEMI]
Analog Switch, Dual SPDT, 0.5 Ohm Dual SPDT .5 Ohm Analog Switch, 10 PIN FLIP-CHIP, 3000-DSFTP;
| 型号： | NLAS4684FCTCG |
| 厂家： | 
ONSEMI |
| 描述： | Analog Switch, Dual SPDT, 0.5 Ohm Dual SPDT .5 Ohm Analog Switch, 10 PIN FLIP-CHIP, 3000-DSFTP 复用器 开关 复用器或开关 信号电路 光电二极管 |
| 文件： | 总14页 (文件大小：135K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NLAS4684
Ultra−Low Resistance
Dual SPDT Analog Switch
The NLAS4684 is an advanced CMOS analog switch fabricated in
Sub−micron silicon gate CMOS technology. The device is a dual
Independent Single Pole Double Throw (SPDT) switch featuring
Ultra−Low R of 0.5 ꢀ, for the Normally Closed (NC) switch, and
ON
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MARKING
0.8 ꢀ for the Normally Opened switch (NO) at 2.7 V.
The part also features guaranteed Break Before Make switching,
assuring the switches never short the driver.
The NLAS4684 is available in a 2.0 x 1.5 mm bumped die array.
The pitch of the solder bumps is 0.5 mm for easy handling.
DIAGRAMS
Features
4684
AYWWG
G
A1
• Ultra−Low R , t0.5 ꢀ at 2.7 V
ON
Microbump−10
CASE 489AA
• Threshold Adjusted to Function with 1.8 V Control at
A1
V
CC
= 2.7−3.3 V
• Single Supply Operation from 1.8−5.5 V
• Tiny 2 x 1.5 mm Bumped Die
1
NLAS
4684
ALYWG
G
• Low Crosstalk, t 83 dB at 100 kHz
1
• Full 0−V Signal Handling Capability
CC
QFN−10
CASE 485C
• High Isolation, −65 dB at 100 kHz
• Low Standby Current, t50 nA
• Low Distortion, t0.14% THD
• R Flatness of 0.15
ꢀ
ON
4684
AYWG
G
• Pin for Pin Replacement for MAX4684
• High Continuous Current Capability
1
Micro10
CASE 846B
$300 mA Through Each Switch
• Large Current Clamping Diodes at Analog Inputs
$300 mA Continuous Current Capability
• Pb−Free Packages are Available
A
L
Y
= Assembly Location
= Wafer Lot
= Year
WW, W = Work Week
Applications
G
= Pb−Free Package
• Cell Phone
(Note: Microdot may be in either location)
• Speaker Switching
• Power Switching
• Modems
FUNCTION TABLE
IN 1, 2
NO 1, 2
NC 1, 2
• Automotive
0
1
OFF
ON
ON
OFF
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
©
Semiconductor Components Industries, LLC, 2007
1
Publication Order Number:
January, 2007 − Rev. 15
NLAS4684/D
NLAS4684
6
7
5
4
3
2
1
GND
NC2
NC1
IN1
8
IN2
COM2
NO2
COM1
NO1
9
10
V
CC
(Top View)
Figure 1. Pin Connections and Logic Diagram
(QFN−10 and Micro10)
GND
B
1
NC2
IN2
NC1
IN1
C
A
1
1
C
2
C
3
C
4
A
A
A
2
3
4
COM2
NO2
COM1
NO1
B
4
V
CC
(Top View)
Figure 2. Pin Connections and Logic Diagram
(Microbump−10)
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2
NLAS4684
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
V
V
Positive DC Supply Voltage
*0.5 to )7.0
CC
IS
Analog Input Voltage (V , V , or V
)
*0.5 v V v V )0.5
V
NO
NC
COM
IS
CC
Digital Select Input Voltage
*0.5 v V v)7.0
V
IN
I
I
I
I
I
Continuous DC Current from COM to NC/NO
$300
$500
$300
$500
mA
mA
mA
mA
anl1
Peak Current from COM to NC/NO, 10 duty cycle (Note 1)
Continuous DC Current into COM/NO/NC
anl−pk 1
clmp
clmp 1
Peak Current into Input Clamp Diodes at COM/NC/NO
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Defined as 10% ON, 90% off duty cycle.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
1.8
Max
5.5
Unit
V
V
V
V
T
DC Supply Voltage
CC
IN
Digital Select Input Voltage
GND
GND
*55
5.5
V
Analog Input Voltage (NC, NO, COM)
Operating Temperature Range
V
V
IS
CC
)125
°C
ns/V
A
t , t
r
Input Rise or Fall Time, SELECT
V
V
= 3.3 V $ 0.3 V
= 5.0 V $ 0.5 V
0
0
100
20
f
CC
CC
DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND)
Guaranteed Limit
*555C to 255C t855C t1255C
Symbol
Parameter
Condition
V
$10%
Unit
CC
V
Minimum High−Level Input
Voltage, Select Inputs
(Figure 10)
2.0
2.5
3.0
5.0
1.4
1.4
1.4
2.0
1.4
1.4
1.4
2.0
1.4
1.4
1.4
2.0
V
IH
V
Maximum Low−Level Input
Voltage, Select Inputs
(Figure 10)
2.0
2.5
3.0
5.0
0.5
0.5
0.5
0.8
0.5
0.5
0.5
0.8
0.5
0.5
0.5
0.8
V
IL
I
Maximum Input Leakage
Current, Select Inputs
V
V
= 5.5 V or GND
= 5.5 V or GND
5.5
$ 1.0
$ 1.0
$ 1.0
ꢁ
A
IN
IN
I
I
Power Off Leakage Current
0
$10
$10
$10
ꢁ
A
OFF
CC
IN
Maximum Quiescent Supply
Current (Note 2)
Select and V = V or GND
5.5
$ 180
$ 200
$ 200
nA
IS
CC
2. Guaranteed by design.
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3
NLAS4684
DC ELECTRICAL CHARACTERISTICS − Analog Section
Guaranteed Maximum Limit
−555C to 255C
t855C
t1255C
Min Max
Min
Max
Min
Max
Symbol
Parameter
Condition
V
$10%
Unit
CC
R
R
R
R
(NC)
NC “ON” Resistance
(Note 3)
V
V
v V
2.5
3.0
5.0
0.6
0.5
0.4
0.7
0.5
0.4
0.8
0.5
0.5
ꢀ
ON
IN
IS
IL
= GND to V
CC
CC
I
I v 100 mA
IN
(NO)
NO “ON” Resistance
(Note 3)
V
V
w V
2.5
3.0
5.0
1.0
0.8
0.8
1.0
0.8
0.8
1.0
1.0
0.9
ꢀ
ꢀ
ꢀ
ꢀ
ON
IN
IS
IH
= GND to V
I
I v 100 mA
IN
NC_On−Resistance
Flatness (Notes 3, 5)
I
= 100 mA
2.5
3.0
5.0
0.15
0.15
0.15
0.15
0.15
0.15
0.15
0.15
0.15
FLAT (NC)
FLAT (NO)
COM
V
= 0 to V
CC
IS
NO_On−Resistance
Flatness (Notes 3, 5)
I
= 100 mA
2.5
3.0
5.0
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
COM
V
= 0 to V
IS
CC
ꢂ
R
On−Resistance Match
Between Channels
(Notes 3 and 4)
V
= 1.3 V;
= 100 mA
= 1.5 V;
2.5
3.0
5.0
0.18
0.06
0.06
0.18
0.06
0.06
0.18
0.06
0.06
ON
IS
I
COM
V
IS
I
= 100 mA
COM
V
= 2.8 V;
IS
I
= 100 mA
COM
I
I
NC or NO Off
Leakage Current
(Figure 13) (Note 3)
V
= V or V
IH
5.5
5.5
−1
−2
1
2
−10
−20
10
20
−100 100
−200 200
nA
nA
NC(OFF)
NO(OFF)
IN
IL
V
V
or V = 1.0
NC
NO
= 4.5 V
COM
I
COM ON
V
= V or V
IL IH
COM(ON)
IN
Leakage Current
(Figure 13) (Note 3)
V
V
1.0 V or 4.5 V with
floating or
NO
NC
V
V
1.0 V or 4.5 V with
floating
NC
NO
V
= 1.0 V or 4.5 V
COM
3. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
4. ꢂ R − R between NC1 and NC2 or between NO1 and NO2.
R
ON = ON(MAX)
ON(MIN)
5. Flatness is defined as the difference between the maximum and minimum value of on−resistance as measured over the specified analog
signal ranges.
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4
NLAS4684
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0 ns) (Typical characteristics are at 25°C)
r
f
Guaranteed Maximum Limit
*555C to 255C
t855C
t1255C
V
(V)
V
IS
CC
(V) Min Typ Max Min Max Min Max
Symbol
Parameter
Turn−On Time
Test Conditions
R = 50 ꢀꢃ C = 35 pF
Unit
t
t
t
2.5
3.0
5.0
1.3
1.5
2.8
60
50
30
70
60
35
70
60
35
ns
ON
L
L
(Figures 4 and 5)
Turn−Off Time
R = 50 ꢀꢃ C = 35 pF
2.5
3.0
5.0
1.3
1.5
2.8
50
40
30
55
50
35
55
50
35
ns
ns
OFF
BBM
L
L
(Figures 4 and 5)
Minimum Break−Before−Make
Time (Note 6)
V
= 3.0
IS
3.0
1.5
2
15
R = 300 ꢀꢃ C = 35 pF
L
L
(Figure 3)
Typical @ 25, V = 5.0 V
CC
C
NC
C
NO
C
NC
C
NO
Off
Off
On
On
NC Off Capacitance, f = 1 MHz
NO Off Capacitance, f = 1 MHz
NC On Capacitance, f = 1 MHz
NO On Capacitance, f = 1 MHz
102
104
322
330
pF
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
Typical
255C
6.5
V
V
CC
Symbol
Parameter
Condition
Unit
BW
Maximum On−Channel −3dB
Bandwidth or Minimum Frequency
Response
V
V
= 0 dBm
NC
3.0
MHz
IN
IN
centered between V and GND
CC
(Figure 6)
NO
3.0
3.0
9.5
V
V
Maximum Feed−through On Loss
V
V
= 0 dBm @ 100 kHz to 50 MHz
ONL
ISO
IN
IN
centered between V and GND (Figure 6)
−0.05
dB
dB
CC
Off−Channel Isolation (Note 7)
f = 100 kHz; V = 1 V RMS; C = 5 nF
IS
L
V
centered between V and GND(Figure 6)
3.0
3.0
−65
15
IN
CC
Q
Charge Injection Select Input to
Common I/O (Figures 10 and 11)
V
V
GND, R = 0 ꢀ, C = 1 nF
pC
%
IN = CC to
IS
L
Q = C − ꢂ V
(Figure 7)
OUT
L
THD
VCT
Total Harmonic Distortion THD +
Noise (Figure 9)
F
= 20 Hz to 100 kHz, R = R
= 600 ꢀ, C = 50 pF
3.0
3.0
0.14
−83
IS
L
gen
L
V
= 1 V RMS
IS
Channel−to−Channel Crosstalk
f = 100 kHz; V = 1 V RMS, C = 5 pF, R = 50 ꢀ
dB
IS
L
L
V
centered between V and GND (Figure 6)
CC
IN
6. −55°C specifications are guaranteed by design.
7. Off−Channel Isolation = 20log10 (Vcom/Vno) (See Figure 6).
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5
NLAS4684
V
CC
DUT
Input
V
Output
CC
GND
V
OUT
0.1 ꢁ F
t
BMM
50 ꢀ
35 pF
90%
90% of V
OH
Output
Switch Select Pin
GND
Figure 3. tBBM (Time Break−Before−Make)
V
CC
Input
50%
50%
90%
DUT
0 V
V
Output
CC
V
OUT
V
0.1 ꢁ F
OH
Open
90%
50 ꢀ
35 pF
Output
V
OL
Input
t
t
OFF
ON
Figure 4. tON/tOFF
V
V
CC
CC
Input
50%
50%
DUT
0 V
50 ꢀ
Output
V
OUT
V
OH
Open
35 pF
Output
V
10%
10%
OL
Input
t
t
ON
OFF
Figure 5. tON/tOFF
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6
NLAS4684
50 ꢀ
DUT
Reference
Input
50 ꢀ Generator
Transmitted
Output
50 ꢀ
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. V , Bandwidth and V are independent of the input signal direction.
ISO
ONL
V
OUT
= Off Channel Isolation = 20 Log ǒ Ǔ
V
V
for V at 100 kHz
IN
ISO
V
IN
OUT
V
= On Channel Loss = 20 Log ǒ Ǔ
for V at 100 kHz to 50 MHz
ONL
IN
V
IN
Bandwidth (BW) = the frequency 3 dB below V
ONL
V
= Use V
setup and test to all other switch analog input/outputs terminated with 50 ꢀ
ISO
CT
Figure 6. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
V
CC
V
Open
Output
IN
GND
C
L
Output
Off
ꢂ
V
OUT
Off
On
V
IN
Figure 7. Charge Injection: (Q)
10
1
NC1
0.1
NO1
0.01
1
10
100
1000
10000
100000
FREQUENCY (Hz)
Figure 8. Total Harmonic Distortion Plus Noise Versus Frequency
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7
NLAS4684
1.6
1.4
1.2
1
200
0
NO, V = 5 V
CC
Threshold Rising
Threshold Falling
NC, V = 5 V
CC
−200
0.8
0.6
0.4
0.2
0
−400
−600
−800
0
2
4
6
0
2
4
6
V
(V)
CC
V (V)
in
Figure 9. Voltage in Threshold on Logic Pins
Figure 10. Charge Injection versus Vis
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
T−on 2.5 V
T−on
T−off 2.5 V
T−on 3.0 V
T−off 3.0 V T−on 5.0 V
T−off 5.0 V
T−off
−55
−30
−5
20
45
70
95
120
1.8
2.8
V
3.8
4.8
TEMPERATURE (°C)
TEMPERATURE (°C)
CC
Figure 11. T−on / T−off Time versus
Temperature
Figure 12. T−on / T−off Time versus Temperature
1000
1000
100
100
10
Comm / Closed Switch
10
1
1
0.1
0.1
0.01
Open Switch
0.01
0.001
0.001
−55
−5
45
95
−55
−5
45
95
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 13. NO/NC Current Leakage Off and On,
CC = 5 V
Figure 14. ICC Current Leakage versus
Temperature VCC = 5.5 V
V
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8
NLAS4684
3
2.5
2
4.5
4
1.8 V
T = +25°C
COM
A
T = +25°C
COM
A
1.8 V
2.0 V
I
= 100 mA
I
= 100 mA
3.5
3
2.0 V
2.5
2
2.5 V
2.7 V
1.5
1
2.3 V
2.5 V
2.3 V
2.7 V
1.5
1
3.0 V
5.0 V
4.0
5.0 V
0.5
0
3.0 V
0.5
0
0.0
1.0
2.0
3.0
(V)
5.0
0.0
1.0
2.0
3.0
(V)
4.0
5.0
V
V
COM
COM
Figure 15. NC On−Resistance versus
COM Voltage
Figure 16. NO On−Resistance versus
COM Voltage
1.3
1.1
0.9
0.7
0.5
0.3
0.1
0.45
0.4
V
I
= 2.5 V
V
I
= 2.5 V
CC
CC
+85°C
= 100 mA
= 100 mA
COM
COM
+85°C
+25°C
0.35
0.3
+25°C
0.25
0.2
−40°C
−40°C
0.15
0.1
0.0
0.5
1.0
V
1.5
2.0
2.5
0.0
1.0
2.0
V
3.0
4.0
5.0
(V)
(V)
COM
COM
Figure 17. NC On−Resistance versus
COM Voltage
Figure 18. NO On−Resistance versus
COM Voltage
0.35
0.3
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
+25°C
+85°C
+85°C
+25°C
−40°C
0.25
0.2
−40°C
0.15
0.1
V
= 3 V
= 100 mA
CC
V
= 3 V
= 100 mA
CC
I
COM
I
COM
0.0
1.0
2.0
3.0
0.0
1.0
V
2.0
3.0
V
(V)
(V)
COM
COM
Figure 19. NC On−Resistance versus
COM Voltage
Figure 20. NC On−Resistance versus
COM Voltage
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NLAS4684
0.26
0.24
0.22
0.2
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
+85°C
−40°C
+25°C
+25°C
−40°C
0.18
0.16
0.14
0.12
0.1
+85°C
V
I
= 5 V
V
I
= 5 V
CC
CC
= 100 mA
= 100 mA
COM
COM
0.0
1.0
2.0
3.0
4.0
5.0
0.0
1.0
2.0
3.0
4.0
5.0
V
(V)
V
(V)
COM
COM
Figure 21. NC On−Resistance versus
COM Voltage
Figure 22. NO On−Resistance versus
COM Voltage
0
0
Bandwidth (On − Loss)
Bandwidth (On − Loss)
−1
−1
10
10
0
0
Phase Shift
(Degrees)
Phase Shift
(Degrees)
−10
−10
V
= 3.0 V
V
= 3.0 V
CC
CC
T = 25°C
A
T = 25°C
A
−10
−10
0.001
0.01
0.1
1.0
10
100
0.001
0.01
0.1
1.0
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 23. NC Bandwidth and Phase Shift
versus Frequency
Figure 24. NO Bandwidth and Phase Shift
versus Frequency
0
0
−10
−10
NC Off−Isolation
NO Off−Isolation
Crosstalk
Crosstalk
V
= 3.0 V
V
= 3.0 V
CC
CC
T = 25°C
T = 25°C
A
A
−100
0.001
−100
0.001
0.01
0.1
1.0
10
100
0.01
0.1
1.0
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 25. NC Off Isolation and Crosstalk
Figure 26. NO Off Isolation and Crosstalk
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10
NLAS4684
ORDERING INFORMATION
Device
Package
Shipping†
NLAS4684FCT1
Microbump−10
3000 / Tape & Reel
3000 / Tape & Reel
NLAS4684FCT1G
Microbump−10
(Pb−Free)
NLAS4684MNR2
QFN−10
3000 / Tape & Reel
3000 / Tape & Reel
NLAS4684MNR2G
QFN−10
(Pb−Free)
NLAS4684MR2
Micro10
4000 / Tape & Reel
4000 / Tape & Reel
NLAS4684MR2G
Micro10
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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11
NLAS4684
PACKAGE DIMENSIONS
Microbump−10
CASE 489AA−01
ISSUE A
4 X
D
A
B
E
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION:
MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
0.10
C
PIN ONE
CORNER
MILLIMETERS
DIM MIN
MAX
A
−−− 0.650
A1 0.210 0.270
A2 0.280 0.380
A1
A
D
E
1.965 BSC
1.465 BSC
0.250 0.350
0.500 BSC
1.500 BSC
1.000 BSC
0.10
C
b
e
A2
D1
E1
0.075 C
SEATING
PLANE
C
D1
e
C
B
A
10 X
b
E1
0.15
0.05
C
C
A B
1
2
3
4
e
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NLAS4684
PACKAGE DIMENSIONS
DFN10, 3 x 3mm, 0.5mm Pitch
CASE 485C−01
ISSUE A
D
A
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
EDGE OF PACKAGE
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. TERMINAL b MAY HAVE MOLD COMPOUND
MATERIAL ALONG SIDE EDGE. MOLD
FLASHING MAY NOT EXCEED 30 MICRONS
ONTO BOTTOM SURFACE OF TERMINAL b.
6. DETAILS A AND B SHOW OPTIONAL VIEWS
FOR END OF TERMINAL LEAD AT EDGE OF
PACKAGE.
L1
E
PIN 1
DETAIL A
REFERENCE
Bottom View
(Optional)
2X
0.15
C
TOP VIEW
MILLIMETERS
2X
0.15
C
DIM MIN
0.80
A1 0.00
MAX
1.00
0.05
A
(A3)
DETAIL B
A3
b
D
D2 2.45
E
0.20 REF
0.10
0.08
C
C
0.18
0.30
3.00 BSC
2.55
3.00 BSC
1.85
0.50 BSC
0.19 TYP
A
SEATING
PLANE
10X
E2 1.75
e
K
L
SIDE VIEW
A1
C
0.35
0.45
0.03
EXPOSED Cu
L1 0.00
D2
e
MOLD CMPD
DETAIL A
10X
L
1
5
A3
A1
DETAIL B
Side View
(Optional)
E2
10X
K
SOLDERING FOOTPRINT*
10
6
10X b
2.6016
0.10 C A B
0.05
BOTTOM VIEW
C
NOTE 3
1.8508
3.3048
2.1746
10X
0.5651
10X
0.5000 PITCH
0.3008
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
13
NLAS4684
PACKAGE DIMENSIONS
Micro10
CASE 846B−03
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE
BURRS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. DIMENSION “B” DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846B−01 OBSOLETE. NEW STANDARD
846B−02
−B−
K
G
PIN 1 ID
D 8 PL
M
S
S
A
0.08 (0.003)
T B
MILLIMETERS
INCHES
DIM MIN
MAX
3.10
3.10
1.10
0.30
MIN
MAX
0.122
0.122
0.043
0.012
A
B
C
D
G
H
J
2.90
2.90
0.95
0.20
0.114
0.114
0.037
0.008
0.50 BSC
0.020 BSC
0.05
0.10
4.75
0.40
0.15
0.21
5.05
0.70
0.002
0.004
0.187
0.016
0.006
0.008
0.199
0.028
C
0.038 (0.0015)
K
L
−T−
SEATING
PLANE
L
H
J
SOLDERING FOOTPRINT*
1.04
0.041
0.32
0.0126
10X
10X
3.20
4.24
5.28
0.126
0.167 0.208
0.50
mm
inches
ǒ
Ǔ
8X0.0196
SCALE 8:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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