NLAS4685FCT1G [ONSEMI]
Ultra-Low Resistance Dual SPDT Analog Switch; 超低电阻双路SPDT模拟开关
| 型号： | NLAS4685FCT1G |
| 厂家： | 
ONSEMI |
| 描述： | Ultra-Low Resistance Dual SPDT Analog Switch |
| 文件： | 总10页 (文件大小：93K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NLAS4685
Ultra−Low Resistance
Dual SPDT Analog Switch
The NLAS4685 is an advanced CMOS analog switch fabricated in
Sub−micron silicon gate CMOS technology. The device is a dual
Independent Single Pole Double Throw (SPDT) switch featuring
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Ultra−Low R of 0.8 ꢀ, for the Normally Closed (NC) switch and
ON
for the Normally Opened switch (NO) at 2.7 V.
The part also features guaranteed Break Before Make switching,
assuring the switches never short the driver.
MARKING
DIAGRAM
The NLAS4685 is available in a 2.0 x 1.5 mm bumped die array,
with a 3 x 4 arrangement of solder bumps. The pitch of the solder
bumps is 0.5 mm for easy handling.
XX
D
A1
Microbump−10
CASE 489AA
Features
A1
XX = Device Code
= Date Code
• Ultra−Low R , t0.8 ꢀ at 2.7 V
ON
• Threshold Adjusted to Function with 1.8 V Control at
D
V
CC
= 2.7−3.3 V
• Single Supply Operation from 1.8−5.5 V
• Tiny 2 x 1.5 mm Bumped Die
PIN CONNECTIONS AND LOGIC DIAGRAM
• Low Crosstalk, t 81 dB at 100 kHz
(Top View)
GND
• Full 0−V Signal Handling Capability
CC
B
• High Isolation, −65 dB at 100 kHz
• Low Standby Current, t50 nA
• Low Distortion, t0.14% THD
1
NC2
IN2
NC1
IN1
C
A
1
1
• R Flatness of 0.15
ꢀ
ON
C
2
C
3
C
4
A
A
A
2
3
4
• Pin for Pin Replacement for MAX4685
• Pb−Free Package is Available
COM2
NO2
COM1
NO1
Applications
B
4
• Cell Phone
• Speaker Switching
• Power Switching (Up to 100 mA)
• Modems
V
CC
FUNCTION TABLE
IN 1, 2
NO 1, 2
NC 1, 2
• Automotive
0
1
OFF
ON
ON
OFF
ORDERING INFORMATION
†
Device
NLAS4685FCT1
Package
Shipping
Microbump 3000 Tape/Reel
NLAS4685FCT1G Microbump 3000 Tape/Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
August, 2005 − Rev. 2
NLAS4685/D
NLAS4685
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
V
V
Positive DC Supply Voltage
*0.5 to )7.0
CC
IS
Analog Input Voltage (V , V , or V
) (Note 1)
COM
*0.5 v V v V )0.5
V
NO
NC
IS
CC
Digital Select Input Voltage
*0.5 v V v)7.0
V
IN
I
I
DC Current, Into or Out of Any Pin
$50
mA
IK
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Signal voltage on NC, NO, and COM exceeding VCC or GND are clamped by the internal diodes. Limit forward diode current to maximum
current rating.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
1.8
Max
5.5
Unit
V
V
V
V
T
DC Supply Voltage
CC
IN
Digital Select Input Voltage
GND
GND
*55
5.5
V
Analog Input Voltage (NC, NO, COM)
Operating Temperature Range
V
V
IS
CC
)125
°C
ns/V
A
t , t
r
Input Rise or Fall Time, SELECT
V
V
= 3.3 V $ 0.3 V
= 5.0 V $ 0.5 V
0
0
100
20
f
CC
CC
DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND)
Guaranteed Limit
*555C to 255C t855C t1255C
Symbol
Parameter
Condition
V
$10%
Unit
CC
V
Minimum High−Level Input
Voltage, Select Inputs
2.0
2.5
3.0
5.0
1.4
1.4
1.4
2.0
1.4
1.4
1.4
2.0
1.4
1.4
1.4
2.0
V
IH
V
Maximum Low−Level Input
Voltage, Select Inputs
2.0
2.5
3.0
5.0
0.5
0.5
0.5
0.8
0.5
0.5
0.5
0.8
0.5
0.5
0.5
0.8
V
IL
I
Maximum Input Leakage
Current, Select Inputs
V
V
= 5.5 V or GND
= 5.5 V or GND
5.5
$ 1.0
$ 1.0
$ 1.0
ꢁ A
IN
IN
I
I
Power Off Leakage Current
0
$10
$10
$10
ꢁ A
OFF
CC
IN
Maximum Quiescent Supply
Current
Select and V = V or GND
5.5
$ 180
$ 200
$ 200
nA
IS
CC
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2
NLAS4685
DC ELECTRICAL CHARACTERISTICS − Analog Section
Guaranteed Maximum Limit
−555C to 255C
t855C
t1255C
Min Max
Min
Max
Min
Max
Symbol
Parameter
Condition
V
$10%
Unit
CC
R
“ON” Resistance
(Note 2)
V
V
w V
2.5
3.0
5.0
2.0
0.8
0.8
2.0
0.8
0.8
2.0
1.0
0.9
ꢀ
ON
IN
IS
IH
(NC, NO)
= GND to V
CC
I
I v 100 mA
IN
R
On−Resistance
Flatness (Notes 2, 4)
I
= 100 mA
2.5
3.0
5.0
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
ꢀ
ꢀ
FLAT
COM
(NC, NO)
V
= 0 to V
IS
CC
ꢂ
R
On−Resistance Match
Between Channels
(Notes 2 and 3)
V
I
= 1.3 V;
= 100 mA
= 1.5 V;
2.5
3.0
5.0
0.18
0.06
0.06
0.18
0.06
0.06
0.18
0.06
0.06
ON
IS
COM
V
I
IS
COM
= 100 mA
V
= 2.8 V;
IS
I
= 100 mA
COM
I
I
NC or NO Off
Leakage Current
(Figure 10)
V
= V or V
IH
5.5
5.5
−1
−1
1
1
−10
−10
10
10
−150 150
−150 150
nA
nA
NC(OFF)
NO(OFF)
IN
IL
V
V
or V = 1.0
NC
NO
= 4.5 V
COM
I
COM ON
V
= V or V
IL IH
COM(ON)
IN
Leakage Current
(Figure 10)
V
V
1.0 V or 4.5 V with
floating or
NO
NC
V
V
1.0 V or 4.5 V with
floating
NC
NO
V
= 1.0 V or 4.5 V
COM
2. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
3. ꢂ R − R between all switches.
R
ON = ON(MAX)
ON(MIN)
4. Flatness is defined as the difference between the maximum and minimum value of on−resistance as measured over the specified analog
signal ranges.
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3
NLAS4685
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0 ns)
r
f
Guaranteed Maximum Limit
*555C to 255C
t855C
t1255C
V
(V)
V
IS
CC
(V) Min Typ* Max Min Max Min Max
Symbol
Parameter
Turn−On Time
Test Conditions
R = 50 ꢃ C = 35 pF
Unit
t
t
t
ꢀ
2.5
3.0
5.0
1.3
1.5
2.8
55
50
30
65
60
35
70
60
35
ns
ON
L
L
(Figures 2 and 3)
Turn−Off Time
R = 50
L
ꢀ
ꢃ C = 35 pF
2.5
3.0
5.0
1.3
1.5
2.8
55
50
25
65
60
30
70
60
30
ns
ns
OFF
BBM
L
(Figures 2 and 3)
Minimum Break−Before−Make
Time
V
= 3.0
IS
3.0
1.5
2
15
R = 300
L
ꢀꢃ C = 35 pF
L
(Figure 1)
Typical @ 25, V = 5.0 V
V
= 3.0 V
CC
CC
C
NC
C
NO
C
NC
C
NO
Off
Off
On
On
NC Off Capacitance, f = 1 MHz
NO Off Capacitance, f = 1 MHz
NC On Capacitance, f = 1 MHz
NO On Capacitance, f = 1 MHz
208
102
547
431
pF
*Typical Characteristics are at 25°C.
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted) (Note 6)
Typical
255C
V
V
CC
Symbol
Parameter
Condition
Unit
BW
Maximum On−Channel −3dB
Bandwidth or Minimum Frequency
Response
V
V
= 0 dBm
NC/NO
3.0
11.5
MHz
IN
IN
centered between V and GND
CC
(Figure 4)
V
V
Maximum Feed−through On Loss
V
V
= 0 dBm @ 100 kHz to 50 MHz
ONL
ISO
IN
IN
centered between V and GND (Figure 4)
3.0
3.0
−0.05
−65
dB
CC
Off−Channel Isolation
f = 100 kHz; V = 1 V RMS; C = 5 nF
IS
L
V
centered between V and GND(Figure 4)
dB
pC
IN
CC
Q
Charge Injection Select Input to
Common I/O
V
V
GND, R = 0 ꢀ, C = 1 nF
3.0
5.0
15
20
IN = CC to
IS
L
Q = C − ꢂ V
(Figure 5)
L
OUT
THD
VCT
Total Harmonic Distortion
THD + Noise
F
V
= 20 Hz to 20 kHz, R = R
= 1 V RMS
= 600 ꢀ, C = 50 pF
3.0
0.14
%
IS
L
gen
L
IS
Channel−to−Channel Crosstalk
f = 100 kHz; V = 1 V RMS, C = 5 pF, R = 50
ꢀ
3.0
−81
dB
IS
L
L
V
centered between V and GND (Figure 4)
IN
CC
5. Off−Channel Isolation = 20log10 (Vcom/Vno), Vcom = output, Vno = input to off switch.
6. −40°C specifications are guaranteed by design.
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4
NLAS4685
V
CC
DUT
Input
V
Output
50
CC
GND
V
OUT
0.1 ꢁ F
t
BMM
ꢀ
35 pF
90%
90% of V
OH
Output
Switch Select Pin
GND
Figure 1. tBBM (Time Break−Before−Make)
V
CC
Input
50%
50%
90%
DUT
0 V
V
Output
50
CC
V
OUT
V
0.1 ꢁ F
OH
Open
90%
ꢀ
35 pF
Output
V
OL
Input
t
t
OFF
ON
Figure 2. tON/tOFF
V
V
CC
CC
Input
50%
50%
DUT
0 V
50
ꢀ
Output
V
OUT
V
OH
Open
35 pF
Output
V
10%
10%
OL
Input
t
t
ON
OFF
Figure 3. tON/tOFF
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5
NLAS4685
50
ꢀ
DUT
Reference
Input
50 ꢀ Generator
Transmitted
Output
50
ꢀ
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. V , Bandwidth and V are independent of the input signal direction.
ISO
ONL
V
OUT
= Off Channel Isolation = 20 Log ǒ Ǔ
V
V
for V at 100 kHz
IN
ISO
V
IN
OUT
V
= On Channel Loss = 20 Log ǒ Ǔ
for V at 100 kHz to 50 MHz
ONL
IN
V
IN
Bandwidth (BW) = the frequency 3 dB below V
ONL
V
= Use V
setup and test to all other switch analog input/outputs terminated with 50 ꢀ
ISO
CT
Figure 4. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
V
CC
V
Open
Output
IN
GND
C
L
Output
Off
ꢂ
V
OUT
Off
On
V
IN
Figure 5. Charge Injection: (Q)
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6
NLAS4685
10
1
1.6
1.4
1.2
1
Threshold Rising
Threshold Falling
0.8
0.6
1,NC1
0.1
0.01
1, NO1
0.4
0.2
0
1
10
100
1000
10000
100000
0
2
4
6
FREQUENCY (Hz)
V
(V)
CC
Figure 6. Total Harmonic Distortion Plus Noise
versus Frequency
Figure 7. Voltage in Threshold on Logic Pins
70
60
50
40
30
20
10
0
200
0
1, NO1
T−on 2.5V
T−off 2.5 V
T−on 3.0 V
−200
−400
−600
−800
1,NC1
T−off 3.0 V
T−off 5 V
T−on 5 V
Q (pC),
V
= 5 V
CC
0
2
4
6
−55
−30
−5
20
45
70
95
120
V
in
(V)
TEMPERATURE (°C)
Figure 8. Charge Injection versus Vis
Figure 9. T−on/T−off Time versus Temperature
1000
2.75 V
100
10
1
Comm / Closed Switch
0.1
Open Switch
0.01
0.001
−55
−5
45
95
TEMPERATURE (°C)
Figure 10. NO/NC Current Leakage Off and On,
CC = 5 V
V
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7
NLAS4685
1.3
1.1
0.9
0.7
0.5
0.3
0.1
1000
100
10
T = +25°C
COM
A
I
= 100 mA
+85°C
5.5 V
+25°C
1
−40°C
0.1
0.01
0.001
−55
−5
45
95
0.0
1.0
2.0
V
3.0
4.0
5.0
TEMPERATURE (°C)
(V)
COM
Figure 11. ICC Current Leakage versus
Temperature VCC = 5.5 V
Figure 12. NC/NO On−Resistance versus
COM Voltage
4.5
4
1.8 V
T = +25°C
COM
A
I
= 100 mA
3.5
3
2.0 V
2.3 V
2.5
2
2.7 V
2.5 V
1.5
1
3.0 V
5.0 V
4.0
0.5
0
0.0
1.0
2.0
3.0
(V)
5.0
V
COM
Figure 13. NC/NO On−Resistance versus
COM Voltage
0
0
Bandwidth (On − Loss)
−1
−1
Off−Isolation
10
0
Phase Shift
(Degrees)
−10
Crosstalk
V
= 3.0 V
V
= 3.0 V
CC
CC
T = 25°C
A
T = 25°C
A
−10
0.001
−10
0.001
0.01
0.1
1.0
10
100
0.01
0.1
1.0
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 14. NC/NO Bandwidth and Phase Shift
versus Frequency
Figure 15. NC/NO Off Isolation and Crosstalk
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8
NLAS4685
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
100
80
60
40
20
0
+85°C
+25°C
−40°C
T−on
T−off
V
= 5 V
CC
I
= 100 mA
COM
1.8
2.8
3.8
(V)
4.8
0.0
1.0
2.0
3.0
4.0
5.0
V
V
(V)
COM
CC
Figure 16. T−on/T−off versus VCC
Figure 17. NC/NO On−Resistance versus
COM Voltage
0.9
+25°C
+85°C
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
−40°C
V
= 3 V
= 100 mA
CC
I
COM
0.0
1.0
2.0
3.0
V
(V)
COM
Figure 18. NC/NO On−Resistance versus
COM Voltage
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9
NLAS4685
PACKAGE DIMENSIONS
Microbump−10
CASE 489AA−01
ISSUE O
4 X
D
A
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
0.10
C
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
E
MILLIMETERS
DIM MIN
MAX
PIN ONE
CORNER
A
−−− 0.650
A1 0.210
A2 0.280
0.270
0.380
A1
D
E
1.965 BSC
1.465 BSC
0.250 0.350
0.500 BSC
0.10
C
b
A2
A
e
D1
E1
1.500 BSC
1.000 BSC
0.075 C
SEATING
PLANE
C
D1
e
C
B
10 X
b
E1
0.15
0.05
C
C
A B
A
1
2
3
4
e
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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NLAS4685/D
相关型号：
NLAS4717EPMR2G
DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO10, 3 X 5 MM, LEAD FREE, MICRO-10
ONSEMI
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