NLAS4717EPMR2G [ONSEMI]
DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO10, 3 X 5 MM, LEAD FREE, MICRO-10;
| 型号： | NLAS4717EPMR2G |
| 厂家： | 
ONSEMI |
| 描述： | DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO10, 3 X 5 MM, LEAD FREE, MICRO-10 光电二极管 输出元件 |
| 文件： | 总10页 (文件大小：132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NLAS4717EP
4.5ꢀW High Bandwidth, Dual
SPDT Analog Switch
The NLAS4717EP is an advanced CMOS analog switch fabricated
in sub−micron silicon gate CMOS technology. The device is a dual
independent Single Pole Double Throw (SPDT) switch featuring low
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MARKING
R
DS(on)
of 4.5 ꢀ at 3.0 V.
The device also features guaranteed Break−Before−Make (BBM)
switching, assuring the switches never short the driver.
The NLAS4717EP is available in two small size packages:
Microbump: 2.0 x 1.5 mm
DIAGRAMS
WQFN−10: 1.4 x 1.8 mm
4717EP
AYWWG
G
A1
Features
Microbump−10
CASE 489AA
Low R : 4.5 ꢀ @ 3.0 V
DS(on)
A1
Matching Between the Switches 0.5
Wide Voltage Range: 1.8 V to 5.5 V
High Bandwidth > 90 MHz
ꢀ
A
Y
= Assembly Location
= Year
W, WW = Work Week
G
= Pb−Free Package
1.65 V to 5.5 V Operating Range
(Note: Microdot may be in either location)
Low Threshold Voltages on Pins 4 and 8 (CTRL Pins)
Ultra−Low Charge Injection 6.0 pC
AWMG
Low Standby Current: I = 1.0 nA (Max) @ T = 25C
CC
A
G
*OVT on Pins 4 and 8 (CTRL Logic Pins)
These are Pb−Free Devices
1
WQFN−10
CASE 488AQ
AW
M
= Specific Device Code
= Date Code
= Pb−Free Device
Typical Applications
Cell Phones
PDAs
G
(Note: Microdot may be in either location)
MP3s
Digital Still Cameras
FUNCTION TABLE
USB 2.0 Full Speed (USB1.1) − 12 Mbps Compliant
IN_
NO_
NC_
0
1
OFF
ON
ON
Important Information
ESD Protection:
OFF
Human Body Model (HBM) = 2500 V,
Machine Model (MM) = 200 V
Latchup Max Rating: 200 mA (Per JEDEC EIA/JESD78)
ORDERING INFORMATION
†
Device
Package
Shipping
Pin−to−Pin Compatible with MAX4717
NLAS4717EPFCT1G Microbump−10
(Pb−Free)
3000 /
Tape & Reel
*OVT
Overvoltage Tolerant (OVT) specific pins operate higher than normal
supply voltages, with no damage to the devices or to signal integrity.
NLAS4717EPMTR2G WQFN−10
(Pb−Free)
3000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
October, 2011 − Rev. 7
NLAS4717EP/D
NLAS4717EP
NO1
2
V
CC
GND
B
1
1
NC2
IN2
NC1
IN1
C
A
1
1
3
4
5
10
9
COM1
IN1
NO2
COM2
IN2
C
C
C
A
2
A
3
A
4
2
3
4
COM2
NO2
COM1
NO1
8
NC1
6
7
B
4
VCC
GND
NC2
Microbump
(Top View)
WQFN
(Top View)
Figure 1. Device Circuit Diagrams and Pin Configurations
MAXIMUM RATINGS
Symbol
Parameter
Value
*0.5 to )7.0
*0.5 V V )0.5
Unit
V
V+
DC Supply Voltage
V
IS
Analog Input Voltage (V , V , or V ) (Note 1)
COM
V
NO NC
IS
CC
V
IN
Digital Select Input Voltage
V
*0.5 V )7.0
I
I
DC Current, Into or Out of Any Pin (Continuous)
Peak Current (10% Duty Cycle)
100
200
mA
mA
IK
I
PK
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Signal voltage on NC, NO, and COM exceeding VCC or GND are clamped by the internal diodes. Limit forward diode current to maximum
current rating.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
1.8
Max
5.5
Unit
V
V+
DC Supply Voltage
V
V
Digital Select Input Voltage
GND
GND
−40
5.5
V
IN
IS
Analog Input Voltage (NC, NO, COM)
Operating Temperature Range
Input Rise or Fall Time, SELECT
V
CC
V
T
+85
C
ns/V
A
t , t
r
f
V
CC
V
CC
= 3.3 V 0.3 V
= 5.0 V 0.5 V
0
0
100
20
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2
NLAS4717EP
ANALOG SWITCH DC CHARACTERISTICS
−40C to +85C
Min
V x 0.55
CC
Max
Symbol
Parameter
Condition
V
(V)
Unit
CC
V
IH
Input Logic High Voltage
V
OUT
= 0.1 V
1.65 to 2.2
2.7 to 3.6
4.5 to 5.5
−
−
−
V
I
20 ꢁ A
V
CC
x 0.5
OUT
2.0
V
Input Logic Low Voltage
V
= −V − 0.1 V
1.65 to 2.2
2.7 to 3.6
4.5 to 5.5
−
−
−
V
V
x 0.2
V
IL
OUT
CC
CC
I
IN
IN
20 ꢁ A
x 0.2
OUT
CC
0.8
I
IN
Input Leakage Current
Power Supply Range
Supply Current
V
= V or GND
5.5
−100
+100
5.5
nA
V
CC
V
All
−
1.65
CC
CC
I
V
= V or GND
1.8
3.3
5.5
−
−
−
1.0
1.0
1.0
ꢁ
A
CC
I
= 0 ꢁ A
OUT
ANALOG SWITCH CHARACTERISTICS − Digital Section (Voltages Referenced to GND)
−40C to +85C
Min
Typ
Max
Symbol
Parameter
Condition
= 10 mA
COM
V
(V)
Unit
CC
R
ON Resistance
(Note 2)
I
3.0
−
3.2
4.5
ꢀ
ON
V
IS
= 0 to V
CC
5.0
3.0
−
−
2.1
0.1
3.5
0.4
ꢂ
R
ON Resistance
Match Between Channels
(Note 2 and 3)
I
V
= 10 mA
= 0 to V
CC
ꢀ
ꢀ
COM
ON
IS
5.0
3.0
−
−
0.1
0.4
1.5
R
ON Resistance
Flatness
I
= 10 mA
1.12
FLAT[ON]
COM
V
= 0 to V
CC
IS
(Note 4)
5.0
3.6
−
0.55
0.01
1.36
+1.0
I
I
NO_, NC_
Off−Leakage Current
(Note 5)
V
= 0.3 V or 3.3 V
−1.0
nA
NO_[OFF]
COM
V
or V = 0.3 V or 3.3 V
NC
NC_[OFF]
NO
V
= 0 V or 5.0 V
5.5
3.6
−1.0
−2.0
0.01
0.01
+1.0
+2.0
COM
V
or V = 0 V or 5.0 V
NC
NO
I
COM_
On−Leakage Current
(Note 5)
V
COM
= 0.3 V or 3.3 V
nA
COM_[ON]
V
NO
or V = 0.3 V or 3.3 V
NC
V
COM
= 0 V or 5.0 V
5.5
−2.0
0.01
+2.0
V
NO
or V = 0 V or 5.0 V
NC
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3
NLAS4717EP
ANALOG SWITCH AC CHARACTERISTICS
−40C to +85C
Min
Typ
Max
Symbol
Parameter
Condition
, V = V or V
IL
V
(V)
Unit
CC
t
Turn−On Time
V
NC_
1.8 to 5.5
−
−
30
nS
ON
NO_
IH
R = 300 ꢀ, C = 35 pF
L
L
V
IN[x]
= V or V
IH IL
t
Turn−Off Time
V
NC_
, V
NO_
= V or V
IL
1.8 to 5.5
−
−
40
nS
OFF
IH
R = 300 ꢀ, C = 35 pF
L
L
V
IN[x]
= V or V
IH IL
t
Break−Before−Make
Time Delay
V
, V = 1.5 V
NO_
−
−
−
−
8.0
−
nS
nS
BBM
NC_
R = 300 ꢀ, C = 35 pF
L
L
(Note 5)
t
Skew
R
= 39 ꢀ, C = 50 pF
0.15
2.0
SKEW
S
L
(Note 5)
2. R characterized for V range (1.65 V to 5.5 V).
ON
CC
3. ꢂ R = R (MAX) − R (MIN).
ON
FLAT[ON]
5. Guaranteed by design.
ON
ON
4. R
= R (MAX) − R (MIN), measured over V range.
ON ON CC
ANALOG SWITCH APPLICATION CHARACTERISTICS
−40C to +85C
Min
Typ
Max
Symbol
Parameter
Condition
= V to GND
V
(V)
Unit
CC
Q
Charge Injection
V
3.0
5.0
6.0
9.0
pC
IN
CC
R
= 0 ꢀ, C = 1.0 nF
L
In
Q = C − ꢂ V
L
OUT
VISO
Off−Isolation
Cross−Talk
f = 10 MHz
_, V _ = 1.0 Vp−p
1.65 to 5.5
1.65 to 5.5
1.8 to 5.0
−50
−75
−80
−110
90
dB
dB
V
NO
NC
R = 50 ꢀ, C = 5.0 pF
L
L
f = 1.0 MHz
V
_, V _ = 1.0 Vp−p
NO NC
R = 50 ꢀ, C = 5.0 pF
L
L
VCT
f = 10 MHz
V
_, V _ = 1.0 Vp−p
NO NC
R = 50 ꢀ, C = 5.0 pF
L
L
f = 1.0 MHz
V
_, V _ = 1.0 Vp−p
NO NC
R = 50 ꢀ, C = 5.0 pF
L
L
BW
On−Channel
Signal = 0 dB
MHz
−3.0 db Bandwidth
R = 50 ꢀ, C = 5.0 pF
L
L
THD
Total Harmonic Distortion
V
= 2.0 Vp−p,
−
−
0.02
15
%
COM
RL = 600 ꢀ ꢃ T = 25C
A
C
C
NO_, NC_
OFF−Capacitance
F = 1.0 MHz
F = 1.0 MHz
pF
NO_[OFF]
NC_[OFF]
C
C
NO_, NC_
ON−Capacitance
−
38
pF
NO_[ON]
NC_[ON]
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4
NLAS4717EP
2.0
1.5
1.0
0.5
0.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
+85C
+25C
−40C
+85C
+25C
−40C
0.0
1.0
2.0
V
3.0
4.0
5.0
0.0
0.5
1.0
1.5
(V)
2.0
2.5
3.0
(V)
V
COM
COM
Figure 2. RDS(on) @ VCC = 5.0 V
Figure 3. RDS(on) @ VCC = 3.0 V
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
3.0 V
5.0 V
−40C
+25C
+85C
−40C
+25C
+85C
TEMPERATURE (C)
TEMPERATURE (C)
Figure 4. Delta RDS(on) @ VCC = 5.0 V
Figure 5. Delta RDS(on) @ VCC = 3.0 V
8
6
1
4
5.0 V
3.0 V
2
0
0.1
−2
−4
−6
−8
−10
3.0 V
0.01
0.0
1.0
2.0
V
3.0
4.0
5.0
10
100
1000
10000
100000
(V)
FREQUENCY (Hz)
COM
Figure 6. Charge Injection
Figure 7. Total Harmonic Distortion
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5
NLAS4717EP
20
0
10
0
V
CC
= 1.65 V to 5.5 V
−20
−40
−60
−80
−100
−120
−140
−10
Bandwidth
−3 dB
0
−45
Cross−Talk
Phase
−30 deg
V
= 3.0 V to 5.0 V
OFF−Isolation
CC
T = −40C to +85C
A
0.001
0.01
0.1
1
10
100
0.1
1
10
100
1000
(MHz)
(MHz)
Figure 8. Frequency Response
Figure 9. Bandwidth and Phase
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6
NLAS4717EP
V
CC
DUT
Input
GND
V
Output
CC
V
OUT
0.1 ꢁ F
t
BMM
300 ꢀ
35 pF
90%
90% of V
OH
Output
Switch Select Pin
GND
Figure 10. tBBM (Time Break−Before−Make)
V
CC
Input
50%
50%
90%
DUT
0 V
V
CC
Output
V
OUT
V
0.1 ꢁ F
OH
Open
90%
300 ꢀ
35 pF
Output
V
OL
Input
t
t
OFF
ON
Figure 11. tON/tOFF
V
CC
V
CC
Input
50%
50%
DUT
0 V
300 ꢀ
Output
V
OUT
V
OH
Open
35 pF
Output
V
10%
10%
OL
Input
t
t
ON
OFF
Figure 12. tON/tOFF
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7
NLAS4717EP
50 ꢀ
DUT
Reference
Transmitted
Input
Output
50 ꢀ Generator
50 ꢀ
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. V , Bandwidth and V are independent of the input signal direction.
ISO
ONL
V
OUT
= Off Channel Isolation = 20 Log ǒ Ǔ for V
V
V
at 100 kHz
IN
ISO
V
IN
OUT
V
= On Channel Loss = 20 Log ǒ Ǔ for V
at 100 kHz to 50 MHz
ONL
IN
V
IN
Bandwidth (BW) = the frequency 3.0 dB below V
ONL
V
CT
= Use V
setup and test to all other switch analog input/outputs terminated with 50 ꢀ
ISO
Figure 13. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
V
CC
V
IN
Output
Open
GND
C
L
Output
Off
ꢂ V
OUT
Off
On
V
IN
Figure 14. Charge Injection: (Q)
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8
NLAS4717EP
PACKAGE DIMENSIONS
Microbump−10
CASE 489AA−01
ISSUE A
4 X
D
A
B
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION:
MILLIMETERS.
0.10
C
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
PIN ONE
CORNER
E
MILLIMETERS
DIM MIN
MAX
A
−−− 0.650
A1
A1 0.210 0.270
A2 0.280 0.380
D
E
b
e
D1
E1
1.965 BSC
1.465 BSC
0.250 0.350
0.500 BSC
1.500 BSC
1.000 BSC
0.10
C
A2
A
0.075 C
SEATING
PLANE
C
D1
e
C
B
A
10 X
b
E1
0.15
0.05
C
C
A B
1
2
3
4
e
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9
NLAS4717EP
PACKAGE DIMENSIONS
WQFN10, 1.4x1.8, 0.4P
CASE 488AQ−01
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
EDGE OF PACKAGE
D
A
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30 MM
FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
M1
E
PIN 1 REFERENCE
5. EXPOSED PADS CONNECTED TO DIE FLAG.
USED AS TEST CONTACTS.
DETAIL A
0.15
0.15
C
Bottom View
2X
MILLIMETERS
(Optional)
DIM MIN
MAX
0.80
A
A1
A3
b
0.70
0.00
C
2X
0.050
B
MOLD CMPD
EXPOSED Cu
0.20 REF
0.15
0.25
A
D
1.40 BSC
0.10
0.08
C
E
1.80 BSC
0.40 BSC
A3
e
L
0.30
0.50
0.60
0.05
C
0.40
0.00
L1
M1
A1
A1
DETAIL B
Side View
(Optional)
SEATING
PLANE
A3
C
MOUNTING FOOTPRINT*
5
3
e/2
e
9 X L
1.700
0.0669
9 X
6
0.563
0.0221
1
0.663
0.0261
10
0.200
0.0079
L1
10 X
0.10 C A B
0.05 C
1
b
NOTE 3
2.100
0.0827
0.400
0.0157
10 X
0.225
PITCH
0.0089
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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NLAS4717EP/D
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