NCP333FCT2G [ONSEMI]
Ultra-Small Controlled Load Switch Auto-Discharge Path;
| 型号： | NCP333FCT2G |
| 厂家： | 
ONSEMI |
| 描述： | Ultra-Small Controlled Load Switch Auto-Discharge Path 驱动 接口集成电路 驱动器 |
| 文件： | 总10页 (文件大小：180K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP333
1.5 A Ultra-Small Controlled
Load Switch with
Auto-Discharge Path
Description
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The NCP333 are low Ron MOSFET controlled by external logic
pin, allowing optimization of battery life, and portable device
autonomy.
Indeed, thanks to a current consumption optimization with PMOS
structure, leakage currents are eliminated by isolating connected IC’s
on the battery when not used.
Output discharge path is also embedded to eliminate residual
voltages on the output rail.
WLCSP4
FC SUFFIX
CASE 567FJ
Proposed in a wide input voltage range from 1.2 V to 5.5 V, and a
very small 0.76 x 0.76 mm WLCSP4, 0.4 pitch.
PIN CONNECTIONS
1
2
Features
• 1.2 V − 5.5 V Operating Range
• 55 mW P MOSFET at 3.3 V
• DC Current up to 1.5 A
• Output Auto−Discharge
• Active High EN Pin
A
B
OUT
IN
GND
EN
• WLCSP4 0.76 x 0.76 mm
(Top View)
• This Device is Pb−Free, Halogen Free/BFR Free and is RoHS
Compliant
ORDERING INFORMATION
See detailed ordering and shipping information on page 10 of
Applications
this data sheet.
• Mobile Phones
• Tablets
• Digital Cameras
• GPS
• Portable Devices
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
May, 2014 − Rev. 1
NCP333/D
NCP333
VOUT
8
NCP333
IN OUT
PVIN
2
1
2
SW
7
A2
B2
A1
B1
B+
AVIN
NCP63xy/WDFN8
FB
EN GND
U5
4
6
EN
5
EN
MODE/PG
EN
PGND
1
AGND
3
Figure 1. Typical Application Circuit
Table 1. PIN FUNCTION DESCRIPTION
Pin Name
Pin Number
Type
Description
IN
A2
POWER
Load−switch input voltage; connect a 0.1 mF or greater ceramic capacitor from IN to
GND as close as possible to the IC.
GND
EN
B1
B2
A1
POWER
INPUT
Ground connection.
Enable input, logic high turns on power switch.
OUT
OUTPUT
Load−switch output; connect a 0.1 mF ceramic capacitor from OUT to GND as close as
possible to the IC is recommended.
IN: pin A2
OUT: pin A1
Gate driver and soft
start control
Control
logic
EN: pin B2
EN block
GND: pin B1
Figure 2. Block Diagram
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NCP333
Table 2. MAXIMUM RATINGS
Rating
Symbol
Value
−0.3 to + 7.0
0 to + 7.0
4000
Unit
V
IN, OUT, EN, Pins
V
V
V
EN, IN, OUT
From IN to OUT Pins: Input/Output
Human Body Model (HBM) ESD Rating are (Notes 1, 2)
Machine Model (MM) ESD Rating are (Notes 1, 2)
Maximum Junction Temperature
Storage Temperature Range
V
V
V
IN, OUT
ESD HBM
ESD MM
V
200
V
T
J
−40 to +125
−40 to +150
Level 1
°C
°C
T
STG
Moisture Sensitivity (Note 4)
MSL
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. OPERATING CONDITIONS
Symbol
Parameter
Conditions
Min
1.2
0
Typ
25
Max
5.5
Unit
V
V
IN
Operational Power Supply
Enable Voltage
V
EN
5.5
V
T
A
Ambient Temperature Range
Decoupling input capacitor
Decoupling output capacitor
Thermal Resistance Junction to Air
Maximum DC current
−40
0.1
0.1
+85
°C
mF
mF
°C/W
A
C
IN
C
OUT
R
WLCSP package (Note 5)
1 ms
150
q
JA
I
1.5
2
OUT
peak
I
Maximum Peak current
A
P
D
Power Dissipation Rating (Note 6)
T
≤ 25°C
WLCSP package
WLCSP package
0.4
W
A
T = 85°C
A
0.16
W
1. According to JEDEC standard JESD22−A108.
2. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM) 2.0 kV per JEDEC standard: JESD22-A114 for all pins.
Machine Model (MM) 200 V per JEDEC standard: JESD22-A115 for all pins.
3. Latch up Current Maximum Rating: 100 mA per JEDEC standard: JESD78 class II.
4. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020.
5. The R
is dependent of the PCB heat dissipation and thermal via.
q
JA
6. The maximum power dissipation ( ) is given by the following formula:
PD
TJMAX * TA
PD
+
RqJA
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3
NCP333
Table 4. ELECTRICAL CHARACTERISTICS Min & Max Limits apply for T between −40°C to +85°C for V between 1.2 V to
A
IN
5.5 V (Unless otherwise noted). Typical values are referenced to T = +25°C and V = 3.3 V (Unless otherwise noted).
A
IN
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
POWER SWITCH
R
Static drain-source
on-state resistance,
(Note 7)
Vin = 5.5 V,
= 200 mA
T = 25°C
45
55
90
55
74
mW
DSON
A
I
I
I
OUT
Vin = 3.3 V,
= 200 mA
T = 25°C
A
OUT
Vin = 1.8 V,
= 200 mA
T = 25°C
A
125
135
400
OUT
T = 85°C
A
Vin = 1.2 V,
= 200 mA
T = 25°C
A
300
I
OUT
Rdis
Output discharge path
Output rise time (Note 8)
Output fall time (Note 8)
Vin = 3.3 V
EN = low
70
95
110
W
ms
ms
T
R
V
IN
V
IN
= 3.6 V
= 3.6 V
C
C
= 1 mF, R
LOAD
= 25 W
= 5 W
LOAD
T
F
11
C
= 1 mF, R
LOAD
LOAD
LOAD
LOAD
= 1 mF, R
= 1 mF, R
= 25 W
40
C
= 100 W
= 1 mF, R = 25 W
LOAD
94
LOAD
LOAD
T
on
Turn on (Note 8)
Enable time
V
V
= 3.6 V
= 3.6 V
C
195
100
ms
ms
IN
LOAD
T
en
From EN low to high to
Vout = 10% of fully on
IN
V
High-level input voltage
Low-level input voltage
EN pull down resistor
0.9
V
V
IH
V
0.5
IL
EN
5
MW
pd
QUIESCENT CURRENT
Iq Current consumption
Vin = 4.2 V, EN = low, No load
Vin = 4.2 V, EN = high, No load
1
1
mA
mA
7. Guaranteed by design and characterization
8. Parameters are guaranteed for C and R
connected to the OUT pin with respect to the ground
LOAD
LOAD
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4
NCP333
TIMINGS
Vin
EN
Vout
T
EN
T
R
T
DIS
T
F
T
ON
T
OFF
Figure 3. Enable, Rise and Fall Time
TYPICAL CHARACTERISTICS
400
350
300
250
200
150
100
50
0
1
2
3
4
5
6
V_IN (V)
Figure 4. RDS(on) (mW) vs. VIN (V)
(ILOAD = 100 mA & Temp 255C)
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5
NCP333
TYPICAL CHARACTERISTICS
130
120
110
100
400
350
300
250
200
150
100
1.8 V
1.2 V
90
80
70
60
50
3.6 V 4.2 V
1.8 V
3.3 V
3.3 V
3.6 V
50
0
Vin = 5.5 V
40
30
Vin = 5.5 V
100 125
0
250
500
750
I_OUT (mA)
1000
1250
1500
−50
−25
0
25
50
75
TEMPERATURE (°C)
Figure 5. RDS(on) (mW) vs. ILOAD (mA)
Figure 6. RDS(on) (mW) vs. Temperature (5C) at
ILOAD 100 mA
150
130
110
90
0.3
0.2
1.8 V
85°C
3.6 V
25°C
3.3 V
70
0.1
0
Temp = −40°C
50
30
Vin = 5.5 V
50
4.2 V
−50
0
100
0
1
2
3
4
5
6
TEMPERATURE (°C)
V_IN (V)
Figure 7. RDS(on) (mW) vs. Temperature (5C) at
Figure 8. Standbycurrent vs. Temperature (5C)
I
LOAD 1500 mA
No Load
0.4
0.3
0.2
1.0
0.9
0.8
25°C
0.7
0.6
0.5
0.4
0.3
0.2
85°C
85°C
Temp = −40°C
25°C
0.1
0
Temp = −40°C
0.1
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
V_IN (V)
V_IN (V)
Figure 9. Standbycurrent vs. Temperature (5C)
Figure 10. Quiescent Current vs. Temperature
Output Shorted to GND
(5C)
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NCP333
Figure 11. Enable Time and Rise Time
Figure 12. Disable Time and Fall Time
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NCP333
FUNCTIONAL DESCRIPTION
Overview
The auto-discharge is activated when EN pin is set to low
level (disable state).
The discharge path (Pull down NMOS) stays activated as
long as EN pin is set at low level, and Vin > 1.2 V.
In order to limit the current across the internal discharge
Nmosfet, the typical value is set at 70 W.
The NCP333 are a high side P channel MOSFET power
distribution switch designed to isolate ICs connected on the
battery in order to save energy. The part can be turned on,
with a wide range of battery from 1.2 V to 5.5 V.
Enable Input
Enable pin is an active high. The path is opened when EN
pin is tied low (disable), forcing P MOS switch off.
The IN/OUT path is activated with a minimum of Vin of
1.2 V and EN forced to high level.
Soft Start
Each part has a gate soft start control (tr) in order to limit
voltage ring when part is enable on a load.
Cin and Cout Capacitors
Auto Discharge
IN and OUT, 0.1 mF, at least, capacitors must be placed as
close as possible the part for stability improvement.
NMOS FET is placed between the output pin and GND,
in order to discharge the application capacitor connected on
OUT pin.
APPLICATION INFORMATION
• T = P x R
Power Dissipation
+ T
A
J
D
qJA
Main contributor in term of junction temperature is the
power dissipation of the power MOSFET. Assuming this, the
power dissipation and the junction temperature in normal
T = Junction temperature (°C)
J
R
= Package thermal resistance (°C/W)
qJA
T = Ambient temperature (°C)
A
mode can be calculated with the following equations:
2
PCB Recommendations
• P = R
x (I
)
OUT
D
DS(on)
The NCP333 integrates an up to 1.5 A rated PMOS FET,
and the PCB design rules must be respected to properly
evacuate the heat out of the silicon. By increasing PCB area,
P = Power dissipation (W)
D
R
DS(on)
= Power MOSFET on resistance (W)
I
= Output current (A)
OUT
especially around IN and OUT pins, the R
of the package
qJA
can be decreased, allowing higher power dissipation.
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NCP333
Figure 13. Routing Example: 2 oz, 4 Layers with Vias across 2 Internal Inners
Example of application definition.
T −T = R x P = R x R x I
DS(on)
Taking into account of R_ obtain with:
• 1 oz, 2 layers: 150_C/W.
2
J
A
qJA
D
qJA
T : junction temperature.
J
At 1.5 A, 25_C ambient temperature, R
Vin 5 V, the junction temperature will be:
45 mΩ @
DS(on)
T : ambient temperature.
A
R
R
= Thermal resistance between IC and air, through PCB.
qJA
2
T = T + R
x P = 25 + 150 x 0.045 x 1.5 = 40°C/W
J
A
qJA
D
: intrinsic resistance of the IC Mosfet.
DS(on)
I: load DC current.
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9
NCP333
ORDERING INFORMATION
†
Device
Marking
Option
Package
WLCSP 0.76 x 0.76 mm
Shipping
NCP333FCT2G
AE
Autodischarge
3000 Tape / Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
PACKAGE DIMENSIONS
WLCSP4, 0.76x0.76
CASE 567FJ
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
A
D
B
E
PIN A1
REFERENCE
MILLIMETERS
2X
0.05
0.05
C
DIM
A
A1
A2
b
MIN
0.57
0.18
0.40 REF
0.24
MAX
0.63
0.23
2X
C
TOP VIEW
0.28
D
E
e
0.76 BSC
0.76 BSC
0.40 BSC
A2
0.05
C
C
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05
SEATING
PLANE
PACKAGE
OUTLINE
A1
NOTE 3
C
A1
SIDE VIEW
e
4X
4X
b
0.40
PITCH
e
0.20
0.05
0.03
C
C
A B
0.40
B
PITCH
A
DIMENSIONS: MILLIMETERS
1
2
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
BOTTOM VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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PUBLICATION ORDERING INFORMATION
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Phone: 421 33 790 2910
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For additional information, please contact your local
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NCP333/D
相关型号：
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