NCP336FCT2G [ONSEMI]
3 A Ultra-Small Controlled Load Switch;
| 型号： | NCP336FCT2G |
| 厂家： | 
ONSEMI |
| 描述： | 3 A Ultra-Small Controlled Load Switch |
| 文件： | 总9页 (文件大小：396K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP336, NCP337
3 A Ultra-Small Controlled
Load Switch with
Auto-Discharge Path
Description
http://onsemi.com
The NCP336 and NCP337 are very low Ron MOSFET controlled
by external logic pin, allowing optimization of battery life, and
portable device autonomy.
Indeed, thanks to a current consumption optimization with PMOS
structure, leakage currents are eliminated by isolating connected IC on
the battery when not used.
Output discharge path is also embedded to eliminate residual
voltages on the output rail for the NCP337 part only.
Proposed in a wide input voltage range from 1.2 V to 5.5 V, in a
small 1 x 1.5 mm WLCSP6, pitch 0.5 mm.
WLCSP6
FC SUFFIX
CASE 567FH
PIN CONNECTIONS
1
2
Features
• 1.2 V − 5.5 V Operating Range
• 21 mW P MOSFET at 4.5 V
• DC Current up to 3 A
A
B
C
OUT
IN
OUT
GND
IN
• Output Auto−Discharge
• Active High EN Pin
• WLCSP6 1 x 1.5 mm
EN
• This Device is Pb−Free, Halogen Free/BFR Free and is RoHS
Compliant
(Top View)
Applications
• Mobile Phones
• Tablets
ORDERING INFORMATION
See detailed ordering and shipping information on page 8 of
this data sheet.
• Digital Cameras
• GPS
• Portable Devices
VCC
V+
LS
NCP336 or NCP337
DCDC Converter
A2
B2
A1
B1
SMPS
Platform IC’n
IN OUT
IN OUT
or
LDO
C2
EN
100n
1μF
ENy
ENx
0
LS
Platform IC’n+1
Figure 1. Typical Application Circuit
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
September, 2012 − Rev. 2
NCP336/D
NCP336, NCP337
Table 1. PIN FUNCTION DESCRIPTION
Pin Name
Pin Number
Type
Description
IN
A2, B2
POWER
Load−switch input voltage; connect a 1 mF or greater ceramic capacitor from IN to GND
as close as possible to the IC.
GND
EN
C1
C2
POWER
INPUT
Ground connection.
Enable input, logic high turns on power switch.
OUT
A1, B1
OUTPUT
Load−switch output; connect a 1 mF ceramic capacitor from OUT to GND as close as
possible to the IC is recommended.
Figure 2. Block Diagram
http://onsemi.com
2
NCP336, NCP337
Table 2. MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
IN, OUT, EN, Pins: (Note 1)
V
V
V
−0.3 to + 7.0
0 to + 7.0
EN, IN, OUT
From IN to OUT Pins: Input/Output (Note 1)
Maximum Junction Temperature
Storage Temperature Range
V
V
V
IN, OUT
T
J
−40 to + 125
−40 to + 150
Level 1
°C
°C
T
STG
Moisture Sensitivity (Note 2)
MSL
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. OPERATING CONDITIONS
Symbol
Parameter
Conditions
Min
1.2
0
Typ
Max
5.5
Unit
V
IN
Operational Power Supply
Enable Voltage
V
V
EN
5.5
T
Ambient Temperature Range
Junction Temperature Range
Decoupling input capacitor
Decoupling output capacitor
Thermal Resistance Junction to Air
Maximum DC current
−40
−40
1
25
25
+85
+125
°C
°C
A
T
J
C
mF
mF
°C/W
A
IN
C
1
OUT
R
WLCSP package (Note 3)
100
q
JA
I
3
OUT
P
D
Power Dissipation Rating (Note 4)
T
≤ 25°C
WLCSP package
WLCSP package
0.66
0.26
W
A
T = 85°C
A
W
1. According to JEDEC standard JESD22−A108.
2. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020.
3. The R is dependent of the PCB heat dissipation and thermal via.
q
JA
4. The maximum power dissipation ( ) is given by the following formula:
PD
TJMAX * TA
PD
+
RqJA
http://onsemi.com
3
NCP336, NCP337
Table 4. ELECTRICAL CHARACTERISTIC Min & Max Limits apply for T between −40°C to +85°C for V between 1.2 V to 5.5 V
A
IN
(Unless otherwise noted). Typical values are referenced to T = +25°C and V = 5 V (Unless otherwise noted).
A
IN
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
POWER SWITCH
R
Static drain−source
on−state resistance
Vin = 5.5 V
Vin = 4.5 V
Vin = 3.3 V
Vin = 2.5 V
Vin = 1.8 V
Vin = 1.2 V
EN = low
I = 1 A (Note 5)
I = 500 mA (Note 5)
I = 500 mA (Note 5)
I = 500 mA (Note 5)
I = 250 mA (Note 5)
20
21
23
28
40
95
70
22
25
mW
DSON
28
35
45
T = 25°C, I = 200 mA
A
120
90
Rdis
Output discharge path
High−level input voltage
Low−level input voltage
EN pull down resistor
W
V
IH
0.9
V
V
IL
0.5
R
5
MW
pd
QUIESCENT CURRENT
Istd
Iq
Standby current
Vin = 4.2 V
Vin = 4.2 V
EN = low, No load
EN = high, No load
1
1
mA
mA
Quiescent current
TIMINGS
T
Enable time
Vin = 3.6 V
(Note 6)
R = 25 W, Cout = 1 mF
323
810
1130
42
ms
EN
L
T
Output rise time
R = 25 W, Cout = 1 mF
L
R
T
ON
ON time (T + T )
R = 25 W, Cout = 1 mF
L
EN
R
T
Output fall time
NCP337. R = 25 W, Cout = 1 mF
L
F
5. Guaranteed by design and characterization
6. Parameters are guaranteed for C and R
connected to the OUT pin with respect to the ground
LOAD
LOAD
TIMINGS
Vin
EN
Vout
T
EN
T
R
T
DIS
T
F
T
ON
T
OFF
Figure 3. Enable, Rise and Fall Time
http://onsemi.com
4
NCP336, NCP337
TYPICAL CHARACTERISTICS
Figure 4. Rdson (mW) vs. Vin (V)
Figure 5. Rdson (mW) vs. Iload (A)
Figure 6. Rdson (mW) vs. Temperature (5C) at 100 mA
Figure 7. Rdson (mW) vs. Temperature (5C) at 3 A
http://onsemi.com
5
NCP336, NCP337
TYPICAL CHARACTERISTICS
Figure 8. Standby (mA) and Leakage Current (mA)
Figure 9. Standby Current (mA) vs.
Temperature (5C)
vs. Vin (V)
Figure 10. Leakage Current (mA) vs.
Temperature (5C)
Figure 11. Quiescent Current (mA) vs.
Temperature (5C)
http://onsemi.com
6
NCP336, NCP337
Figure 12. Enable Time and Rise Time
Figure 13. Disable Time and Fall Time
FUNCTIONAL DESCRIPTION
Auto Discharge
Overview
The NCP337 is a high side P channel MOSFET power
distribution switch designed to isolate ICs connected on the
battery in order to save energy. The part can be turned on,
with a wide range of battery from 1.2 V to 5.5 V.
NMOS FET is placed between the output pin and GND,
in order to discharge the application capacitor connected on
OUT pin.
The auto−discharge is activated when EN pin is set to low
level (disable state).
The discharge path (Pull down NMOS) stays activated as
long as EN pin is set at low level and Vin > 1.2 V.
In order to limit the current across the internal discharge
Nmosfet, the typical value is set at 70 W.
Enable Input
Enable pin is an active high. The path is opened when EN
pin is tied low (disable), forcing P MOS switch off.
The IN/OUT path is activated with a minimum of Vin of
1.2 V and EN forced to high level.
Cin and Cout Capacitors
IN and OUT, 1 mF, at least, capacitors must be placed as
close as possible the part to for stability improvement.
http://onsemi.com
7
NCP336, NCP337
APPLICATION INFORMATION
Power Dissipation
• T = P x R
+ T
A
J
D
qJA
Main contributor in term of junction temperature is the
power dissipation of the power MOSFET. Assuming this,
the power dissipation and the junction temperature in
normal mode can be calculated with the following
T = Junction temperature (°C)
J
R
= Package thermal resistance (°C/W)
qJA
T = Ambient temperature (°C)
A
PCB Recommendations
equations:
2
The NCP337 integrates an up to 3 A rated PMOS FET, and
the PCB design rules must be respected to properly evacuate
the heat out of the silicon. By increasing PCB area,
especially around IN and OUT pins, the R
can be decreased, allowing higher power dissipation.
• P = R
x (I
)
OUT
D
DS(on)
P = Power dissipation (W)
D
R
DS(on)
= Power MOSFET on resistance (W)
of the package
qJA
I
= Output current (A)
OUT
Figure 14. Routing Example: 2 oz, 4 layers with vias across 2 internal inners.
Example of application definition.
TJ * TA + RqJA PD + RqJA RDS(on) I2
At 3 A, 25°C ambient temperature, R
20 mW @ Vin
DS(on)
5 V, the junction temperature will be:
TJ + TA ) Rq PD + 25 ) (0.024 32) 100 + 43oC
T : junction temperature.
J
T : ambient temperature.
A
Taking into account of R obtain with:
• 2 oz, 4 layers: 60°C/W.
q
R = Thermal resistance between IC and air, through PCB.
q
R : intrinsic resistance of the IC Mosfet.
DS(on)
At 3 A, 65°C ambient temperature, R
24 mW @ Vin
DS(on)
I: load DC current.
5 V, the junction temperature will be:
Taking into account of R obtain with:
q
TJ + TA ) Rq PD + 65 ) (0.024 32) 60 + 78oC
• 1 oz, 2 layers: 100°C/W.
ORDERING INFORMATION
†
Device
Marking
AC
Option
Package
Shipping
NCP337FCT2G
NCP336FCT2G
Auto discharge
WLCSP 1 x 1.5 mm
WLCSP 1 x 1.5 mm
3000 Tape / Reel
3000 Tape / Reel
AF
Without Autodischarge
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
8
NCP336, NCP337
PACKAGE DIMENSIONS
WLCSP6, 1.00x1.50
CASE 567FH
ISSUE O
D
A
NOTES:
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
PIN A1
REFERENCE
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
E
MILLIMETERS
DIM
A
A1
A2
b
MIN
0.54
0.22
MAX
0.63
0.28
2X
0.05
0.05
C
0.33 REF
0.29
0.34
2X
C
TOP VIEW
SIDE VIEW
D
E
e
1.00 BSC
1.50 BSC
0.50 BSC
A2
0.05
C
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05
C
A1
SEATING
PLANE
PACKAGE
OUTLINE
NOTE 3
C
A1
eD/2
eD
6X
b
eE
0.05
0.03
C
C
A B
C
0.50
6X
0.25
PITCH
B
A
0.50
PITCH
DIMENSIONS: MILLIMETERS
1
2 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
BOTTOM VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NCP336/D
相关型号：
©2020 ICPDF网 联系我们和版权申明