NCP1595CMNTWG [ONSEMI]
SWITCHING REGULATOR;
| 型号： | NCP1595CMNTWG |
| 厂家： | 
ONSEMI |
| 描述： | SWITCHING REGULATOR 转换器 |
| 文件： | 总12页 (文件大小：129K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP1595, NCP1595A
Current Mode PWM
Converter for Low Voltage
Outputs
The NCP1595/NCP1595A is a current mode PWM buck converter
with integrated power switch and synchronous rectifier. It can provide
up to 1.5 A output current with high conversion efficiency. High
frequency PWM control scheme can provide a low output ripple noise.
Thus, it allows the usage of small size passive components to reduce
the board space. In a low load condition, the controller will
automatically change to PFM mode for provides a higher efficiency at
low load. Additionally, the device includes soft−start, thermal
shutdown with hysteresis, cycle−by−cycle current limit, and short
circuit protection. This device is available in compact 3x3 DFN
package.
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1
DFN6 3*3 MM, 0.95 PITCH
CASE 506AH
Features
MARKING DIAGRAMS
• High Efficiency 95% @ 3.375 V
• Synchronous Rectification for Higher Efficiency in PWM Mode
• Integrated MOSFET
1
1
N1595
ALYW
G
1595A
ALYW
G
• Fully Internal Compensation
• High Switching Frequency, 1.0 MHz
• Low Output Ripple
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
• Cycle−by−cycle Current Limit
• Current Mode Control
• Short Circuit Protection
• Built−in Slope Compensation for Current Mode PWM Converter
• $1.5% Reference Voltage
PIN CONNECTIONS
• Thermal Shutdown with Hysteresis
• Ext. Adjustable Output Voltage
• Fast Transient Response
FB
GND
LX
NC
VCC
VCCP
FB
GND
LX
EN
VCC
VCCP
• Low Profile and Minimum External Components
• Designed for Use with Ceramic Capacitor
• Compact 3x3 DFN Package
1595
1595A
• These are Pb−Free Devices
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
Typical Applications
• Hard Disk Drives
• USB Power Device
• Wireless and DSL Modems
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
October, 2006 − Rev. 2
NCP1595/D
NCP1595, NCP1595A
L1
V
= 4.0 V to 5.5 V
V
= 0.8 V to 0.9 x V
OUT IN
IN
LX
VCCP
R1
NCP1595
GND
FB
VCC
EN
C1
C2
R2
Figure 1. Typical Operating Circuit
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply (Pin 4, 5)
V
7.0
−0.3 (DC)
V
IN
−1.0 (100 ns)
Input / Output Pins
Pin 1,3,6
V
6.5,
−0.3 (DC)
−1.0 (100 ns)
V
IO
Thermal Characteristics
3x3 DFN Plastic Package
Maximum Power Dissipation @ T = 25°C
P
1450
68.5
mW
°C/W
A
D
Thermal Resistance Junction−to−Air
Operating Junction Temperature Range (Note 4)
Operating Ambient Temperature Range
Storage Temperature Range
R
q
JA
T
−40 to + 150
−40 to + 85
− 55 to +150
1
°C
°C
°C
−
J
T
A
T
stg
Moisture Sensitivity Level (Note 3)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: ESD data available upon request.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) 2.0 kV per JEDEC standard: JESD22−A114.
Machine Model (MM) 200 V per JEDEC standard: JESD22−A115.
2. Latchup Current Maximum Rating: 150 mA per JEDEC standard: JESD78.
3. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
4. The maximum package power dissipation limit must not be exceeded.
TJ(max) * TA
PD
+
RqJA
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2
NCP1595, NCP1595A
ELECTRICAL CHARACTERISTICS
(V = 5.0 V, V
IN
= 1.2 V, T = 25°C for typical value, −40°C v T v 85°C for min/max values unless otherwise noted)
OUT
A
A
Characteristic
Symbol
Min
4.0
3.2
Typ
−
Max
5.5
Unit
V
Operating Voltage
V
IN
Under Voltage Lockout Threshold
Under Voltage Lockout hysteresis
P FET Leakage Current (Pin 5, 4)
V
3.5
180
3.8
V
UVLO
UVLO_HYS
V
mV
mA
I
LEAK−P
T = 25°C
A
1.0
1.0
10
15
A
T = −40°C to 85°C
N FET Leakage Current (Pin 3, 2)
I
mA
LEAK−N
T = 25°C
10
15
A
T = −40°C to 85°C
A
FEEDBACK VOLTAGE
FB Input Threshold (T = −40°C to 85°C)
V
0.788
2.0
0.800
10
0.812
100
V
nA
%
A
FB
FB Input Current
I
FB
Overvoltage Protect Higher than FB Threshold (T = 25°C)
V
5.0
10.0
A
OVP
THERMAL SHUTDOWN
Thermal Shutdown Threshold (Note 5)
Hysteresis
T
TBD
160
30
−
°C
°C
SHDN
T
SDHYS
PWM SMPS MODE
Minimum ON−Time
TON
F
100
1.0
0.2
ns
MHz
W
MIN
Switching Frequency (T = −40°C to 85°C)
0.8
−
1.2
0.3
A
OSC
Internal PFET ON−Resistance (I = 100 mA, V = 5.0 V, T = 25°C)
(Note 5)
R
LX
IN
A
DS(ON)_P
Internal NFET ON−Resistance (I = 100 mA, V = 5.0 V, T = 25°C)
R
−
0.15
0.22
W
LX
IN
A
DS(ON)_N
(Note 5)
Maximum Duty Cycle
D
I
−
−
−
100
−
%
ms
A
MAX
Soft−Start Time (V = 5.0 V, V = 1.2 V, I
= 0 mA, T = 25°C) (Note 6)
T
1.0
2.5
IN
o
LOAD
A
SS
Main PFET Switch Current Limit (Note 5)
ENABLE (NCP1595A)
2.0
LIM
Enable Threshold High (NCP1595A Only)
Enable Threshold Low
V
1.8
V
V
EN_H
V
0.4
EN_L
Enable bias current ( EN = 0 V)
Total Device
I
500
TBD
nA
EN
Quiescent Current Into V
(V = 5 V, V = 1.0 V, T = 25°C)
I
10
900
1.5
mA
mA
mA
CCP
IN
FB
A
CCP
Quiescent Current Into V (V = 5 V, V = 1.0 V, T = 25°C)
I
CC
IN
FB
A
CC
Shutdown Quiescent Current into V and V
(NCP1595A Only)
I
CC_SD
3.0
CC
CCP
(EN = 0, V = 5 V, V = 1.0 V, T = 25°C)
IN
FB
A
5. Values are design guarantee.
6. Design guarantee, value depends on voltage at V
.
OUT
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NCP1595, NCP1595A
PIN FUNCTION DESCRIPTIONS
Pin #
NCP1595
1
Symbol
Pin Description
FB
Feedback pin. Part is internally compensated. Only necessary to place a voltage divider or connect the out-
put directly to this pin.
2
GND
LX
Ground
3
Pin connected internally to power switch. Connect externally to inductor.
Power connection to the power switch.
IC power connection.
4
VCCP
VCC
NC
5
6
No Connection
NCP1595A
1
FB
Feedback pin. Part is internally compensated. Only necessary to place a voltage divider or connect the out-
put directly to this pin.
2
3
4
5
6
GND
LX
Ground
Pin connected internally to power switch. Connect externally to inductor.
Power connection to the power switch.
VCCP
VCC
EN
IC power connection.
Device Enable pin. This pin has an internal current source pull up. No connect is enable the device. With this
pin pulled down below 0.4 V, the device is disabled and enters the shutdown mode.
VCCP
VCC
Power Reset
Under Voltage
Logout
Thermal
−
+
NC/EN
Shutdown
Oscillator
V
IN
Over Voltage
Protection
C1
Soft Start
V
= 0.8 V
OUT
L1
LX
to 0.9 V
IN
−
+
FB
+
−
+
Control Logic
R1
R2
C2
GND
Figure 2. Detail Block Diagram
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4
NCP1595, NCP1595A
EXTERNAL COMPONENT REFERENCE DATA
Device
V
Inductor Model
Inductor (L1)
C
IN
(C1)
C (C2)
OUT
R1
R2
OUT
NCP1595/
NCP1595A
3.3 V
2.5 V
1.5 V
1.2 V
CDC5D23 3R3 (1 A)
CDRH6D38 3R3 (1.5 A)
3.3 mH
22 mF
22 mF x 2
22 mF
22 mF x 2
31 k
10 k
NCP1595/
NCP1595A
CDC5D23 3R3 (1 A)
CDRH6D38 3R3 (1.5 A)
3.3 mH
3.3 mH
3.3 mH
22 mF
22 mF x 2
22 mF
22 mF x 2
21 k
8 k
10 k
10 k
10 k
NCP1595/
NCP1595A
CDC5D23 3R3 (1 A)
CDRH6D38 3R3 (1.5 A)
22 mF
22 mF x 2
22 mF
22 mF x 2
NCP1595/
NCP1595A
CDC5D23 3R3 (1 A)
CDRH6D38 3R3 (1.5 A)
22 mF
22 mF x 2
22 mF
22 mF x 2
5 k
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NCP1595, NCP1595A
TYPICAL OPERATING CHARACTERISTICS
0.815
0.810
0.805
0.800
0.795
0.790
0.785
0.30
0.25
0.20
0.15
0.10
0.05
0.00
−40
0
25
85
−40
0
25
85
LOW SIDE AMBIENT TEMPERATURE, (T /°C)
AMBIENT TEMPERATURE, (T /°C)
A
A
Figure 3. Switch ON Resistance vs.
Temperature
Figure 4. Feedback Input Threshold vs.
Temperature
1.3
1.2
1.1
1.0
0.9
0.8
0.7
3.0
2.8
2.5
2.3
2.0
1.8
1.5
−40
0
25
85
−40
0
25
85
AMBIENT TEMPERATURE, (T /°C)
AMBIENT TEMPERATURE, (T /°C)
A
A
Figure 5. Switching Frequency vs.
Temperature
Figure 6. Main P−FET Current Limit vs.
Temperature
1200
1100
1000
900
6
5
4
3
2
1
0
800
700
600
−40
0
25
85
−40
0
25
85
AMBIENT TEMPERATURE, (T /°C)
AMBIENT TEMPERATURE, (T /°C)
A
A
Figure 7. Quiescent Current Into VCC vs.
Figure 8. Shutdown Quiescent Current vs.
Temperature
Temperature
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NCP1595, NCP1595A
100
90
1.5
1.0
V
= 4.0 V
V
= 3.3 V
IN
OUT
L = 3.3 mH
V
= 5.0 V
IN
C
C
= 22 mF
= 22 mF
IN
OUT
80
0.5
70
V
= 4.0 V
= 5.0 V
60
50
40
30
20
0.0
IN
V
IN
−0.5
−1.0
−1.5
V
= 3.3 V
OUT
L = 3.3 mH
C
C
= 22 mF
= 22 mF
IN
OUT
10
100
1000
10000
10
100
1000
10000
Figure 9. Output Voltage Change vs. Output
Current
Figure 10. Efficiency vs. Output Current
100
90
80
70
60
50
40
30
20
1.5
1.0
V
= 1.8 V
OUT
V
= 4.0 V
IN
L = 3.3 mH
C
C
V
= 5.0 V
= 22 mF
= 22 mF
IN
IN
OUT
0.5
V
= 4.0 V
IN
0.0
V
= 5.0 V
IN
−0.5
−1.0
−1.5
V
= 1.8 V
OUT
L = 3.3 mH
C
C
= 22 mF
IN
OUT
= 22 mF
10000
10
100
1000
10000
10
100
1000
Figure 11. Output Voltage Change vs.
Output Current
Figure 12. Efficiency vs. Output Current
1.5
1.0
100
90
80
70
60
50
40
30
20
V
= 1.2 V
OUT
V
= 4.0 V
IN
L = 3.3 mH
C
C
= 22 mF
= 22 mF
IN
OUT
0.5
V
= 5.0 V
IN
V
= 4.0 V
IN
0.0
V
= 5.0 V
IN
−0.5
−1.0
−1.5
V
= 1.2 V
OUT
L = 3.3 mH
C
C
= 22 mF
= 22 mF
IN
OUT
10
100
1000
10000
10
100
1000
10000
Figure 14. Output Voltage Change vs.
Output Current
Figure 13. Efficiency vs. Output Current
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NCP1595, NCP1595A
(V = 5 V, I
IN
= 100 mA, L = 3.3 mH, C
= 20 mF)
(V = 5 V, I
IN
= 700 mA, L = 3.3 mH, C
= 20 mF)
LOAD
OUT
LOAD
OUT
Upper Trace: L Pin Switching Waveform, 2 V / div.
Upper Trace: L Pin Switching Waveform, 2 V / div.
X
X
Middle Trace: Output Ripple Voltage, 20 mV / div.
Lower Trace: Inductor Current, 1 A / div.
Middle Trace: Output Ripple Voltage, 20 mV / div.
Lower Trace: Inductor Current, 1 A / div.
Figure 15. DCM Switching Waveform for
Figure 16. CCM Switching Waveform for
VOUT = 3.3 V
VOUT = 3.3 V
(V = 5 V, I
IN
= 100 mA, L = 3.3 mH, C
= 20 mF)
(V = 5 V, I
IN
= 700 mA, L = 3.3 mH, C
= 20 mF)
LOAD
OUT
LOAD
OUT
Upper Trace: L Pin Switching Waveform, 2 V / div.
Upper Trace: L Pin Switching Waveform, 2 V / div.
X
X
Middle Trace: Output Ripple Voltage, 20 mV / div.
Lower Trace: Inductor Current, 1 A / div.
Middle Trace: Output Ripple Voltage, 20 mV / div.
Lower Trace: Inductor Current, 1 A / div.
Figure 17. DCM Switching Waveform for
Figure 18. CCM Switching Waveform for
VOUT = 1.2 V
VOUT = 1.2 V
(V = 5 V, I
IN
= 10 mA, L = 3.3 mH, C
= 20 mF x 2)
(V = 5 V, I
= 10 mA, L = 3.3 mH, C
= 20 mF x 2)
LOAD
OUT
IN
LOAD
OUT
Upper Trace: Input Voltage, 2 V/ div.
Middle Trace: Output Voltage, 1 V/ div.
Lower Trace: Input Current, 1 A / div.
Upper Trace: Input Voltage, 2 V/ div.
Middle Trace: Output Voltage, 1 V / div.
Lower Trace: Input Current, 1 A / div.
Figure 19. Soft−Start Waveforms for VOUT = 3.3 V
Figure 20. Soft−Start Waveforms for VOUT = 1.2 V
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NCP1595, NCP1595A
(V = 5 V, L = 3.3 mH, C
= 20 mF x 2)
(V = 5 V, L = 3.3 mH, C
= 20 mF x 2)
IN
OUT
IN
OUT
Upper Trace: Output Dynamic Voltage, 100 mV / div.
Lower Trace: Output Current, 500 mA / div.
Upper Trace: Output Dynamic Voltage, 100 mV / div.
Lower Trace: Output Current, 500 mA / div.
Figure 21. Load Regulation for VOUT = 3.3 V
Figure 22. Load Regulation for VOUT = 3.3 V
(V = 5 V, L = 3.3 H, C
= 20 mF x 2)
(V = 5 V, L = 3.3 H, C
= 20 mF x 2)
IN
OUT
IN
OUT
Upper Trace: Output Dynamic Voltage, 100 mV / div.
Lower Trace: Output Current, 500 mA / div.
Upper Trace: Output Dynamic Voltage, 100 mV / div.
Lower Trace: Output Current, 500 mA / div.
Figure 23. Load Regulation for VOUT = 1.2 V
Figure 24. Load Regulation for VOUT = 1.2 V
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NCP1595, NCP1595A
DETAILED OPERATING DESCRIPTION
Introduction
Soft−Start and Current Limit
NCP1595 operates as a current mode buck converter with
switching frequency at 1.0 MHz. The P−Channel main
switch is set by the positive edge of the clock cycle going
into the PWM latch. The main switch is reset by the
PWM latch in the following three cases:
A soft start circuit is internally implemented to reduce the
in−rush current during startup. This helps to reduce the
output voltage overshoot.
The current limit is set to allow peak switch current in
excess of 2 A. The intended output current of the system is
1.5 A. The ripple current is calculated to be approximately
350 mA with a 3.3 mH inductor. Therefore, the peak current
at 1.5 A output will be approximately 1.7 A. A 2 A set point
will allow for transient currents during load step. The current
limit circuit is implemented as a cycle−by−cycle current
limit. Each on−cycle is treated as a separate situation.
Current limiting is implemented by monitoring the
P−Channel switch current buildup during conduction with a
current limit comparator. The output of the current limit
comparator resets the PWM latch, immediately terminating
the current cycle.
1. PWM comparator output trips as the peak inductor
current signal reaches a threshold level established
by the error amplifier.
2. The inductor current has reached the current limit.
3. Overvoltage at output occurs.
After a minimum dead time, the N−Channel synchronized
switch will turn on and the inductor current will ramp down.
If the inductor current ramps down to zero before the
initiation of next clock cycle, the regulator runs at
discontinuous conduction mode (DCM). Otherwise the
regulator is at continuous conduction mode (CCM). The
N−Channel switch will turn off when the clock cycle starts.
The duty cycle is given by the ratio of output voltage to input
voltage. The duty cycle is allowed to go to 100% to increase
transient load response when going from light load to heavy
load.
Over−Voltage Protection
Overvoltage occurs when the feedback voltage exceeds
5% of its regulated voltage. In this case, the P−Channel main
switch will be reset and the N−Channel synchronized switch
is turn on to sink current from the output voltage which helps
to drop its feedback voltage back to the regulated voltage.
Error Amplifier and Slope Compensation
A fully internal compensated error amplifier is provided
inside NCP1595. No external circuitry is needed to stabilize
the device. The error amplifier provides an error signal to the
PWM comparator by comparing the feedback voltage
(800 mV) with internal voltage reference of 1.2 V.
Current mode converter can exhibit instability at duty
cycles over 50%. A slope compensation circuit is provided
inside NCP1595 to overcome the potential instability. Slope
compensation consists of a ramp signal generated by the
synchronization block and adding this to the inductor
current signal. The summed signal is then applied to the
PWM comparator.
Thermal Shutdown
Internal Thermal Shutdown circuitry is provided to
protect the integrated circuit in the event when maximum
junction temperature is exceeded. When activated, typically
at 160°C, the shutdown signal will disable the P−Channel
and N−Channel switch. The thermal shutdown circuit is
designed with 30°C of hysteresis. This means that the
switching will not start until the die temperature drops by
this amount. This feature is provided to prevent catastrophic
failures from accidental device overheating. It is not
intended as a substitute for proper heat sinking.
NCP1595 is contained in the thermally enhanced
DFN package.
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NCP1595, NCP1595A
APPLICATION INFORMATION
Output Voltage Selection
The output voltage is programmed through an external
resistor divider connect from V to FB then to GND.
For internal compensation and noise immunity, the
resistor from FB to GND should be in 10 k to 20 k ranges.
The relationship between the output voltage and feedback
resistor is given by:
ripple current, input voltage, output voltage, output current
and operation frequency, the inductor value is given by:
OUT
VOUT
VOUT
ǒ1 * Ǔ
VIN
(eq. 2)
DIL
+
L FSW
DIL : peak to peak inductor ripple current
L: inductor value
FSW: switching frequency
ǒ1 ) R1Ǔ
(eq. 1)
VOUT + VFB
After selected a suitable value of the inductor, it should be
check out the inductor saturation current. The saturation
current of the inductor should be higher than the maximum
load plus the ripple current.
R2
V
V
: Output voltage
: Feedback Voltage
OUT
FB
R1: Feedback resistor from V
to FB.
OUT
DIL
R2: Feedback resistor from FB to GND.
(eq. 3)
DIL(MAX) + DIOUT(MAX)
)
2
Input Capacitor selection
D
D
: Maximum inductor current
: Maximum output current
IL(MAX)
In the PWM buck converter, the input current is pulsating
current with switching noise. Therefore, a bypass input
capacitor must choose for reduce the peak current drawn
from the power supply. For NCP1595, low ESR ceramic
capacitor of 10 mF should be used for most of cases. Also,
the input capacitor should be placed as close as possible to
IOUT(MAX)
Output Capacitor selection
Output capacitor value is based on the target output ripple
voltage. For NCP1595, the output capacitor is required a
ceramic capacitors with low ESR value. Assume buck
converter duty cycle is 50%. The output ripple voltage in
PWM mode is given by:
the V
pin for effective bypass the supply noise.
CCA
Inductor selection
The inductor parameters are including three items, which
are DC resistance, inductor value and saturation current.
Inductor DC resistance will effect the convector overall
efficiency, low DC resistor value can provide a higher
efficiency. Thus, inductor value are depend on the inductor
1
ǒ
) ESRǓ(eq. 4)
DVOUT [ DIL
4 FSW COUT
In general, value of ceramic capacitor using 20 mF should
be a good choice.
ORDERING INFORMATION
†
Device
Package
Shipping
NCP1595MNR2G
DFN−6
(Pb−Free)
3000 / Tape & Reel
3000 / Tape & Reel
NCP1595AMNR2G
DFN−6
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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11
NCP1595, NCP1595A
PACKAGE DIMENSIONS
DFN6 3*3 MM, 0.95 PITCH
CASE 506AH−01
ISSUE O
NOTES:
A
D
1. DIMENSIONS AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMESNION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30
MM FROM TERMINAL.
B
E
PIN 1
REFERENCE
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
MILLIMETERS
DIM MIN
0.80
A1 0.00
NOM MAX
2X
A
0.90
0.03
1.00
0.05
0.15
C
A3
b
0.20 REF
0.40
2X
0.35
0.45
2.60
1.70
D
3.00 BSC
2.50
3.00 BSC
1.60
0.95 BSC
−−−
0.40
0.15
C
TOP VIEW
D2 2.40
E
E2 1.50
e
K
L
0.10
C
C
0.21
0.30
−−−
0.50
A
6X
SEATING
PLANE
0.08
(A3)
C
SOLDERING FOOTPRINT*
SIDE VIEW
D2
A1
0.450
0.0177
0.950
0.0374
6X L
4X
e
1
6
3
4
E2
6X K
1.700
0.0685
3.31
0.130
6X b
(NOTE 3)
0.10 C A B
0.05
C
2.60
BOTTOM VIEW
0.63
0.1023
SCALE 10:1
0.025
mm
inches
ǒ
Ǔ
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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