FSB50550BS [ONSEMI]
Motion SPM;
ONSEMI 
Is Now Part of
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February 2017
FSB50550B / FSB50550BS
Motion SPM® 5 Series
Features
Related Source
• UL Certified No. E209204 (UL1557)
• RD-FSB50450AS - Reference Design for Motion SPM
5 Series Ver.2
• Optimized for over 10 kHz Switching Frequency
• AN-9082 - Motion SPM5 Series Thermal Performance
by Contact Pressure
• 500 V FRFET MOSFET 3-Phase Inverter with Gate
Drivers and Protection
• Built-In Bootstrap Diodes Simplify PCB Layout
• Separate Open-Source Pins from Low-Side MOSFETs
for Three-Phase Current-Sensing
General Description
The FSB50550B / FSB50550BS is an advanced Motion
• Active-HIGH Interface, Works with 3.3 / 5 V Logic,
Schmitt-trigger Input
SPM®
5
module providing
performance inverter output stage for AC Induction,
BLDC and PMSM motors. These modules
a fully-featured, high-
• Optimized for Low Electromagnetic Interference
integrate optimized gate drive of the built-in MOSFETs
(FRFET® technology) to minimize EMI and losses, while
also providing multiple on-module protection features
including under-voltage lockouts and thermal monitoring.
The built-in high-speed HVIC requires only a single
supply voltage and translates the incoming logic-level
gate inputs to the high-voltage, high-current drive signals
required to properly drive the module's internal
MOSFETs. Separate open-source MOSFET terminals
are available for each phase to support the widest
variety of control algorithms.
• HVIC Temperature-Sensing Built-In for Temperature
Monitoring
• HVIC for Gate Driving and Under-Voltage Protection
• Isolation Rating: 1500 Vrms / min.
• RoHS Complia
• Moisture Sensitive Level (MSL) 3 for SMD PKG
Applications
• 3-Phase Inverter Driver for Small Power AC Motor
Drives
< FSB50550B >
<FSB50550BS >
Figure 1. 3D Package Drawing
(Click to Activate 3D Content)
Package Marking & Ordering Information
Device
Package
Packing Type
Reel Size
Quantity
Device Marking
FSB50550B
FSB50550B
SPM5P-023
SPM5Q-023
Rail
NA
15
FSB50550BS
FSB50550BS
Tape & Reel
330mm
450
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1
Absolute Maximum Ratings
Inverter Part (each MOSFET unless otherwise specified.)
Symbol
VDSS
Parameter
Conditions
Rating
500
Unit
V
Drain-Source Voltage of Each MOSFET
*ID 25
Each MOSFET Drain Current, Continuous TC = 25°C
Each MOSFET Drain Current, Continuous TC = 80°C
3.0
A
*ID 80
1.9
A
*IDP
Each MOSFET Drain Current, Peak
Each MOSFET Drain Current, Rms
TC = 25°C, PW < 100 μs
7.0
A
*IDRMS
TC = 80°C, FPWM < 20 kHz
1.3
Arms
Control Part (each HVIC unless otherwise specified.)
Symbol
VDD
Parameter
Conditions
Rating
Unit
Control Supply Voltage
Applied between VDD and COM
Applied between VB and VS
Applied between VIN and COM
20
20
V
V
V
VBS
High-side Bias Voltage
Input Signal Voltage
VIN
-0.3 ~ VDD + 0.3
Bootstrap Diode Part (each bootstrap diode unless otherwise specified.)
Symbol
Parameter
Conditions
Rating
Unit
VRRMB
Maximum Repetitive Reverse Voltage
V
A
A
500
0.5
* IFB
Forward Current
TC = 25°C
* IFPB
Forward Current (Peak)
TC = 25°C, Under 1ms Pulse Width
2.0
Thermal Resistance
Symbol
Parameter
Conditions
Rating
Unit
Junction to Case Thermal Resistance
( Note1 )
Inverter MOSFET part, (Per Module)
°C/W
Rth(j-c)Q
2.2
Total System
Symbol
Parameter
Conditions
Rating
-40 ~ 150
-40 ~ 125
Unit
°C
TJ
Operating Junction Temperature
Storage Temperature
TSTG
°C
60 Hz, Sinusoidal, 1 Minute, Con-
nect Pins to Heat Sink Plate
VISO
Isolation Voltage
1500
Vrms
Notes:
1. For the measurement point of case temperature T , please refer to Figure 4.
C
2. Marking “ * “ is calculation value or design factor.
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2
Pin descriptions
Pin Number
Pin Name
Pin Description
1
2
COM
VB(U)
VDD(U)
IN(UH)
IN(UL)
N.C
IC Common Supply Ground
Bias Voltage for U-Phase High-Side MOSFET Driving
Bias Voltage for U-Phase IC and Low-Side MOSFET Driving
Signal Input for U-Phase High-Side
3
4
5
Signal Input for U-Phase Low-Side
6
No Connection
7
VB(V)
VDD(V)
IN(VH)
IN(VL)
VTS
Bias Voltage for V-Phase High Side MOSFET Driving
Bias Voltage for V-Phase IC and Low Side MOSFET Driving
Signal Input for V-Phase High-Side
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Signal Input for V-Phase Low-Side
Output for HVIC Temperature Sensing
VB(W)
VDD(W)
IN(WH)
IN(WL)
N.C
Bias Voltage for W-Phase High-Side MOSFET Driving
Bias Voltage for W-Phase IC and Low-Side MOSFET Driving
Signal Input for W-Phase High-Side
Signal Input for W-Phase Low-Side
No Connection
P
Positive DC-Link Input
U, VS(U)
NU
Output for U-Phase & Bias Voltage Ground for High-Side MOSFET Driving
Negative DC-Link Input for U-Phase
NV
Negative DC-Link Input for V-Phase
V, VS(V)
NW
Output for V-Phase & Bias Voltage Ground for High-Side MOSFET Driving
Negative DC-Link Input for W-Phase
W, VS(W)
Output for W Phase & Bias Voltage Ground for High-Side MOSFET Driving
(1) COM
(2) VB(U)
(3) VDD(U)
(4) IN (UH)
(5) IN (UL)
(17) P
VDD
HIN
VB
HO
VS
LO
(18) U, VS(U)
LIN
COM
(6) N.C
(19) NU
(20) NV
(7) VB(V)
(8) VDD(V)
(9) IN (VH)
(10) IN (VL)
VDD
HIN
LIN
VB
HO
VS
LO
(21) V, VS(V)
COM
VTS
(11) VTS
(12) V B(W)
(13) VDD(W)
(14) IN (WH)
(15) IN (WL)
VDD
HIN
VB
HO
VS
LO
(22) NW
(23) W, VS(W)
LIN
COM
(16)
N.C
Figure 2. Pin Configuration and Internal Block Diagram (Bottom View)
Notes:
®
3. Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside Motion SPM 5 product. External connections should be made as
indicated in Figure 3.
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3
Electrical Characteristics (TJ = 25°C, VDD = VBS = 15 V unless otherwise specified.)
Inverter Part (each MOSFET unless otherwise specified.)
Symbol
Parameter
Conditions
Min Typ Max Unit
Drain - Source
Breakdown Voltage
BVDSS
V
V
V
V
IN = 0 V, ID = 1 mA ( Note 4)
500
-
-
-
V
mA
Ω
Zero Gate Voltage
Drain Current
IDSS
RDS(on)
VSD
IN = 0 V, VDS = 500 V
-
-
-
1
Static Drain - Source
Turn-On Resistance
DD = VBS = 15 V, VIN = 5 V, ID = 1.0 A
DD = VBS = 15V, VIN = 0 V, ID = -1.0 A
2.3
-
3.0
1.3
Drain - Source Diode
Forward Voltage
V
tON
tOFF
trr
-
-
-
-
-
350
500
60
22
3
-
-
-
-
-
ns
ns
ns
μJ
μJ
VPN = 300 V, VDD = VBS = 15 V, ID = 1.0 A
IN = 0 V ↔ 5 V, Inductive Load L = 3 mH
High- and Low-Side MOSFET Switching
( Note 5)
V
Switching Times
EON
EOFF
VPN = 400 V, VDD = VBS = 15 V, ID = (TBD), VDS
BVDSS, TJ = 150°C
High- and Low-Side MOSFET Switching ( Note 6)
=
Reverse Bias Safe Oper-
ating Area
RBSOA
Full Square
Control Part (each HVIC unless otherwise specified.)
Symbol
Parameter
Conditions
Min Typ Max Unit
V
V
DD = 15 V,
IN = 0 V
IQDD
Quiescent VDD Current
Applied between VDD and COM
-
-
-
-
200
100
μA
μA
V
V
BS = 15 V,
IN = 0 V
Applied between VB(U) - U,
IQBS
Quiescent VBS Current
V
B(V) - V, VB(W) - W
VDD = 15 V, fPWM = 20 kHz, duty
= 50%, Applied to One PWM Sig-
nal Input for Low-Side
Operating VDD Supply
Current
900
800
IPDD
V
DD - COM
-
-
-
-
μA
μA
V
-
VS(W)
B(U) - VS(U), VB(V) VDD = VBS = 15 V, fPWM = 20 kHz,
Operating VBS Supply
Current
IPBS
VS(V)
,
VB(W) - Duty = 50%, Applied to One PWM
Signal Input for High-Side
UVDDD
UVDDR
UVBSD
UVBSR
V
DD Under-Voltage Protection Detection Level
VDD Under-Voltage Protection Reset Level
BS Under-Voltage Protection Detection Level
VBS Under-Voltage Protection Reset Level
7.4
8.0
7.4
8.0
8.0
8.9
8.0
8.9
9.4
9.8
9.4
9.8
V
V
V
V
Low-Side Under-Voltage
Protection (Figure 8)
V
High-Side Under-Voltage
Protection (Figure 9)
HVIC Temperature Sens-
ing Voltage Output
VTS
mV
V
DD = 15 V, THVIC = 25°C ( Note 7)
600
790
980
VIH
VIL
ON Threshold Voltage
OFF Threshold Voltage
Logic HIGH Level
Logic LOW Level
-
-
-
2.9
-
V
V
Applied between VIN and COM
0.8
Bootstrap Diode Part (each bootstrap diode unless otherwise specified.)
Symbol
VFB
Parameter
Conditions
Min Typ Max Unit
Forward Voltage
Reverse Recovery Time
IF = 0.1 A, TC = 25°C (Note 8)
IF = 0.1 A, TC = 25°C
-
-
2.5
80
-
-
V
trrB
ns
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4
Recommended Operating Condition
Symbol
VPN
Parameter
Conditions
Min.
-
Typ. Max.
Unit
Supply Voltage
Applied between P and N
300
15.0
15.0
-
400
16.5
16.5
VDD
0.6
V
V
V
V
V
VDD
Control Supply Voltage
High-Side Bias Voltage
Applied between VDD and COM
Applied between VB and VS
13.5
13.5
3.0
0
VBS
VIN(ON) Input ON Threshold Voltage
VIN(OFF) Input OFF Threshold Voltage
Applied between VIN and COM
-
Blanking Time for Preventing
Arm-Short
tdead
V
DD = VBS = 13.5 ~ 16.5 V, TJ ≤ 150°C
1.0
-
-
-
-
μs
fPWM
PWM Switching Frequency
TJ ≤ 150°C
15
kHz
Built-In Bootstrap Diode VF-IF Characteristic
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
VF [V]
TC = 25°C
Figure 3. Built-In Bootstrap Diode Characteristics (Typical)
Notes:
4. BV
®
is the absolute maximum voltage rating between drain and source terminal of each MOSFET inside Motion SPM 5 product. V should be sufficiently less than this
DSS
PN
value considering the effect of the stray inductance so that V should not exceed BV
in any case.
PN
DSS
5. t and t
include the propagation delay of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the field
OFF
ON
applications due to the effect of different printed circuit boards and wirings. Please see Figure 6 for the switching time definition with the switching test circuit of Figure 7.
6. The peak current and voltage of each MOSFET during the switching operation should be included in the Safe Operating Area (SOA). Please see Figure 7 for the RBSOA test
circuit that is same as the switching test circuit.
7. V is only for sensing-temperature of module and cannot shutdown MOSFETs automatically.
ts
8. Built-in bootstrap diode includes around 15 Ωresistance characteristic. Please refer to Figure 2.
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5
These values depend on PWM control algorithm
* Example Circuit : V phase
C
1
+15 V
VDC
P
V
HIN
0
LIN
0
Output
Note
VDD
HIN
LIN
VB
HO
VS
LO
Inverter
Output
Z
Both FRFET Off
Low side FRFET On
High side FRFET On
Shoot through
R
5
0
1
0
VDC
1
0
C3
C5
COM
VTS
1
1
Forbidden
Z
R
3
N
Open Open
Same as (0,0)
C4
One Leg Diagram of Motion SPM® 5 Product
C2
10 μF
*
Example of Bootstrap Param: ters
C = C2 = 1 μF Ceramic Capacitor
1
Figure 4. Recommended MCU Interface and Bootstrap Circuit with Parameters
Notes:
9. Parameters for bootstrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above.
10.RC-coupling (R and C ) and C at each input of Motion SPM 5 product and MCU (Indicated as Dotted Lines) may be used to prevent improper signal due to surge-noise.
5
5
4
11. Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge-voltage. Bypass capacitors such as C , C
1
2
and C should have good high-frequency characteristics to absorb high-frequency ripple-current.
3
Figure 5. Case Temperature Measurement
Notes:
12. Attach the thermocouple on top of the heat-sink of SPM 5 package (between SPM 5 package and heatsink if applied) to get the correct temperature measurement.
3.5
3.0
2.5
2.0
1.5
1.0
0.5
20
40
60
80
100
120
140
160
THVIC [oC]
Figure 6. Temperature Profile of V (Typical)
TS
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6
VIN
VIN
Irr
120% of ID
100% of ID
VDS
ID
10% of ID
ID
VDS
tON
trr
tOFF
(a) Turn-on
(b) Turn-off
Figure 7. Switching Time Definitions
CBS
VDD
ID
VDD
HIN
LIN
VB
HO
VS
LO
L
VDC
+
VDS
-
COM
VTS
One Leg Diagram of Motion SPM® 5 Product
Figure 8. Switching and RBSOA (Single-Pulse) Test Circuit (Low-side)
Input Signal
UV Protection
RESET
SET
RESET
Status
UVDDR
Low- side Supply, VDD
UVDDD
MOSFET Current
Figure 9. Under-Voltage Protection (Low-Side)
Input Signal
UV Protection
Status
RESET
SET
RESET
UVBSR
High- side Supply, VBS
UVBSD
MOSFET Current
Figure 10. Under-Voltage Protection (High-Side)
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7
C1
(1) COM
(2)VB(U)
(17)P
(3)VDD(U)
VDD
HIN
VB
HO
VS
LO
R5
(4)IN
(UH)
(18)U,VS(U)
(5)IN
(UL)
VDC
C3
LIN
C5
C2
COM
(6)N.C
(7)VB(V)
(8)VDD(V)
(19)NU
(20)NV
VDD
HIN
LIN
VB
HO
VS
LO
(9)IN
(VH)
(21)V,VS(V)
(10) IN
(VL)
M
COM
VTS
(11)VTS
(12)VB(W)
(13)VDD(W)
(22)NW
VDD
HIN
VB
HO
VS
LO
(14) IN
(WH)
(23)W,VS(W)
(15) IN
(WL)
LIN
COM
(16)N.C
C4
R4
For current-sensing and protection
15 V
Supply
C6
R3
Figure 11. Example of Application Circuit
Notes:
13. About pin position, refer to Figure 1.
®
14. RC-coupling (R and C , R and C ) and C at each input of Motion SPM 5 product and MCU are useful to prevent improper input signal caused by surge-noise.
5
5
4
6
4
15. The voltage-drop across R affects the low-side switching performance and the bootstrap characteristics since it is placed between COM and the source terminal of the low-
3
side MOSFET. For this reason, the voltage-drop across R should be less than 1 V in the steady-state.
3
16. Ground-wires and output terminals, should be thick and short in order to avoid surge-voltage and malfunction of HVIC.
17. All the filter capacitors should be connected close to Motion SPM 5 product, and they should have good characteristics for rejecting high-frequency ripple current.
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8
Detailed Package Outline Drawings ( FSB50550B )
Max 1.00
0.50?0.10 16X
(0.20) 13X
(1.165)
(1.165)
?0.30
15X1.778=26.67
(1.80)
(1.00)
?0.30
13.34
?0.30
13.34
1
16
17
(2.275)
23
(1.375)
3. 15?0.20
?0.30
?0.30
13.13
12.23
(6.05)
29.00?0.20
1.95?0.30
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE DOES NOT COMPLY
TO ANY CURRENT PACKAGING STANDARD
B) ALL DIMENSIONS ARE IN MILLIMETERS
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D) ( ) IS REFERENCE
?0.30
3.90
?0.30
2.48
?0.30
2X
17
3.90
4X
19
23
E) [ ] IS ASS'Y QUALITY
(0. 30)
F) DRAWING FILENAME: MOD23DCREV4.0
G) FAIRCHILD SEMICONDUCTOR
?0 .10
?0.10
0.60
5X
0.50
2X
PIN19,20
Max 1.00
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9
Detailed Package Outline Drawings ( FSB50550BS )
Max 1.00
?0.10
0. 60
16X
(1.165)
(1.165)
?0.30
15X1.778=26.67
(1.80)
(1.00)
?0.30
13.34
?0.30
13. 34
1
16
(2.50)
GAGE PL ANE
?0.20
1.50
SEATING PLANE
17
(2.275)
23
(1.375)
(1.30)
12.23?0.30
13.13?0.30
3.15?0.20
?0.20
29.00
1.778 15X
0.889
1.95?0.30
1
16
?0.30
3.90
?0 .30
2.48
?0.30
3.90 4X
2X
17
1.3
19
23
0.60?0.10 5X
Max 1.00
0.50?0.10 2X
PIN19,20
3.90 2X
3.90 4X
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE DOES NOT COMPLY
17
23
TO ANY CURRENT PACKAGING STANDARD
B) ALL DIMENSIONS ARE IN MILLIMETERS
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, ANDTIE BAR EXTRUSIONS
D) ( ) IS REFERENCE
1.95
2. 475
LAND PATTERN RECOMMENDATIONS
E) DRAWING FILENAME: MOD23DGREV6.0
F) FAIRCHILD SEMICONDUCTOR
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10
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