FDMS8095AC [ONSEMI]
双 N 和 P 沟道，PowerTrench® MOSFET，150V;
| 型号： | FDMS8095AC |
| 厂家： | 
ONSEMI |
| 描述： | 双 N 和 P 沟道，PowerTrench® MOSFET，150V |
| 文件： | 总12页 (文件大小：506K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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August 2015
FDMS8095AC
Dual N & P-Channel PowerTrench® MOSFET
N-Channel: 150 V, 27 A, 30 mΩ P-Channel: -150 V, -2.2 A, 1200 mΩ
Features
General Description
These dual N and P-Channel enhancement mode Power
MOSFETs are produced using Fairchild Semiconductor’s
advanced PowerTrench® process that has been especially
tailored to minimize on-state resistance and yet maintain
superior switching performance. Shrinking the area needed for
implementation of active clamp topology; enabling best in class
power density.
Q1: N-Channel
Max rDS(on) = 30 mΩ at VGS = 10 V, ID = 6.2 A
Max rDS(on) = 41 mΩ at VGS = 6 V, ID = 5.2 A
Q2: P-Channel
Max rDS(on) = 1200 mΩ at VGS = -10 V, ID = -1 A
Applications
Max rDS(on) = 1400 mΩ at VGS = -6 V, ID = -0.9 A
Optimised for active clamp forward converters
RoHS Compliant
DC-DC Converter
Active Clamp
Bottom
Top
S2 S2 S2 G2
G2
S2
S2
G1
S1
Contact to D1 Contact to D2
(backside)
(backside)
1
2
3
4
8
7
6
5
D2
D1
Pin 1
S1
S1
Q1
Q2
S2
S1 S1 S1 G1
Pin 1
Power 56
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Q1
150
±20
27
Q2
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
Drain Current -Continuous
-Continuous
-150
±25
V
V
TC = 25 °C
TC = 100 °C
TA = 25 °C
(Note 5)
(Note 5)
-2.2
-1.4
-1 1b
-8.8
6
2.3 1b
0.9 1d
12.5
17
ID
A
6.2 1a
143
216
2.3 1a
0.9 1c
50
-Pulsed
(Note 4)
(Note 3)
EAS
Single Pulse Avalanche Energy
mJ
W
Power Dissipation for Single Operation
Power Dissipation for Single Operation
Power Dissipation for Single Operation
TA = 25 °C
TA = 25 °C
TC = 25 °C
PD
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJA
RθJA
RθJC
Thermal Resistance, Junction to Ambient
55 1a
138 1c
55 1b
138 1d
10
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
°C/W
2.5
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13”
Tape Width
Quantity
FDMS8095AC
FDMS8095AC
Power 56
12 mm
3000 units
©2015 Fairchild Semiconductor Corporation
FDMS8095AC Rev.1.0
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max Units
Off Characteristics
I
I
D = 250 μA, VGS = 0 V
D = -250 μA, VGS = 0 V
Q1
Q2
150
-150
BVDSS
Drain to Source Breakdown Voltage
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
D = -250 μA, referenced to 25 °C
Q1
Q2
103
122
mV/°C
I
V
V
DS = 120 V, VGS = 0 V
DS = -120 V, VGS = 0 V
Q1
Q2
1
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
μA
-1
V
V
GS = ±20 V, VDS = 0 V
GS = ±25 V, VDS = 0 V
Q1
Q2
±100
±100
nA
nA
On Characteristics
V
V
GS = VDS, ID = 250 μA
GS = VDS, ID = -250 μA
Q1
Q2
2.0
-2.0
3.2
-3.2
4.0
-4.0
VGS(th)
Gate to Source Threshold Voltage
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
D = -250 μA, referenced to 25 °C
VGS = 10 V, ID = 6.2 A
Q1
Q2
-11
-6
mV/°C
I
25
33
48
30
41
58
V
V
GS = 6 V, ID = 5.2 A
GS = 10 V, ID = 6.2 A, TJ = 125 °C
Q1
Q2
rDS(on)
Static Drain to Source On Resistance
mΩ
V
V
V
GS = -10 V, ID = -1 A
GS = -6 V, ID = -0.9 A
GS = -10 V, ID = -1 A, TJ = 125 °C
840
940
1520 2171
1200
1400
V
V
DD = 10 V, ID = 6.2 A
DD = -10 V, ID = -1 A
Q1
Q2
19
0.75
gFS
Forward Transconductance
S
Dynamic Characteristics
Q1
Q2
1441 2020
Q1
Ciss
Coss
Crss
Rg
Input Capacitance
pF
pF
pF
Ω
162
230
VDS = 75 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
127
13
180
25
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Q2
VDS = -75 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
4.4
0.6
10
5
Q1
Q2
0.1
0.1
1.3
3.3
3.3
8.3
Switching Characteristics
Q1
Q2
12
5.2
22
11
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
ns
ns
Q1
V
V
DD = 75 V, ID = 6.2 A,
GS = 10 V, RGEN = 6 Ω
Q1
Q2
2.7
1.6
10
10
Q1
Q2
18
7.4
33
15
Q2
Turn-Off Delay Time
Fall Time
ns
VDD = -75 V, ID = -1 A,
Q1
Q2
4
6.3
10
13
V
GS = -10 V, RGEN = 6 Ω
ns
V
V
GS = 0 V to 10 V
GS = 0 V to -10 V
Q1
Q2
21
2.8
30
4
Qg(TOT)
Qg(TOT)
Qgs
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
nC
nC
nC
nC
Q1
V
DD = 75 V,
V
V
GS = 0 V to 6 V
GS = 0 V to -6 V
Q1
Q2
13
1.8
19
2.6
I
D = 6.2 A
Q1
Q2
6.7
0.8
Q2
V
DD = -75 V
Q1
Q2
3.9
0.7
I
D = -1 A
Qgd
©2015 Fairchild Semiconductor Corporation
FDMS8095AC Rev.1.0
2
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max Units
Drain-Source Diode Characteristics
V
V
GS = 0 V, IS = 6.2 A
GS = 0 V, IS = -1 A
(Note 2) Q1
(Note 2) Q2
0.8
-0.9
1.3
V
VSD
trr
Source-Drain Diode Forward Voltage
Reverse Recovery Time
-1.3
Q1
Q2
69
44
111
ns
Q1
71
IF = 6.2 A, di/dt = 100 A/s
Q2
IF = -1 A, di/dt = 100 A/s
Q1
Q2
106
68
170
nC
Qrr
Reverse Recovery Charge
109
Notes:
2
1. R
is determined with the device mounted on a 1in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is determined by the user's board design.
b.55 °C/W when mounted on
θJA
θCA
a.55 °C/W when mounted on
a 1 in pad of 2 oz copper
2
2
a 1 in pad of 2 oz copper
c. 138 °C/W when mounted on a
minimum pad of 2 oz copper
d. 138 °C/W when mounted on a
minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
o
3. Q1: E of 216 mJ is based on starting T = 25 C, L = 3 mH, I = 12 A, V = 150 V, V = 10 V. 100% test at L = 0.3 mH, I = 28 A.
AS
J
AS
DD
GS
AS
o
Q2: E of 6 mJ is based on starting T = 25 C, L = 3 mH, I = -2 A, V = -150 V, V = -10 V. 100% test at L = 0.3 mH, I = -6.9 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Fig 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
©2015 Fairchild Semiconductor Corporation
FDMS8095AC Rev.1.0
3
www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
100
80
60
40
20
0
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
VGS = 10 V
VGS = 5.5 V
VGS = 8 V
VGS = 7 V
VGS = 6 V
VGS = 6 V
VGS = 7 V
VGS = 5.5 V
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 8 V
0
1
2
3
4
5
0
20
40
60
80
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
2.5
150
ID = 6.2 A
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
2.0
1.5
1.0
0.5
ID = 6.2 A
100
50
0
TJ = 125 o
C
TJ = 25 o
C
-75 -50 -25
0
25 50 75 100 125 150
4
5
6
7
8
9
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
100
200
100
PULSE DURATION = 80 μs
VGS = 0 V
DUTY CYCLE = 0.5% MAX
80
60
40
20
0
10
VDS = 5 V
TJ = 150 o
C
1
TJ = 25 o
C
TJ = 150 o
C
0.1
TJ = 25 o
C
TJ = -55 o
C
0.01
TJ = -55 o
C
0.001
2
3
4
5
6
7
8
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
©2015 Fairchild Semiconductor Corporation
FDMS8095AC Rev.1.0
4
www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
10
8
10000
1000
100
10
ID = 6.2 A
Ciss
VDD = 50 V
VDD = 75 V
VDD = 100 V
Coss
6
4
Crss
2
f = 1 MHz
GS = 0 V
V
0
1
0.1
0
5
10
15
20
25
1
10
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
30
24
18
12
6
100
10
1
VGS = 10 V
TJ = 25 o
C
TJ = 100 o
C
VGS = 6 V
TJ = 125 o
C
RθJC = 2.5 oC/W
0
25
0.001
0.01
0.1
1
10
100
50
75
100
125
150
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Case Temperature
300
20000
10000
1000
100
SINGLE PULSE
RθJC = 2.5 oC/W
100
10 μs
T
C = 25 oC
10
100 μs
THIS AREA IS
LIMITED BY rDS(on)
1
1 ms
SINGLE PULSE
TJ = MAX RATED
0.1
0.01
10 ms
DC
R
θJC = 2.5 oC/W
C = 25 oC
CURVE BENT TO
MEASURED DATA
T
10
10-5
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
1
0.1
1
10
100
1000
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum Power
Dissipation
©2015 Fairchild Semiconductor Corporation
FDMS8095AC Rev.1.0
5
www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
P
0.05
0.02
0.01
DM
0.1
t
1
t
2
NOTES:
(t) = r(t) x R
0.01
0.001
SINGLE PULSE
Z
θJC
θJC
o
R
= 2.5 C/W
θJC
Peak T = P
x Z (t) + T
J
DM
θJC C
Duty Cycle, D = t / t
1
2
10-5
10-4
10-3
10-2
10-1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Case Transient Thermal Response Curve
©2015 Fairchild Semiconductor Corporation
FDMS8095AC Rev.1.0
6
www.fairchildsemi.com
Typical Characteristics (Q2 P-Channel) TJ = 25 °C unless otherwise noted
4
1.8
VGS = -10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = -5 V
VGS = -7 V
1.6
3
VGS = -6 V
VGS = -5.5 V
VGS = -5.5 V
VGS = -5 V
1.4
1.2
1.0
0.8
2
1
0
VGS = -10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = -7 V
VGS = -6 V
0
1
2
3
4
5
0
1
2
3
4
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-ID, DRAIN CURRENT (A)
Figure 14. On- Region Characteristics
Figure 15. Normalized on-Resistance vs Drain
Current and Gate Voltage
3000
2.2
2.0
ID = -1 A
GS = -10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
V
2500
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
ID = -1 A
2000
TJ = 125 o
C
1500
1000
TJ = 25 o
C
4
5
6
7
8
9
10
-75 -50 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 17. On-Resistance vs Gate to
Source Voltage
Figure 16. Normalized On-Resistance
vs Junction Temperature
4
5
VGS = 0 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
1
0.1
3
VDS = -5 V
TJ = 150 o
C
TJ = 25 o
C
2
TJ = 150 o
C
TJ = 25 o
C
0.01
1
0
TJ = -55 o
C
TJ = -55 o
C
0.001
2
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
-VGS, GATE TO SOURCE VOLTAGE (V)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 18. Transfer Characteristics
Figure 19. Source to Drain Diode
Forward Voltage vs Source Current
©2015 Fairchild Semiconductor Corporation
FDMS8095AC Rev.1.0
7
www.fairchildsemi.com
Typical Characteristics (Q2 P-Channel) TJ = 25°C unless otherwise noted
1000
100
10
10
8
ID = -1 A
Ciss
VDD = -75 V
VDD = -50 V
Coss
6
VDD = -100 V
4
Crss
1
f = 1 MHz
VGS = 0 V
2
0.1
0.1
0
0.0
1
10
100
0.5
1.0
1.5
2.0
2.5
3.0
3.5
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 21. Capacitance vs Drain
to Source Voltage
Figure 20. Gate Charge Characteristics
2.5
2.0
1.5
1.0
0.5
0.0
20
10
VGS = -10 V
VGS = -6 V
TJ = 25 o
C
TJ = 100 o
C
TJ = 125 o
C
RθJC = 10 oC/W
1
0.001
0.01
0.1
1
25
50
75
100
125
150
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure 22. Unclamped Inductive
Switching Capability
F ig ure 23 . Ma ximum C on tin uo us D rain
Current vs Case Temperature
20
10
300
SINGLE PULSE
RθJC = 10 oC/W
C = 25 oC
T
100
1
0.1
100 μs
THIS AREA IS
LIMITED BY rDS(on)
1 ms
SINGLE PULSE
TJ = MAX RATED
RθJC = 10 oC/W
10 ms
DC
CURVE BENT TO
MEASURED DATA
T
C = 25 oC
0.01
10
10-4
10-3
10-2
10-1
1
1
10
100
600
-VDS, DRAIN to SOURCE VOLTAGE (V)
t, PULSE WIDTH (sec)
Figure 24. Forward Bias Safe
Operating Area
Figure 25. Single Pulse Maximum Power
Dissipation
©2015 Fairchild Semiconductor Corporation
FDMS8095AC Rev.1.0
8
www.fairchildsemi.com
Typical Characteristics (Q2 P-Channel) TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
P
0.05
0.02
0.01
DM
t
1
0.1
t
2
NOTES:
(t) = r(t) x R
SINGLE PULSE
Z
θJC
θJC
o
R
= 10 C/W
θJC
Peak T = P
x Z (t) + T
J
DM
θJC C
Duty Cycle, D = t / t
1
2
0.01
10-4
10-3
10-2
10-1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 26. Junction-to-Case Transient Thermal Response Curve
©2015 Fairchild Semiconductor Corporation
FDMS8095AC Rev.1.0
9
www.fairchildsemi.com
4.41 (2X)
4.10 (2X)
0.67 (6X)
0.10 C
5.00
A
B
2X
8
7
5
6
0.50
1.75(2X)
1.15 2X
6.00
2.26
PIN#1
IDENT
6.30
0.50 (2X)
0.65(8X)
0.60(8X)
0.10 C
2
1
3
4
TOP VIEW
SIDE VIEW
2X
1.27
8X
0.635
0.80 MAX
0.10 C
0.08 C
RECOMMENDED LAND PATTERN
(0.20)
0.05
0.00
C
NOTES:
SEATING
PLANE
A. DOES NOT FULLY CONFORM TO JEDEC
REGISTRATION, MO-229.
0.635
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
1.27
8X
(0.77) 6X
0.25
(0.35)4X
3
2
1
4
PIN#1
IDENT
(4X)
0.15
E. DRAWING FILENAME: MKT-MLP08Zrev1.
1.80
(2)X
1.70
1.125
2X
0.55
0.45
(8X)
(0.50)3X
6
5
7
8
0.55
8X
(3.04) 2X
0.45
4.15
(2X)
4.05
0.10
0.05
C A B
C
BOTTOM VIEW
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FAIRCHILD
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