FDMC8360LET40 [ONSEMI]

N 沟道屏蔽门极 Power Trench® MOSFET 40V,141A,2.1mΩ;
FDMC8360LET40
型号: FDMC8360LET40
厂家: ONSEMI    ONSEMI
描述:

N 沟道屏蔽门极 Power Trench® MOSFET 40V,141A,2.1mΩ

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September 2015  
FDMC8360LET40  
N-Channel Shielded Gate Power Trench® MOSFET  
40 V, 141 A, 2.1 mΩ  
Features  
General Description  
„ Shielded Gate MOSFET Technology  
„ Max rDS(on) = 2.1 mΩ at VGS = 10 V, ID = 27 A  
„ Max rDS(on) = 3.1 mΩ at VGS = 4.5 V, ID = 22 A  
„ High Performance Technology for Extremely Low rDS(on)  
„ Termination is Lead-free  
This N-Channel MOSFET is produced using Fairchild  
Semiconductor’s  
advanced PowerTrench® process that  
incorporates shielded gate technology. This process has been  
optimized for the on-state resistance and yet maintain superior  
switching performance.  
Application  
„ 100% UIL Tested  
„ DC-DC Conversion  
„ RoHS Compliant  
Pin 1  
Pin 1  
S
S
S
S
D
D
S
G
S
D
D
D
D
D
D
G
Top  
Bottom  
Power33  
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted.  
Symbol  
VDS  
VGS  
Parameter  
Ratings  
40  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
V
V
±20  
Drain Current  
-Continuous  
TC = 25 °C  
TC = 100 °C  
TA = 25 °C  
(Note 5)  
(Note 5)  
(Note 1a)  
(Note 4)  
(Note 3)  
141  
-Continuous  
-Continuous  
-Pulsed  
100  
ID  
A
27  
658  
EAS  
Single Pulse Avalanche Energy  
Power Dissipation  
253  
mJ  
W
TC = 25 °C  
TA = 25 °C  
75  
PD  
Power Dissipation  
(Note 1a)  
2.8  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
-55 to +175  
°C  
Thermal Characteristics  
RθJC  
RθJA  
Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to Ambient  
(Note 1)  
2.0  
53  
°C/W  
(Note 1a)  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
13 ’’  
Tape Width  
12 mm  
Quantity  
FDMC8360LET  
FDMC8360LET40  
Power33  
3000 units  
©2015 Fairchild Semiconductor Corporation  
FDMC8360LET40 Rev.1.0  
www.fairchildsemi.com  
1
Electrical Characteristics TJ = 25 °C unless otherwise noted.  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Units  
Off Characteristics  
BVDSS  
Drain to Source Breakdown Voltage  
ID = 250 μA, VGS = 0 V  
40  
V
ΔBVDSS  
ΔTJ  
Breakdown Voltage Temperature  
Coefficient  
I
D = 250 μA, referenced to 25 °C  
20  
mV/°C  
IDSS  
IGSS  
Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
VDS = 32 V, VGS = 0 V  
VGS = ±20 V, VDS = 0 V  
1
μA  
±100  
nA  
On Characteristics  
VGS(th)  
Gate to Source Threshold Voltage  
VGS = VDS, ID = 250 μA  
1.0  
1.7  
-6  
3.0  
V
ΔVGS(th)  
ΔTJ  
Gate to Source Threshold Voltage  
Temperature Coefficient  
I
D = 250 μA, referenced to 25 °C  
GS = 10 V, ID = 27 A  
mV/°C  
V
1.4  
2.1  
2.3  
138  
2.1  
3.1  
3.5  
rDS(on)  
gFS  
Static Drain to Source On Resistance  
Forward Transconductance  
VGS = 4.5 V, ID = 22 A  
mΩ  
VGS = 10 V, ID = 27 A, TJ = 150 °C  
VDD = 5 V, ID = 27 A  
S
Dynamic Characteristics  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
3785  
1220  
57  
5300  
1710  
80  
pF  
pF  
pF  
Ω
VDS = 20 V, VGS = 0 V,  
f = 1 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
0.1  
0.8  
1.6  
Switching Characteristics  
td(on)  
tr  
td(off)  
tf  
Turn-On Delay Time  
Rise Time  
14  
8
26  
16  
57  
14  
80  
38  
ns  
ns  
VDD = 20 V, ID = 27 A,  
V
GS = 10 V, RGEN = 6 Ω  
Turn-Off Delay Time  
Fall Time  
35  
7
ns  
ns  
Qg(TOT)  
Qg(TOT)  
Qgs  
Total Gate Charge  
Total Gate Charge  
Gate to Source Charge  
Gate to Drain “Miller” Charge  
VGS = 0 V to 10 V  
VGS = 0 V to 4.5 V  
57  
27  
9.9  
8.1  
nC  
nC  
nC  
nC  
VDD = 20 V,  
D = 27 A  
I
Qgd  
Drain-Source Diode Characteristics  
V
GS = 0 V, IS = 27 A  
(Note 2)  
(Note 2)  
0.8  
0.7  
47  
1.3  
1.2  
76  
V
V
VSD  
Source to Drain Diode Forward Voltage  
VGS = 0 V, IS = 1.9 A  
trr  
Reverse Recovery Time  
ns  
nC  
IF = 27 A, di/dt = 100 A/μs  
Qrr  
Reverse Recovery Charge  
30  
48  
Notes:  
2
1. R  
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R  
is guaranteed by design while R  
is determined by  
θJA  
θJC  
θCA  
the user's board design.  
b) 125°C/W when mounted on a  
minimum pad  
a)  
53°C/W when mounted on a  
1 in pad of 2 oz copper  
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.  
3. E of 253 mJ is based on starting T = 25 °C, L = 3 mH, I = 13 A, V = 40 V, V = 10 V. 100% test at L = 0.1 mH, I = 42 A.  
AS  
J
AS  
DD  
GS  
AS  
4. Pulsed Id please refer to Fig 11 SOA graph for more details.  
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.  
©2015 Fairchild Semiconductor Corporation  
FDMC8360LET40 Rev.1.0  
www.fairchildsemi.com  
2
Typical Characteristics TJ = 25°C unless otherwise noted.  
300  
10  
8
VGS = 10 V  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
VGS = 3 V  
VGS = 4 V  
225  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
VGS = 3.5 V  
6
VGS = 4.5 V  
150  
VGS = 4 V  
VGS = 3.5 V  
4
75  
2
VGS = 3 V  
VGS = 4.5 V  
120  
VGS = 10 V  
0
0
0
1
2
3
0
60  
180  
240  
300  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
ID, DRAIN CURRENT (A)  
Figure 1. On Region Characteristics  
Figure2. N o r m a l i z e d O n - R e s i s ta n c e  
vs. Drain Current and Gate Voltage  
1.9  
20  
PULSE DURATION = 80 μs  
ID = 27 A  
1.8  
1.7  
1.6  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
DUTY CYCLE = 0.5% MAX  
VGS = 10 V  
ID = 27 A  
15  
10  
5
TJ = 25 o  
C
TJ = 150 o  
C
0
-75 -50 -25  
0
25 50 75 100 125 150 175  
2
4
6
8
10  
TJ, JUNCTION TEMPERATURE (oC)  
VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. Normalized On Resistance  
vs. Junction Temperature  
Figure4. On-Resistance vs. Gate to  
Source Voltage  
300  
300  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
100  
VGS = 0 V  
240  
180  
120  
60  
VDS = 5 V  
10  
TJ = 175 o  
C
1
TJ = 25 oC  
TJ = 175 o  
C
0.1  
TJ = 25 o  
C
TJ = -55 o  
C
0.01  
TJ = -55 o  
C
0
0.001  
1
2
3
4
5
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
VGS, GATE TO SOURCE VOLTAGE (V)  
VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics  
Figure6. Source to Drain Diode  
Forward Voltage vs. Source Current  
©2015 Fairchild Semiconductor Corporation  
FDMC8360LET40 Rev.1.0  
www.fairchildsemi.com  
3
Typical Characteristics TJ = 25°C unless otherwise noted.  
10  
10000  
1000  
100  
Ciss  
ID = 27 A  
8
VDD = 15 V  
VDD = 20 V  
Coss  
6
VDD = 25 V  
4
Crss  
2
0
f = 1 MHz  
GS = 0 V  
V
10  
0.1  
0
12  
24  
36  
48  
60  
1
10  
40  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Qg, GATE CHARGE (nC)  
Figure 7. Gate Charge Characteristics  
Figure8. C a p a c i t a n c e v s . D r a i n  
to Source Voltage  
150  
120  
90  
60  
30  
0
100  
TJ = 25 oC  
TJ = 125 o  
VGS = 10 V  
C
10  
TJ = 150 o  
C
VGS = 6 V  
RθJC = 2.0 oC/W  
1
0.001  
0.01  
0.1  
1
10  
100 500  
25  
50  
75  
100  
125  
150  
175  
TC, CASE TEMPERATURE (oC)  
tAV, TIME IN AVALANCHE (ms)  
Figure9. U n c l a m p e d I n d u c t i v e  
Switching Capability  
Figure10. Maximum Continuous Drain  
Current vs. Case Temperature  
1000  
100  
10  
100000  
SINGLE PULSE  
RθJC = 2.0 oC/W  
10 us  
T
C = 25 oC  
10000  
1000  
100  
THIS AREA IS  
LIMITED BY rDS(on)  
100 us  
1 ms  
SINGLE PULSE  
TJ = MAX RATED  
RθJC = 2.0 oC/W  
1
10 ms  
100 ms/DC  
CURVE BENT TO  
MEASURED DATA  
T
C = 25 oC  
0.1  
0.1  
10  
10-5  
10-4  
10-3  
t, PULSE WIDTH (sec)  
10-2  
10-1  
1
1
10  
100 200  
VDS, DRAIN to SOURCE VOLTAGE (V)  
Figure 11. Forward Bias Safe  
Operating Area  
Figure12. Single Pulse Maximum  
Power Dissipation  
©2015 Fairchild Semiconductor Corporation  
FDMC8360LET40 Rev.1.0  
www.fairchildsemi.com  
4
Typical Characteristics TJ = 25°C unless otherwise noted.  
2
DUTY CYCLE-DESCENDING ORDER  
1
D = 0.5  
0.2  
P
DM  
0.1  
0.05  
0.02  
0.01  
0.1  
0.01  
t
1
t
2
NOTES:  
(t) = r(t) x R  
Z
θJC  
θJC  
SINGLE PULSE  
o
R
= 2.0 C/W  
θJC  
Peak T = P  
x Z (t) + T  
J
DM  
θJC C  
Duty Cycle, D = t / t  
1
2
0.001  
10-5  
10-4  
10-3  
10-2  
10-1  
1
t, RECTANGULAR PULSE DURATION (sec)  
Figure 13. Junction-to-Case Transient Thermal Response Curve  
©2015 Fairchild Semiconductor Corporation  
FDMC8360LET40 Rev.1.0  
www.fairchildsemi.com  
5
2.37 MIN  
SYM  
3.40  
3.20  
A
PKG  
C
C
L
L
8
5
(0.45)  
B
8
5
2.15 MIN  
0.70 MIN  
(0.40)  
(0.65)  
PKG  
3.40  
3.20  
C
PKG  
C
L
L
1
4
1
4
PIN 1  
INDICATOR  
0.42 MIN  
(8X)  
0.65  
1.95  
SEE  
DETAIL A  
LAND PATTERN  
RECOMMENDATION  
1.95  
0.10 C A B  
0.37  
(8X)  
0.27  
0.65  
0.50  
0.30  
1
4
C
PKG  
L
2.05  
1.85  
NOTES: UNLESS OTHERWISE SPECIFIED  
A) PACKAGE STANDARD REFERENCE:  
JEDEC MO-240, ISSUE A, VAR. BA,  
DATED OCTOBER 2002.  
8
5
(0.34)  
(0.33) TYP  
(0.52 TYP)  
(2.27)  
B) ALL DIMENSIONS ARE IN MILLIMETERS.  
C) DIMENSIONS DO NOT INCLUDE BURRS  
OR MOLD FLASH. MOLD FLASH OR  
BURRS DOES NOT EXCEED 0.10MM.  
D) DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M-1994.  
0.10 C  
E) DRAWING FILE NAME: PQFN08HREV1  
0.80  
0.70  
0.08 C  
0.05  
0.00  
C
SEATING  
PLANE  
0.25  
0.15  
SCALE: 2X  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
literature is subject to all applicable copyright laws and is not for resale in any manner.  
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