FDMC8588DC [ONSEMI]
25V N沟道PowerTrench® MOSFET;型号: | FDMC8588DC |
厂家: | ONSEMI |
描述: | 25V N沟道PowerTrench® MOSFET 开关 脉冲 光电二极管 晶体管 |
文件: | 总9页 (文件大小:467K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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February 2016
FDMC8588DC
N-Channel Dual CoolTM 33 PowerTrench® MOSFET
25 V, 40 A, 5.7 mΩ
Features
General Description
Dual CoolTM Top Side Cooling PQFN package
Max rDS(on) = 5.7 mΩ at VGS = 4.5 V, ID = 17 A
State-of-the-art switching performance
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers. It has been optimized
for low gate charge, low rDS(on), fast switching speed and body
diode reverse recovery performance.
Lower output capacitance, gate resistance, and gate charge
boost efficiency
Applications
Shielded gate technology reduces switch node ringing and
increases immunity to EMI and cross conduction
High side switching for high end computing
RoHS Compliant
High power density DC-DC synchronous buck converter
G
Pin 1
S
S
S
S
D
D
S
D
S
D
D
D
D
Pin 1
D
G
Dual CoolTM 33
Bottom
Top
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
(Note 5)
(Note 4)
25
V
V
±12
Drain Current - Continuous (Package limited) TC = 25 °C
40
- Continuous (Silicon Limited)
- Continuous
T
C = 25 °C
73
ID
A
(Note 1a)
(Note 3)
17
- Pulsed
60
EAS
Single Pulse Avalanche Energy
29
41
mJ
W
Power Dissipation
Power Dissipation
TC = 25 °C
TA = 25 °C
PD
(Note 1a)
3.0
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJC
RθJA
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Case
(Top Source)
(Bottom Drain)
(Note 1a)
7.0
3.0
42
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
(Note 1b)
105
17
°C/W
(Note 1i)
(Note 1j)
26
(Note 1k)
12
Package Marking and Ordering Information
Device Marking
Device
Package
Dual CoolTM 33
Reel Size
Tape Width
12 mm
Quantity
08DC
FDMC8588DC
13 ’’
3000 units
©2012 Fairchild Semiconductor Corporation
FDMC8588DC Rev.1.1
www.fairchildsemi.com
1
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA , VGS = 0 V
25
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 μA , referenced to 25 °C
5
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
VDS = 20 V, VGS = 0 V
1
μA
Gate to Source Leakage Current, Forward VGS = 12 V, VDS = 0 V
100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
D = 250 μA , referenced to 25 °C
GS = 10 V, ID = 18 A
0.8
1.2
-4
1.8
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
mV/°C
V
3.6
4.1
5.5
103
5.0
5.7
7.6
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
VGS = 4.5 V, ID = 17 A
mΩ
VGS = 10 V, ID = 18 A,TJ = 125 °C
VDD = 5 V, ID = 17 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
1695
493
63
pF
pF
pF
Ω
VDS = 13 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.4
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
8
3
ns
ns
VDD = 13 V, ID = 17A,
V
GS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
25
2
ns
ns
Qg(TOT)
Qgs
Qgd
Total Gate Charge at 4.5V
Total Gate Charge
Gate to Drain “Miller” Charge
12
3.0
3.0
nC
nC
nC
VDD = 13 V, ID = 17 A
Drain-Source Diode Characteristics
V
GS = 0 V, IS = 2 A
(Note 2)
(Note 2)
0.7
0.8
25
1.2
1.2
V
V
VSD
Source to Drain Diode Forward Voltage
VGS = 0 V, IS = 17 A
trr
Reverse Recovery Time
ns
nC
IF = 17 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
10
©2012 Fairchild Semiconductor Corporation
FDMC8588DC Rev.1.1
www.fairchildsemi.com
2
Thermal Characteristics
RθJC
RθJC
RθJA
RθJA
RθJA
RθJA
RθJA
RθJA
RθJA
RθJA
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Case
(Top Source)
(Bottom Drain)
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1d)
(Note 1e)
(Note 1f)
7.0
3.0
42
105
29
40
19
23
30
79
17
26
12
16
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
°C/W
(Note 1g)
(Note 1h)
(Note 1i)
(Note 1j)
(Note 1k)
(Note 1l)
Notes:
2
1. R
is determined with the device mounted on a 1in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R is determined by
θCA
θJA
θJC
the user's board design.
b.
105 °C/W when mounted on
a minimum pad of 2 oz copper
a.
42 °C/W when mounted on a
1 in pad of 2 oz copper
2
2
c. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in pad of 2 oz copper
d. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper
2
e. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in pad of 2 oz copper
f. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper
2
g. 200FPM Airflow, No Heat Sink,1 in pad of 2 oz copper
h. 200FPM Airflow, No Heat Sink, minimum pad of 2 oz copper
2
i. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in pad of 2 oz copper
j. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper
2
k. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in pad of 2 oz copper
l. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. E of 29 mJ is based on starting T = 25 °C, L = 1.2 mH, I = 7 A, V = 23 V, V = 10V. 100% tested at L = 0.1 mH, I = 16 A.
AS
J
AS
DD
GS
AS
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
5. The continuous Vds rating is 25V; however, a pulse of 28 V peak voltage for no longer than 3ns duration at 500KHz frequency can be applied.
©2012 Fairchild Semiconductor Corporation
FDMC8588DC Rev.1.1
www.fairchildsemi.com
3
Typical Characteristics TJ = 25°C unless otherwise noted
60
3.0
2.5
2.0
1.5
1.0
0.5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
50
VGS = 4.5 V
VGS = 4 V
VGS = 2.5 V
40
VGS = 3 V
30
VGS = 4 V
VGS = 3 V
VGS = 2.5 V
20
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
10
VGS = 10 V
50
VGS = 4.5 V
40
0
0.0
0.2
0.4
0.6
0
10
20
30
60
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
1.6
20
ID = 17 A
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
1.4
1.2
1.0
0.8
0.6
15
10
5
ID = 17 A
TJ = 125 o
C
TJ = 25 o
C
0
-75 -50 -25
0
25 50 75 100 125 150
0
2
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure4. On-Resistance vs Gate to
Source Voltage
Figure 3. Normalized On Resistance
vs Junction Temperature
60
60
VGS = 0 V
PULSE DURATION = 80 μs
50
40
30
20
10
0
DUTY CYCLE = 0.5% MAX
TJ = 150 o
C
VDS = 5 V
10
1
TJ = 25 oC
TJ = 150 o
C
TJ = 25 o
C
TJ = -55 o
C
TJ = -55 o
C
0.1
0.5
1.0
1.5
2.0
2.5
3.0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
©2012 Fairchild Semiconductor Corporation
FDMC8588DC Rev.1.1
www.fairchildsemi.com
4
Typical Characteristics TJ = 25°C unless otherwise noted
4.5
3000
1000
Ciss
ID = 17 A
VDD = 10 V
3.6
VDD = 13 V
Coss
2.7
VDD = 15 V
1.8
Crss
100
30
0.9
0.0
f = 1 MHz
VGS = 0 V
0
3
6
9
12
15
0.1
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
50
10
80
60
40
20
0
VGS = 10 V
TJ = 25 oC
TJ = 100 oC
Limited by Package
VGS = 4.5 V
RθJC = 3.0 oC/W
TJ = 125 o
C
1
0.001
0.01
0.1
1
10
100
25
50
75
100
125
150
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Case Temperature
100
10
1000
100 μs
100
10
1 ms
THIS AREA IS
1
10 ms
LIMITED BY r
DS(on)
100 ms
1 s
SINGLE PULSE
SINGLE PULSE
RθJA = 105 oC/W
0.1
T
J = MAX RATED
10 s
DC
RθJA = 105 oC/W
TA = 25 oC
T
A = 25 oC
1
0.01
0.5
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
100
101
0.01
0.1
1
10
100200
100 1000
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum
Power Dissipation
©2012 Fairchild Semiconductor Corporation
FDMC8588DC Rev.1.1
www.fairchildsemi.com
5
Typical Characteristics TJ = 25°C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.1
P
DM
0.05
0.02
0.01
t
1
0.01
t
2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t /t
θJA = 105 oC/W
1
2
R
PEAK T = P
J
x Z
x R
+ T
DM
θJA
θJA A
1E-3
5E-4
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
100
101
100
1000
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
©2012 Fairchild Semiconductor Corporation
FDMC8588DC Rev.1.1
www.fairchildsemi.com
6
3.40
2.37 MIN
SYM
3.30
A
KEEP
OUT
AREA
PKG
C
C
B
L
L
8
5
8
5
(0.45)
2.15 MIN
PKG
PKG
C
L
3.30
C
L
(0.40)
(0.65)
0.70 MIN
0.42 MIN
1
4
1
4
SEE DETAIL 'A'
0.65
1.95
LAND PATTERN
RECOMMENDATION
1.95
0.10 C A B
0.32±0.05
1
0.65
4
NOTES: UNLESS OTHERWISE SPECIFIED
0.40±0.10
A) PACKAGE STANDARD REFERENCE:
JEDEC MO-240, ISSUE A, VAR. BA,
DATED OCTOBER 2002.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR
BURRS DOES NOT EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
(0.20)
PKG
3.30±0.10
2.00±0.10
C
L
8
5
(0.39)
(2.27)
E) DRAWING FILE NAME: PQFN08CREV3
0.52
3.30±0.10
0.10 C
1.00±0.05
0.08 C
0.05
0.00
C
0.20±0.025
SEATING
PLANE
SCALE: 2X
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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相关型号:
FDMC86102L
Power Field-Effect Transistor, 7A I(D), 100V, 0.023ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, 3.30 X 3.30 MM, ROHS COMPLIANT, POWER 33, MLP, 8 PIN
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