FAN6292 [ONSEMI]
Compact Secondary-Side Synchronous Rectifier Control;
| 型号： | FAN6292 |
| 厂家： | 
ONSEMI |
| 描述： | Compact Secondary-Side Synchronous Rectifier Control |
| 文件： | 总16页 (文件大小：898K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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FAN6292BMX/FAN6292MX
Compact Secondary-Side
Synchronous Rectifier Control
with USB Type-C Control
FAN6292BMX/FAN6292MX are highly integrated, secondary-side
power adaptor controllers compatible with Type-C control. Internally
adopted synchronous rectifier control helps for less BOM counts as well
as easy design.
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1
FAN6292BMX/FAN6292MX are also a source only USB Type-C
controllers which are optimized for mobile chargers and power adapters.
It supports standard 3 A VBUS current level. N-Channel MOSFET is
compatible as a load switch, and helps to reduce BOM cost.
8
TSSOP-8
FAN6292BMX/FAN6292MX incorporate adaptive output under-voltage
protection to improve system reliability.
MARKING DIAGRAM
Features
Type-C Control for Standard 3 A VBUS Current
N-Channel MOSFET Control as a Type-C Load Switch
Internal Synchronous Rectifier Control Circuit
ZXYTT
6292
TM
Protections for Safe Operation; Output Under-Voltage-Protection
Typical Applications
1st Line:
Battery Chargers for Smart Phones, Feature Phones, and Tablet PCs
F: Corporate Logo
Z: Assembly Plant Code
X: Year Code
AC-DC Adapters for Portable Devices that Require CV/CC Control
Y: Week Code
TT: Die Run Code
2nd Line:
3rd Line:
6292 : IC Part Name for
FAN6292MX
6292B: IC Part Name for
FAN6292BMX
T: Package Type (M=SOIC)
M: Manufacture Flow Code
PIN CONNECTIONS
CC2
1
2
3
4
8
7
6
5
CC1
BLD
/ AUX
GND
LPC
LGATE
VIN
GATE
(TOP View)
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
FAN6292BMX/FAN6292MX
February 2017- Rev. 1.0
FAN6292MX/FAN6292BMX
USB Type-C
Load
Switch
GND
GND
RX1+
RX1-
VBUS
SBU2
D-
L
Transformer
VBUS
TX1+
TX1-
VBUS
CC1
D+
RSNU CSNU
TH
COUT
CBUS
Lm
SR
MOSFET
BD
VBUS
CC1
VBUS
CIN1 CIN2
AC IN
DSNU
RHV
D-
D+
Fuse
Q2
SBU1
VBUS
RX2-
RX2+
GND
CC2
VBUS
TX2-
TX2+
GND
RGATE
Q1
CC2
VBUS
VBUS
5
6
8
1
3
4
7
2
GATE
LGATE
RF
RCS
LPC
CC1
CC2
VIN
FAN6292
BMX
3
GATE
CS
1
RVSH
DVDD
CC1
CC2
GND
2
2
FUNC
GND
VDD
VS
4
5
BLD/
AUX
CVDD
RVSL
CVS
FAN105B
Figure 1 FAN6292BMX Typical Application Schematic
USB Type-C
Load
Switch
GND
TX1+
TX1-
VBUS
CC1
D+
GND
L
Transformer
RX1+
RX1-
VBUS
SBU2
D-
RSNU CSNU
TH
COUT
CBUS
SR
MOSFET
Lm
BD
VBUS
CC1
VBUS
CIN1 CIN2
AC IN
DSNU
RHV
D-
D+
Fuse
SBU1
VBUS
RX2-
RX2+
GND
CC2
VBUS
TX2-
TX2+
GND
RGATE
Q1
CC2
VBUS
VBUS
5
6
8
1
3
4
7
2
GATE
LGATE
1
HV
Gate
4
3
RF
RCS
LPC
CC1
CC2
VIN
FAN6292
MX
2
9
NC
FB
CS
RVSH
DVDD
CC1
CC2
GND
VDD
VS
5
6
7
BLD/
AUX
10 GND
CVDD
RVSL
CVS
8
IMIN
FMAX
FAN602
Figure 2 FAN6292MX Typical Application Schematic
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FAN6292BMX/FAN6292MX
VIN
LGATE
BLD / AUX
Internal Bias (VDD)
CC1
CC2
Type-C
Detection
Undershoot
Detection
VIN-ON / VIN-OFF
VLPC-EN
Calculate
VLPC-EN
Green Mode
GATE
Driver
S
R
Q
PWM
Block
LPC
VLPC-TH
VCT
RESET
Line
Detection
Function
Enable
iCHR
CT
iDISCHR
VIN
RatioLPC
(1µA/V)
RatioRES
(0.445µA/V)
GND
GATE
Figure 3 FAN6292BMX/FAN6292MX Function Block Diagram
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FAN6292BMX/FAN6292MX
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
Description
Configuration Channel 2. This pin is used to detect connections of Type-C
cables and connectors. It is tied to the USB Type-C CC2.
1
CC2
Bleeder and AUX function. Discharging path of output capacitor when UFP
detachment is acknowledged. In addition, information is delivered to primary to
enhance output performance.
BLD
/ AUX
2
3
4
LGATE
VIN
Load Switch Gate. This pin is tied to the gate of the load switch
Input Voltage. This pin is tied to the output of the adaptor to monitor its output
voltage and supply internal bias. IC operating current, and MOSFET gate drive current
are supplied through this pin.
5
6
7
8
GATE
LPC
Gate Drive Output. Totem-pole output to drive the external SR MOSFET.
SR MOSFET Drain Voltage Detection. This pin is used to detect the voltage
on the secondary winding during the on time period of the primary MOSFET.
GND
CC1
Ground.
Configuration Channel 1. This pin is used to detect connections of Type-C
cables and connectors. It is tied to the USB Type-C CC1.
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4
FAN6292BMX/FAN6292MX
MAXIMUM RATINGS (Note 1,2,3)
Rating
Symbol
Value
Unit
VIN Pin Input Voltage
VIN
VBLD/AUX
VLGATE
VCC1
VCC2
VLPC
VGATE
PD
20
20
V
V
BLD/AUX Pin Input Voltage
LGATE Pin Input Voltage
20
V
CC1 Pin Input Voltage
-0.3 to 6.0
-0.3 to 6.0
-0.3 to 6.5
-0.3 to 6.0
850
V
CC2 Pin Input Voltage
V
LPC pin input voltage
V
GATE pin input voltage
V
mW
Power Dissipation (TA=25C)
Operating Junction Temperature
Storage Temperature Range
Lead Temperature, (Soldering,10 Seconds)
Human Body Model, ANSI/ESDA/JEDEC JS-001-2012 (Note 4)
Charged Device Model, JESD22-C101 (Note 4)
TJ
-40 to 150
-40 to 150
260
C
C
C
kV
kV
TSTG
TL
ESDHBM
ESDCDM
4
1.75
1. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device
functionality should not be assumed, damage may occur and reliability may be affected.
2. All voltage values, except differential voltages, are given with respect to the GND pin.
3. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
4. Meets JEDEC standards JS-001-2012 and JESD 22-C101.
THERMAL CHARACTERISTICS (Note 5)
Rating
Symbol
Value
Unit
Thermal Characteristics,
RθJA
RψJT
153
22
Thermal Resistance, Junction-to-Air
Thermal Reference, Junction-to-Top
°C/W
5. TA=25°C unless otherwise specified.
RECOMMENDED OPERATING RANGES (Note 6)
Rating
Symbol
Min
0
Max
6
Unit
V
VIN Pin Input Voltage
BLD/AUX Pin Input Voltage
LGATE Pin Input Voltage
CC1 Pin Input Voltage
CC2 Pin Input Voltage
LPC pin input voltage
GATE pin input voltage
VIN
VBLD/AUX
VLGATE
VCC1
0
6
V
0
10
5.8
5.8
5
V
0
V
0
V
VCC2
0
V
VLPC
0
5.5
V
VGATE
6. Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses
beyond the Recommended Operating Ranges limits may affect device reliability.
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FAN6292BMX/FAN6292MX
ELECTRICAL CHARACTERISTICS
VIN=5 V, LPC=1.5 V, LPC width=2 µs at TJ= -40~125 C, FLPC=100 kHz, unless otherwise specified.
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
VIN Section
Continuous Operating Voltage(7)
Operating Supply Current
VIN-OP
6
V
VIN=5 V
VIN=5 V, with SR gate
Green Mode Operating Supply Current F = 400Hz
CC1/CC2 open circuit
IIN-OP-5V
8
mA
IIN-OP-Green
0.5
0.9
1.3
mA
Internal Bias Section
Turn-On Threshold Voltage
VIN increases
VIN decreases
VIN-ON
3.0
3.2
3.4
V
V
Turn-Off Threshold Voltage
VIN-OFF
2.75
2.85
2.95
Green Mode Section (FAN6292BMX)
Non-switching time, when
LPC falling
tGreen-EN-
Debounce
Green Mode Enable Debounce Time
54
54
64
1
74
74
µs
Number of switching to enter green
mode
When switching period > TGreen-EN-
Debounce
NGreen-EN-
Debounce
Cycle
Enable after enter green mode,
Non-switching time, when LPC
falling
tGreen-DIS-
Debounce
Green Mode Disable Debounce Time
64
µs
Green Mode Section (FAN6292MX)
Non-switching time, when when
LPC falling
tGreen-EN-
Debounce
Green Mode Enable Debounce Time
0.4
0.2
0.5
0.3
0.6
0.4
ms
ms
Enable after enter green mode,
Non-switching time, when LPC
falling
tGreen-DIS-
Debounce
Green Mode Disable Debounce Time
Number of consecutive switching to
leave green mode
Independently enable with TGreen-DIS- NGreen-DIS-
256
Cycles
Debounce, when LPC falling
Debounce
Bleeder Section
BLD Pin Sink Current through when
bleeding (7)
VBLD=5 V
IBLD -Sink
tBLD-MAX
90
mA
ms
Maximum Discharging Time when
bleeding
275
320
4.8
365
4.9
AUX Section ( FAN6292BMX )
Output undershoot detection threshold
voltage
4.7
V
VIN-AUX
TAUX-
(7)
μs
μs
Internal debounce time to enable IAUX
RC filter type
5
Debounce
TAUX-ON
BLD/AUX pin pull-down time
44
64
84
15
BLD/AUX pin pull down current with
VAUX=5V
VBLD=5 V, RBLD=0 Ω
3.3
mA
IAUX
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FAN6292BMX/FAN6292MX
ELECTRICAL CHARACTERISTICS
VIN=5 V, LPC=1.5 V, LPC width=2 µs at TJ= -40~125 C, FLPC=100 kHz, unless otherwise specified.
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
Type-C Section
Source current on CC1 pin
Source current on CC2 pin
Input impedance on CC1 pin
Input impedance on CC2 pin
VIN=5 V, VCC2=0 V
IP-CC1
IP-CC2
ZOPEN-CC1
ZOPEN-CC2
304
304
126
126
330
330
356
356
µA
µA
kΩ
kΩ
VIN=5 V, VCC1=0 V
Ra impedance detection threshold on
CC1 pin
VIN=5 V, VCC2=0 V, Decreasing VCC1
VIN=5 V, VCC1=0 V, Decreasing VCC2
VIN=5 V, VCC2=0 V, Increasing VCC1
VIN=5 V, VCC1=0 V, Increasing VCC2
VIN=5 V, VCC2=0 V, Increasing VCC1
VRA-CC1
VRA-CC2
VRD-CC1
VRD-CC2
0.75
0.75
2.45
2.45
100
10
0.80
0.80
2.60
2.60
150
15
0.85
0.85
2.75
2.75
200
20
V
V
Ra impedance detection threshold on
CC2 pin
Rd impedance detection threshold on
CC1 pin
V
Rd impedance detection threshold on
CC2 pin
V
tCC-Attach-
debounce
UFP attachment debounce time
UFP detachment debounce time
ms
ms
tCC-Detach-
debounce
VIN=5 V, VCC2=0 V, Decreasing VCC1
VIN=5 V, VCC2=0 V, Increasing VCC1
After tCC-attach-debounce until VBUS=5 V(7)
After detaching UFP until VBUS=0 V(7)
tVBUS-ON
275
650
10
ms
ms
V
VIN=5 V, VCC2=0 V, Decreasing VCC1 tVBUS-OFF
Gate high voltage
VIN=5 V
VNGATE
8
Output Driver Section
Output Voltage Low
Output Voltage High
VIN=5 V, IGATE=100 mA
VIN=5 V
VOL
VOH
0.16
0.25
35
V
V
4.5
VIN=5 V, CL=3300 pF,
GATE=1 V ~ 4 V
Rising Time(7)
Falling Time(7)
tR
20
9
ns
ns
ns
ns
µs
VIN=5 V, CL=3300 pF,
GATE=4 V~ 1 V
tF
Propagation Delay to OUT High (LPC
trigger)
VIN=5 V, GATE=1 V
VIN=5 V, GATE=4 V
tPD-HIGH-LPC
tPD-LOW-LPC
tINHIBIT
44
30
1.4
80
Propagation Delay to OUT Low (LPC
trigger)(7)
Gate inhibit Time(7)
Gate start-up disable time
Gate start-up disable time
For FAN602 (FAN6292MX)
tSR-startup-dis
tSR-startup-dis
60
2
ms
ms
For FAN105B (FAN6292BMX)
1.5
2.5
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FAN6292BMX/FAN6292MX
ELECTRICAL CHARACTERISTICS
VIN=5 V, LPC=1.5 V, LPC width=2 µs at TJ= -40~125 C, FLPC=100 kHz, unless otherwise specified.
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
Internal RES section
Internal RES ratio
VIN=5 V, Turn-ratio=15~17
KRES
0.196 0.200 0.204
V/V
%
VIN Dropping Protection Ratio with Two LPC width=5 µs
Cycle
KVIN-DROP
70
90
VIN=5 V to 3.5 V
Debounce time for disable SR when VIN
dropping protection
tSR_OFF
3.5
1
5.5
2
7.5
3
ms
µs
Debounce time for noise immunity on
VIN(7)
tVIN-Debounce
LPC Section
Linear Operation Range of LPC Pin
VIN -OFF < VIN ≤ 5V
VLPC
0.4
VIN -1
V
nA
V
Voltage(7)
LPC Sink Current
VLPC=1V
ILPC-SINK
100
SR Enabled Threshold Voltage @High
Line
VLPC-HIGH-H 1.418 1.500 1.583
VLPC-TH-H 1.205 1.313 1.424
Threshold Voltage on LPC Rising Edge
@High Line(7)
VLPC-HIGH-H *0.875 = VLPC-TH-H
V
V
SR Enabled Threshold Voltage @ Low
Line
VLPC-HIGH-L-5V = VLPC-TH-L-5V / 0.875 VLPC-HIGH-L-5V 0.703 0.743 0.783
Spec.=0.4+0.05*VIN
Threshold Voltage on LPC Rising Edge
@ Low Line(7)
VLPC-TH-L-5V
0.63
0.650
0.67
V
VIN = 5V
Falling Edge Threshold Voltage to trigger
SR (7)
VLPC-TH-TRIG
VIN = 5V, Spec.=(0.8+0.03*VIN)*2 VLINE-H-5V
70
1.90
1.80
mV
V
Low to High Line Threshold Voltage on
LPC pin
1.81
1.72
1.99
1.88
High to Low Line Threshold Voltage on VIN = 5V,
LPC pin
VLINE-L-5V
V
Spec.=(0.75+0.03*VIN)*2
Line Change Threshold Hysteresis
Higher Clamp Voltage
VLINE-HYS-5V = VLINE-H-5V - VLINE-L-5V
VLINE-HYS-5V
VLPC-CLAMP-H
0.1
6.2
V
V
5.4
7.0
VIN = 5V
LPC Threshold Voltage to Disable SR
Gate Switching
VLPC-DIS
VIN - 0.6
V
LPC=3V↑
Enable VLPC-DIS
Disable VLPC-DIS
Increasing VIN
Decreasing VIN
VEN-LPC-DIS
VDIS-LPC-DIS
4.25
4.1
4.4
4.2
4.45
4.3
V
V
Counts for
Line Change Debounce from Low Line to
High Line(7)
tLPC-LH-debounce
7
cycles
µs
LPC falling < VLPC-TH-L-5V
Line Change Debounce from High Line
to Low Line(7)
tLPC-HL-debounce
15
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8
FAN6292BMX/FAN6292MX
ELECTRICAL CHARACTERISTICS
VIN=5 V, LPC=1.5 V, LPC width=2 µs at TJ= -40~125 C, FLPC=100 kHz, unless otherwise specified
Parameter
Internal Timing Section
LPC Transfer Ratio to ILPC
Test Conditions
Symbol
Min
Typ
Max
Unit
(7)
(7)
RatioLPC
RatioRES
1
A/V
A/V
VRES Transfer Ratio to IRES
0.445
VIN=5V, FLPC=50 kHz,
KRES=0.20
Ratio between VLPC & VRES
RatioLPC-RES 3.15
3.37
180
3.59
280
Minimum LPC Time to Enable the SR
Gate @ High Line
VLPC=3V
tLPC-EN-H
tLPC-EN-L
80
ns
ns
Minimum LPC Time to Enable the SR
Gate @ Low Line
VLPC=1.5V
500
600
2.2
700
2.5
Minimum Gate Width
Max SR On Time(7)
FAN6292BMX
tMIN
1.9
20
µs
µs
tON-MAX
ton-SR(n+1)- ton-SR(n) < tgate-limit
tgate-limit
350
500
650
ns
Maximum Gate Limit On-time)(7)
Forced internal CT reset time(7)
Reverse Current Mode Section
tgate-limit-max
tCT-RESET
5
µs
ns
10
Reverse current mode entry debounce
time
Treverse-
debounce
VIN=5 V, VLPC=0 V
VIN=5 V, VLPC=0 V
VIN=5 V, VLPC=0 V
VIN=5 V, VLPC=0 V
VIN=5 V, VLPC=0 V
350
500
650
1.7
10
ms
mA
μA
μA
uA
Operating current during reverse
current mode
IOP.reverse
IP-CC1.reverse
IP-CC2.reverse
IBLD.reverse
Source current on CC1 pin during
reverse current mode(7)
Source current on CC2 pin during
reverse current mode(7)
10
AUX pin current during reverse current
mode(7)
10
7. Guaranteed by Design.
8. Guaranteed at -5° ~ 85°C.
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FAN6292BMX/FAN6292MX
T
Y
P
I
C
A
L
C
H
A
R
A
C
T
E
R
I
S
T
I
C
S
F i g u r e
( V
4
T u r n - O n T h r e s h o l d V o l t a g e
) v s . T e m p e r a t u r e
O N
F i g u r e 5 T u r n - O f f T h r e s h o l d V o l t a g e
( V v s . T e m p e r a t u r e
I
N
-
)
N - O F F
I
Figure 6 Minimum LPC Time to Enable the SR
Gate @ Low -Line (t L P C - E N - L ) vs. Temperatur e
F i g u r e 7 V I N U n d e r - V o l t a g e - P r o t e c t i o n
E n a b l e ( V v s . T e m p e r a t u r e
)
I N - A U X
F i g u r e 9 R a t i o b e t w e e n V L P C & V R E S
( R a t i o v s . T e m p e r a t u r e
Figure 8 Minimum LPC Time to Enable the SR
Gate @ High-Line (tL P C - E N - H ) vs. Temperature
)
P C - R E S
L
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FAN6292BMX/FAN6292MX
T
Y
P
I
C
A
L
C
H
A
R
A
C
T
E
R
I
S
T
I
C
S
F i g u r e 1 0 S o u r c e C u r r e n t o n C C 1 P i n
( I v s . T e m p e r a t u r e
F i g u r e 1 1 S o u r c e C u r r e n t o n C C 2 P i n
( I v s . T e m p e r a t u r e
)
C 1
P
-
C
)
- C C 2
P
Figure 12 Operating Current during Reverse Current
M o d e ( I v s . T e m p e r a t u r e
F i g u r e 1 3 G a t e H i g h V o l t a g e
( V v s . T e m p e r a t u r e
)
O P . r e v e r s e
)
G A T E
N
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FAN6292BMX/FAN6292MX
APPLICATIONS INFORMATION
N-channel MOSFET for Load Switch
VO _ MAX
(1)
FAN6292BMX/FAN6292MX implement Type-C block
to enable or disable an external load switch. Internally
adapted charge pump lets it control N-channel MOSFET
as a load switch. It helps system be more cost
competitive compared to P-channel MOSFET as a load
switch. Since the minimum pumped voltage is VBUS+3 V,
it is recommended to use N-channel MOSFET
IBLDRType
RBLD RInternal
VIN-UVP Protection(for FAN6292BMX)
Since pure primary side controller detects and regulates
output voltage only when switching, it is not easy
maintaining output voltage when load suddenly increases
from light load where switching frequency is slow to
heavy load.Therefore, as Figure 15, FAN6292BMX
automatically detects output voltage. When output
undershoot is acknowledged via VIN pin, BLD/AUX pin
pull-down current via S2 switch to inform undershoot
status to primary controller via a photo-coupler. Since
the pull-down current is limited through S2, the current
will not affect to the amount of output current.
supporting lower gate threshold levels.
Detail of Load Switch Control
FAN6292BMX/FAN6292MX support output current
higher than 1.5 A. In order to meet Type-C specification,
330 μA is applied on CC1 pin and CC2 pin. When Rd
(5.1 kΩ) is attached on either CC1 or CC2, load switch is
turned-on after 150 ms debounce time. As soon as load
switch is enabled, BC1.2 counter is enabled. To
acknowledge detachment, it needs 15 ms (typ.) debounce
time. When load switch is turned-off, bleeder is also
enabled at the same time.
Load Switch
VBUS
NP
NS
Co1
LGATE
Co2
RLPC1
SR
Gate
Opto-
coupler
LPC
RLPC2
Green Mode Operation (for FAN6292BMX)
RBLD
(100Ω)
In order to reduce power consumption at light-load
conditions with FAN105B system, FAN6292BMX in
green mode will disable LPC internal detection block but
SR contiously works at mini on time for FAN105B
which is a pure primary side controller to normally
regulate output voltage. When VLPC is smaller than VLPC-
HIGH-L-5V and maintains duration longer than tGreen-EN-
Debounce, FAN6292MX enters green mode where current
can be reduced to 0.9 mA (typ.). It leaves green mode
when VLPC is larger than VLPC-HIGH-L-5V and maintains
AUX
CFUNC
FAN105B
FAN6292
BLD / AUX
VIN
CC1
CC2
S1
TypeC
deteachment
detection
VIN-AUX
S2
duration shorter than tGreen-DIS-Debounce
.
Figure 14 BLD/AUX Function Diagram
Green Mode Operation(for FAN6292MX)
In order to reduce power consumption at light-load
conditions with FAN602 system, FAN6292MX enters
the green mode where some internal blocks are disabled
such as Synchronous Rectifier control block. Therefore,
the operating current can be largely reduced. It enters
Green Mode when VLPC is smaller than VLPC-HIGH-L-5V
and maintains duration longer than tGreen-EN-Debounce. It
leaves green mode when VLPC is larger than VLPC-HIGH-L-
Load
Heavy load
t
t
Pri-PWM
VIN
5V and maintains duration shorter than tGreen-DIS-Debounce
.
VIN-AUX
Bleeder Function
When the portable device is detached, BUS voltage
t
t
S2
tAUX-Debounce
tAUX-ON
should be discharged to zero within a short time to meet
TypeC specification. FAN6292BMX/ FAN6292MX
support bleeding function by turning on S1 for TBLD-max
as shown in Figure 14. The amount of bleeding current
through BLD/AUX pin can be controlled by the external
resistor RBLD shown in (1).
Figure 15 VIN-UVP Protection
www.onsemi.com
12
FAN6292BMX/FAN6292MX
ORDERING INFORMATION
Operating
Temperature Range
Part Number
Package
Packing Method
8-Lead, Small Outline Package (SOIC), JEDEC
MS-012, .150-Inch Narrow Body
FAN6292BMX
FAN6292MX
Tape & Reel
Tape & Reel
-40C to +125C
8-Lead, Small Outline Package (SOIC), JEDEC
MS-012, .150-Inch Narrow Body
-40C to +125C
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
www.onsemi.com
13
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