TDA9725 [NXP]
Y/C automatic adjustment processor VHS standard; Y / C自动调节处理器的VHS标准
| 型号： | TDA9725 |
| 厂家： | 
NXP |
| 描述： | Y/C automatic adjustment processor VHS standard |
| 文件： | 总44页 (文件大小：338K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA9725
Y/C automatic adjustment
processor (VHS standard)
1996 Oct 14
Product specification
Supersedes data of 1995 Dec 06
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
FEATURES
GENERAL DESCRIPTION
• Automatic adjustment by control loops
• Integrated filters
The TDA9725 is an integrated circuit for chrominance and
luminance processing (record and playback) in VHS tape
recorders for PAL, SECAM/ME and NTSC systems
(4.43 MHz playback only) with internal filter and without
adjustments.
• Simple SVHS playback
• Colour sequence correction for long-play still mode
• Automatic gain control for FM.
QUICK REFERENCE DATA
SYMBOL
VCC
PARAMETER
CONDITIONS
MIN.
4.5
TYP. MAX. UNIT
supply voltage
supply current
5.0
170
1.0
5.5
200
2.0
V
ICC
VCC = 5 V; playback
140
0.6
mA
V
Vi(p-p)
video input voltage; CVBS signal
(peak-to-peak value)
VoREC(p-p) video output record voltage
(peak-to-peak value)
video/sync = 7/3
2.03
2.03
2.14
2.14
2.25
2.25
V
V
VoPB(p-p)
video output playback voltage
(peak-to-peak value)
video/sync = 7/3;
nominal FM signal
ViFM(p-p)
VoFM(p-p)
VCFT(p-p)
FM input voltage (peak-to-peak value)
FM output voltage (peak-to-peak value)
FM AGC active
63
0.7
11
200
0.9
632
1.1
mV
V
RL = 1 kΩ
chrominance input voltage (+FM) from tape
(peak-to-peak value)
110
310
mV
VCTT(p-p)
chrominance output voltage to tape
(peak-to-peak value)
467
660
932
mV
Tstg
storage temperature
−25
−20
−
−
+150
+70
°C
°C
Tamb
operating ambient temperature
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
TDA9725
SDIP52
plastic shrink dual in-line package; 52 leads (600 mil)
SOT247-1
1996 Oct 14
2
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BLOCK DIAGRAM
V
SYNC
CVBSI
CVBSO
YNR
C
C
CHI
LPNC GND(Y)
CC(Y)
SS
AGC
1HDL
CCD
C
CCD
22
µH
10
µF
0.1
µF
1.3
kΩ
10
µF
4.7 µF
4.7 µF
22 nF
1 µF
47
nF
VTC
VFC
48
52
51
50 49
47
50 kΩ
46
45
44
43
42
41
40
to BPF 4.43
LPF
HSS
SYNC
AGC
SEPARATOR
CCD
AGC
REC
AGC
DETECTOR
CLAMP
1
A
PB
DOP
CLPA
NOISE
CLIP
CLAMP
2
REC
50
kΩ
PB
YNR
YNR
CHARACTER
INSERT
PROCESSOR
MIXER
Y/C
SCL
MIXER
EDIT
EDIT
NOISE
CANCELLER
1
PB
NLDE
EDIT
REC
PB
25 kΩ
PICTURE
YLPF
50 kΩ
1.6 V
NLE
DTE
TDA9725
PB
REC
CLAMP
3
2.5 dB
to pin 6
f
DROP-OUT
DETECTOR
0
SQPB
PROCESSOR
DOP
DEVIATION/PLAYBACK
DETECTOR
DEVIATION
CONTROL
FM DEMODULATOR
SUBLPF
DOUBLE
LIMITER
ENVELOPE
DETECTOR
GATE
REC
CLPB
PB
ME
SQPB
FM
AGC
PB
W/DC
MODULATOR
to CLP3
6
pin 14
HIGH
50 kΩ
1
2
3
4
5
7
8
9
10
11
12
13
14
MEO
MDEC
MDEB
1 kΩ
0.33
µF
0.01
µF
4.7
µF
22
nF
0.1 µF
1.5 kΩ
1.5 kΩ
1 kΩ
470 Ω
PTR
270 Ω
(1)
C
FMA
PCTL
FMI
TP2
680 pF
5%
FMO
1 nF
5%
C
C
F0E
CDEV
MGB694
SQPB
CLP3
V
0.1
µF
CC(FM)
NFB
peaking
(1) Low leakage current.
All capacitors for loop filter ±10%; all other capacitors +10%/−50%; all resistors ±5%; all inductors ±10%; unless otherwise specified.
Fig.1 Block diagram (continued in Fig.2).
1996 Oct 14
3
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
CF892
270 Ω
COMB
-15 dB
4
3
AGCKP1
2
V
CC(C)
GND(C) CFT
TP1
15
µH
1.3
kΩ
f
CTT
H/2
10 nF
SNP
10 nF
0.1
µF
10 nF
PBCO
38
CFI
CDO
35
BMI
ACCO
32
PBCI
39
37
36
34
50 kΩ
33
31
30
29
28 27
A
SEC
LPF
BPF
630
BALANCED
MIXER
COMB
DRIVER
from
4 PHI
PB
f
*
C
H/2
REC
NAP
ACC
ACC
CK
H BLANK
BURST
DOWN
BURST UP
PB/SP
DETECTOR
PB
REC
PB
REC
BPF
4.43
LPF
630
CK
PB/LP
REC
from pin 43
f
H/2
CK
f
CK/FPC
DETECTOR
TDA9725
sc
PHI/PB
VXO
X2
3rd
LOCK
REC
MUTE
MUTE
HSS
TIMER
VXO
PB
RECORD
AFC
REC
REC
V
CC(C)
: 40
PB
SEC
MUTE
FPC to BM
8.0
kΩ
DIVIDER
SUBMIXER
LPF
SLD
4 PHI : 4
VCO
FREQUENCY
DETECTOR
50 kΩ
15
16
17
18
19
20
21
22
23
24
25
26
XTALI
XTALO
BGP ROT
TEW 8H
0.1
µF
(1)
1 µF
6.8
µH
120
680
Ω
33
pF
4.43619
MHz
470
pF
47
nF
kΩ
22 kΩ
ELS
f
sc
CK
0.1 µF
(1)
1 µF
(1)
2 f
FCO
sc
V
CC(C)
4.7 kΩ
LFVXO
LFVCO
MGB695
(1) Low leakage current.
Fig.2 Block diagram (continued from Fig.1).
4
1996 Oct 14
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
Table 1 Explanation of symbols in Figs 1 and 2
SYMBOL PIN
DESCRIPTION
19 rotary pulse input
20 loop filter VXO
21 loop filter VCO
SYMBOL
DESCRIPTION
ROT
AGCKP1
BGP
mode with shortened key pulse for AGC
burst gate pulse
LFVXO
LFVCO
n.c.
DOP
dropout pulse
22 not connected; note 1
23 fsc output
fH
line frequency
fsc
fsc
subcarrier frequency (4.433619 MHz)
charged coupled device with 1H delay
non-linear de-emphasis
XTALI
XTALO
2fsc
24 VXO input from crystal
25 VXO output to crystal
26 2fsc output
HDL CCD
NLDE
NLEDTE
ROT
non-linear emphasis/detail enhancer
rotary pulse
fH/2
27 fH/2 output
CTT
28 chrominance output to tape
29 chrominance supply voltage
30 playback chrominance input from tape
31 chrominance ground
32 automatic chrominance control output
33 balanced mixer input
34 switch (SECAM/NTSC/PAL)
35 comb driver output
VXO
voltage controlled XTAL oscillator
vertical noise reduction
VCC(C)
CFT
YNR
YLPF
luminance low-pass filter
GND(C)
ACCO
BMI
PINNING
SNP
SYMBOL PIN
DESCRIPTION
CDO
CFI
PCTL
CDEV
TP2
1
2
3
picture control/edit switch input
deviation/playback AGC detector input
test pin 2/correlation detector output
36 chrominance input from comb filter
37 test pin 1; note 1
TP1
PBCO
PBCI
VCC(Y)
CVBSO
CHI
38 playback chrominance output
39 playback chrominance input
40 luminance supply voltage
41 CVBS output
NFB
negative feedback input of main
emphasis
4
MEO
main emphasis output/white
clip/modulator input/SQPB selector
5
6
7
42 character insertion input (artificial
sync/black/white/through)
CCLP3
CF0E
capacitor for clamp 3
storage capacitor for f0 processor
(record)/envelope detector (playback)
CVBSI
CAGC
SYNC
CSS
43 CVBS input
44 AGC detector capacitor
45 sync separator push-pull output
46 sync separator detector capacitor
47 YNR switch
MDEC
MDEB
VCC(FM)
FMO
PTR
8
9
main de-emphasis output
main de-emphasis and peaking output
10 FM supply voltage
11 FM output
YNR
VFC
48 video input from 1HDL CCD
49 video output to 1HDL CCD
50 storage capacitor for CCD AGC level
51 luminance ground
12 switch (PB/TRICK/REC)
13 playback FM input
14 storage capacitor for FM AGC
VTC
FMI
CCCD
GND(Y)
LPNC
CFMA
ELS
PAL: switch (LP C*/LP/SP); NTSC:
switch (EP/LP/SP)
15
52 low-pass filter noise canceller
CK
16 colour killer terminal
Note
FCO
BGP
17 frequency correction output
18 burst gate pulse output
1. It is recommended that this pin should be connected to
ground.
1996 Oct 14
5
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
handbook, halfpage
PCTL
CDEV
TP2
1
2
52 LPNC
51 GND(Y)
3
50
C
CCD
NFB
4
49 VTC
48 VFC
47 YNR
MEO
5
C
6
CLP3
C
7
46
C
F0E
SS
MDEC
MDEB
8
45 SYNC
9
44
C
AGC
V
10
43 CVBSI
42 CHI
CC(FM)
FMO 11
PTR 12
FMI 13
41 CVBSO
40
V
CC(Y)
TDA9725
C
14
39 PBCI
38 PBCO
37 TP1
FMA
ELS 15
CK 16
FCO 17
BGP 18
ROT 19
LFVXO 20
LFVCO 21
n.c. 22
36 CFI
35 CDO
34 SNP
33 BMI
32 ACCO
31 GND(C)
30 CFT
f
23
sc
XTALI 24
29
V
CC(C)
XTALO 25
28 CTT
2f
26
27
f
H/2
sc
MGB693
Fig.3 Pin configuration.
6
1996 Oct 14
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
FUNCTIONAL DESCRIPTION
Record (REC)/electric to electric (EE) mode
LUMINANCE
Playback (PB)/video to video (VV) mode
LUMINANCE
The FM signal is fed via FM AGC and double limiter to the
controlled FM demodulator. After demodulation and
filtering in sub low-pass filter (SUBLPF) main
de-emphasis, YLPF and non-linear de-emphasis the
signal is fed to the vertical noise reduction (YNR) and in
parallel to the sync separator. The chrominance signal is
added in the Y/C mixer. The complete CVBS signal is
available at pin 41.
From input pin 43 the CVBS signal is fed via the automatic
gain control (AGC) and subclamp (SCL) to the output
pin 41. Instead of the controlled and clamped CVBS signal
it is also possible to switch (dependent on the level at
pin 42) white, black or sync-level to this pin. To eliminate
chrominance parts the CVBS signal is fed to the luminance
low-pass filter (YLPF) and to the sync separator stage.
The sync signal is available at pin 45. The signal is also fed
via vertical emphasis non-linear emphasis (NLE),
CHROMINANCE
deviation control stage, main emphasis and white-dark clip
to the FM modulator. The FM signal is available at pin 11.
The 627 kHz chrominance signal coming from tape via
BPF 627 kHz and field ACC to the balanced mixer. Mixed
with 5.06 MHz the 4.43 MHz chrominance signal is fed via
comb driver stage to the external comb filter (pin 35) and
via internal conjugated complex (C*) stage and internal AC
coupling to the luminance part.
CHROMINANCE
The chrominance signal is selected out of CVBS (from
pin 43) in BPF 4.43 MHz (band-pass filter) and controlled
in automatic chrominance control (ACC).
The chrominance signal is mixed with 5.06 MHz to
627 kHz and via LPF 627 kHz to the output pin 30.
Record and playback
In both modes record (REC) and playback (PB) the
5.06 MHz mixer frequency is produced by the 20.24 MHz
voltage controlled oscillator (VCO) and a divide-by-four.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS
VCC supply voltage
MIN.
TYP.
MAX.
6.0
UNIT
0
0
0
−
−
−
−
−
−
−
−
−
−
V
V
V
VI
input voltage at pin 22
1.6
Vn
input voltage on all other pins
input current at pin 22
VCC
10
II
mA
mW
°C
Ptot
Tstg
Tamb
Ves
total power dissipation
1250
+150
+70
+300
storage temperature
−25
operating ambient temperature
electrostatic handling for all pins
−20
°C
note 1
−300
V
Note
1. Charge device model class B: discharging a 200 pF capacitor via a 0 Ω series resistor.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
43
UNIT
K/W
thermal resistance from junction to ambient in free air
1996 Oct 14
7
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
CHARACTERISTICS
VCC = 5 V; Tamb = +25 °C and typical application (see Figs 1 and 2), unless otherwise specified.
Luminance part: All amplitudes are VBS peak-to-peak values, unless otherwise specified.
Chrominance part: All amplitudes for PAL and NTSC are red values with 75% saturation and chrominance-to-burst ratio
of 2.2 : 1, unless otherwise specified.
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCC
IPB
supply voltage
4.5
5.0
5.5
V
current consumption
(I10 + I29 + I40)
playback mode
140
170
200
mA
IREC
current consumption
(I10 + I29 + I40)
record mode
125
155
185
mA
FM SUPPLY (PIN 10)
IPB
DC playback current
DC record current
−
−
22
12
−
−
mA
mA
IREC
CHROMINANCE SUPPLY (PIN 29)
ICC(C)
DC supply current
playback mode
record mode
−
−
85
85
−
−
mA
mA
LUMINANCE SUPPLY (PIN 40)
IPB
DC playback current
DC record current
−
−
63
57
−
−
mA
mA
IREC
Picture control/edit switch input (pin 1)
V1 DC input voltage
pin open-circuit
sharp picture
soft picture
−
1.6
−
−
V
V
V
V
0
1.6
3.2
5.0
1.6
4.1
−
edit mode
−
Deviation/playback AGC detector input (pin 2)
V2 detection voltage
Test pin 2/correlation detector output (pin 3)
1.8
2.5
3.2
V
VOH
HIGH level output voltage
correlation of Y signal;
pin 37 LOW; RL ≥ 10 kΩ
1.5
2.1
0.1
3.0
0.5
V
V
VOL
LOW level output voltage
non-correlation of Y signal
−
1996 Oct 14
8
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Negative feedback input of main emphasis (pin 4; open-base) and main emphasis
output/white-clip/modulator/SQPB selector (pin 5)
FEEDBACK LOOP CLOSED (PIN 4 CONNECTED TO PIN 5; MAIN EMPHASIS OFF)
VSY
DC voltage level
sync tip
−
1.9
−
V
VoREC(p-p)
record output voltage level; video/sync = 7/3;
450
500
550
mV
standard output level
(peak-to-peak value)
∆VCC = ±0.25 V;
Tamb = −10 to +70 °C
tFRAMEDET
time for correcting carrier
interleave relationship to
half picture
HIGH during half picture 1; note 1 −
−
200
ms
NON-LINEAR EMPHASIS/DETAIL ENHANCER; notes 2 and 3
RD1
RD2
RS1
RS1
RL1
RL2
RL3
response D1
response D2
response S1
response S2
response L1
response L2
response L3
−20 dB; fi = 500 kHz; SP; NORM 1.7
2.7
7.5
1.7
5.5
4.4
9.0
2.3
3.7
9.0
2.4
6.5
5.7
11
dB
dB
dB
dB
dB
dB
dB
−20 dB; fi = 2 MHz; SP; NORM
−20 dB; fi = 500 kHz; SP; EDIT
−20 dB; fi = 2 MHz; SP; EDIT
−20 dB; fi = 500 kHz; LP
−20 dB; fi = 2 MHz; LP
6.0
1.0
4.5
3.1
7.0
1.6
0 dB; fi = 2 MHz; LP
3.0
VERTICAL EMPHASIS
PL1
PL2
PL3
peak level 1
−30 dB recursive; note 4
−20 dB recursive; note 4
0 dB recursive
3.5
3.5
0
4.3
4.0
0.4
5.3
4.5
1.0
dB
dB
dB
peak level 2
peak level 3
FEEDBACK LOOP NORMAL APPLICATION
DCL
WCL
V5
dark-clip level
50
60
187
−
70
194
−
%
%
V
white-clip level
SQPB input voltage
180
4.0
playback mode
Record storage capacitor for f0 processor and playback storage capacitor for envelope detector (pin 7)
VI
DC voltage
DC voltage of normal mode playback mode;
Vi = 350 mV (p-p); pin 14 HIGH
playback mode
record mode
−
1.2
3.3
−
V
V
VNOR
2.3
4.0
VOFF
VNS
DC voltage of dropout
0
−
1.3
2.1
−7
V
correction (DOC) off mode
DC voltage at no input
signal
playback mode
1.1
−13
1.6
−10
V
GEon
envelope detector
switch-on level
(dropout active)
playback mode;
0 dB = Vi = 350 mV (p-p);
fi = 3.8 MHz; pin 14 HIGH
dB
tenv
envelope detector operating Ci = 0.1 µF
380
500
620
µs
time
1996 Oct 14
9
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Main de-emphasis output (pin 8; open collector)
V8
DC output voltage
fi = 3.8 MHz at VHS
2.9
3.4
3.9
V
VVID(p-p)
video output voltage level
(peak-to-peak value)
fDEV = 1 MHz
230
300
370
mV
ΦDEM
demodulator sensitivity
VHS mode
SQPB mode
VHS mode
0.23
0.14
0.97
0.3
0.37
0.24
1.03
V/MHz
V/MHz
0.19
1.0
LIN1
demodulator linearity 1
V0 (5 MHz) – V0 (4 MHz)
--------------------------------------------------------------------
V0 (4 MHz) – V0 (3 MHz)
LIN2
demodulator linearity 2
SQPB mode
0.90
1.0
1.07
V 0 (9 MHz) – V0 (7 MHz)
--------------------------------------------------------------------
V0 (7 MHz) – V0 (5 MHz)
Main de-emphasis and peaking output (pin 9)
V9
DC output voltage
fi = 3.8 MHz at VHS
1.1
1.6
2.1
V
VVR(p-p)
reverse video voltage level
(peak-to-peak value)
230
300
370
mV
αDEM
suppression of
40
−
−
dB
demodulated carrier
FM output (pin 11)
V11
DC mean value output
voltage
RL = 1 kΩ
2.9
0.7
3.2
0.9
3.5
1.1
V
V
V11(p-p)
output voltage level
(peak-to-peak value)
RL = 1 kΩ
fsync
sync output frequency
V5 = Vsync; V43 = 0 dB
3.75
3.8
3.85
+20
MHz
kHz
∆fsync
stability of sync output
frequency
∆VCC = ±0.25 V
or Tamb = −10 to +70 °C
−20
−
fdev
frequency deviation
V5 = Vwhite; V43 = 0 dB;
video/sync = 7/3
0.95
1.0
−
1.05
+20
8.8
MHz
kHz
kHz
dB
∆fdev
∆frot
stability of frequency
deviation
∆VCC = ±0.25 V
or Tamb = −10 to +70 °C
−20
carrier interleave frequency rotary pulse (pin 19) HIGH/LOW; 6.8
at SP and LP
7.8
H2
second harmonic distortion fi = 3.8 MHz
modulator linearity
−
−50
−42
Lmod
0.95
1.00
1.05
1996 Oct 14
10
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Switch: PB/TRICK/REC (pin 12)
RI
internal resistance to
ground
40
50
60
kΩ
VPB
VTR
VREC
voltage range for active
playback mode
3.5
1.75
0
−
−
−
5
V
V
V
voltage range for active
trick mode
3
voltage range for active
record mode
1.25
Playback FM input (pin 13)
V13
DC voltage
1.7
63
−
2.2
200
350
−
2.7
632
−
V
Vi(p-p)
input voltage level
(peak-to-peak value)
FM AGC active
mV
mV
mV
FM AGC not active; pin 14 HIGH
fi = 3.8 MHz; pin 14 HIGH
ViBO(p-p)
GDOC
∆Ghys
GEon
boundary input voltage
(peak-to-peak value)
10
1000
DOC on level
Vi = 350 mV (p-p); fi = 3.8 MHz;
pins 7 and 14 HIGH
−18
1
−15
3
−12
5
dB
dB
dB
DOC on/off hysteresis
Vi = 350 mV (p-p); fi = 3.8 MHz;
pins 7 and 14 HIGH
envelope detector
switch-on level
playback mode;
0 dB = Vi = 350 mV (p-p);
fi = 3.8 MHz; pin 14 HIGH
−13
−10
−7
Storage capacitor for FM AGC (pin 14; playback mode)
V14
DC voltage
AGC on
AGC off
2.6
4.3
3.1
3.6
5.0
V
V
DC input voltage
−
Switch LP C*/LP/SP at PAL; EP/LP/SP at NTSC (pin 15)
RI
internal resistance to
ground
40
50
60
5
kΩ
VC
input voltage for active C*
(conjugated complex
chrominance signal)
PAL
3.5
−
V
VE
VL
VS
input voltage for active EP
input voltage for active LP
input voltage for active SP
NTSC
3.5
1.75
0
−
−
−
5
V
V
V
3
1.25
1996 Oct 14
11
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Colour killer terminal (pin 16)
VNC
V16
DC voltage black and white luminance input without
chrominance
1.6
1.8
2.0
V
input voltage
forced colour off
forced colour on
colour on
0
−
1.5
4.3
2.4
−35
V
V
V
3.0
2.0
−25
−
Vth
threshold voltage
2.2
−30
CKth
colour killer threshold
relative to nominal input;
dB
V30 = 110 mV (p-p)
CKhys
colour killer hysteresis
relative to nominal input;
V30 = 110 mV (p-p)
1
3
5
dB
Frequency correction output (pin 17)
V17
operating range
0.8
±12
−
−
4.2
±22
−
V
IoSLD
tSLD
fSLH
SLD output current
SLD pulse duration
SLD
SLD
±17
1
µA
tH
start of detection at positive SLD/PAL
frequency deviation
(referenced to fsc + N × fH at
pin 35; −I17)
1.0
2.0
2.0
4.0
3.0
5.0
kHz
kHz
SLD/NTSC
fSLL
start of detection at
negative frequency
deviation (referenced to
SLD/PAL
−3.0
−5.0
−2.0
−4.0
−1.0
−2.0
kHz
kHz
SLD/NTSC
fsc + N × fH at pin 35; +I17)
IofDET
tfDET
output current of frequency FDET
detector
±12
68
±17
73
±22
78
µA
µs
frequency detector pulse
duration
FDET
ffDETH
start of detection at positive record mode
frequency deviation
40
70
100
kHz
(referenced to fsc + N × fH at
pin 35; −I17)
ffDETL
start of detection at
record mode
−100
−70
−40
kHz
negative frequency
deviation (referenced to
fsc + N × fH at pin 35; +I17)
1996 Oct 14
12
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Burst gate pulse output (or sandcastle output; pin 18); note 5
tBGP
tBGS
burst gate pulse duration
4.2
4.45
4.7
µs
start of burst gate beyond
sync start at pin 45
3.25
3.5
3.75
µs
VO(L)
LOW level DC output
voltage
inactive; I18 = 1 mA
inactive; I18 = 0 mA
−
−
0.7
0.5
3.0
V
V
V
−
−
VO(M)
VO(H)
medium level DC output
voltage
horizontal blanking;
10 kΩ connected to VCC
2.2
2.6
HIGH level DC output
voltage
BGP; I18 = −0.4 mA
4.0
4.6
−
4.4
−
−
−
−
V
V
tH
BGP; I18 = 0 mA
tVBL(start)
tVBL(stop)
vertical blanking of BGP
start
referring to first equalisation
pulse in mid of line
0
vertical blanking of BGP
stop
referring to rotary transition
23
1
−
−
−
−
tH
tH
referring to last equalisation pulse
in mid of line
Rotary pulse input (pin 19; open PNP base)
VC2
voltage for −90° phase
rotation
channel 2
0
−
−
2.25
5
V
V
VC1
voltage for non-rotation
(PAL) or +90° rotation
(NTSC)
channel 1
2.75
Loop filter VXO (pin 20; record mode)
V20
DC voltage
1
2.4
3.6
V
ΦVXO
fPI(U)
fPI(L)
VXO sensitivity
−1.6
0.6
−1.8
−1.2
1.0
−0.8
1.8
Hz/mV
kHz
kHz
upper pull-in frequency
lower pull-in frequency
−1.0
−0.6
Loop filter VCO (pin 21)
V21
DC voltage
1.3
2.1
2.9
V
ΦVCO
VCO sensitivity
fH related; record mode
−34
−1.3
−38
−1.5
−42
−1.7
kHz/V
MHz/V
fsc related; playback mode
fsc output (pin 23)
V23
DC output voltage
1.8
2.3
2.8
V
Vo(p-p)
output signal voltage
(peak-to-peak value)
no load
500
600
700
mV
H2
H3
second harmonic distortion
third harmonic distortion
−
−
−
−
−25
−20
dB
dB
VXO input from crystal (pin 24); note 6
V24
DC voltage
2.6
3.0
3.4
V
1996 Oct 14
13
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VXO output to crystal (pin 25)
V25
DC output voltage
2.9
3.3
3.7
V
∆fosc
deviation of oscillator
frequency
due to internal spread;
playback mode
−50
−
+50
Hz
video signal without burst;
record mode
−1.4
−
+1.4
kHz
no video signal; record mode
−100
−100
−
−
+100
+100
Hz
Hz
VCC = 4.75 to 5.25 V;
Tamb = −10 to +70 °C;
playback mode
2fsc output (pin 26)
V26
Vo
DC output voltage
output signal voltage
4.5
40
4.9
55
−
V
1.2 kΩ connected to VCC and
70
mV
emitter follower (EF)
tuned LC circuit to VCC and EF
400
550
700
mV
dB
H2
second harmonic distortion tuned LC circuit (Q > 20) and EF
−
−
−30
fH/2 output; coupled to burst sequence (pin 27)
VO(L)
LOW level DC output
voltage
burst phase = +135°
burst phase = −135°
NTSC; playback mode
−
−
−
−
0.5
−
V
V
V
VO(H)
HIGH level DC output
voltage
4.5
−
VNTSC4.43
input level for forced
1.5
NTSC 4.43 mode (no NAP)
Chrominance output to tape (pin 28); see Table 2
V28
DC output voltage
colour on
2.1
−
2.4
0.1
660
2.7
0.3
932
V
colour killer active
V
Vo(p-p)
chrominance output signal record mode; PAL
voltage (N × fH)
467
mV
(peak-to-peak value)
GUP
H2
SECAM-fOR burst related
to PAL burst
SECAM
0.2
1.0
1.8
dB
second harmonic distortion V33 = 0 dB
V33 = +6 dB
−
−
−
−
−
−
−40
−35
−40
−35
−
dB
dB
dB
dB
dB
−
H3
third harmonic distortion
V33 = 0 dB
−
V33 = +6 dB
−
αCK
colour killer suppression
40
Playback chrominance input from tape (pin 30)
V30
DC voltage
1.7
−
2.2
−
2.7
V
Vi(p-p)
input signal voltage
(peak-to-peak value)
chrominance + FM
chrominance
310
220
mV
mV
11
110
1996 Oct 14
14
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
ACC output (pin 32); see Table 5
V32
DC output voltage
1.75
2.25
2.75
V
Vo(p-p)
controlled output signal
voltage
(peak-to-peak value)
Vi = 0 dB; record mode
370
350
460
440
550
530
mV
mV
Vi = 0 dB; playback mode; PAL;
−15 dB comb filter
∆Go
deviation of output signal
Vi = −15 dB/+6 dB;
−1.0
−
+1.0
dB
record and playback modes
H2
H3
second harmonic distortion nominal input and output signal
−
−
−
−
−40
−40
dB
dB
third harmonic distortion
nominal input and output signal
Balanced mixer input (pin 33)
V33
DC voltage
1.6
1.9
2.2
V
Vi(p-p)
nominal input signal voltage
(peak-to-peak value)
−
440
−
mV
Switch SECAM/NTSC/PAL (pin 34)
RI
internal resistance to
ground
40
50
60
kΩ
Vi
input voltage
active SECAM mode
active NTSC mode
active PAL mode
3.5
1.75
0
−
−
−
5
V
V
V
3
1.25
Comb driver output (pin 35); see Tables 3, 4 and 10
V35
DC output voltage
record and playback modes
2.0
2.5
3.0
V
Vo(p-p)
output signal voltage
(peak-to-peak value)
playback mode; NTSC;
−10 dB comb filter
304
380
456
mV
playback mode; PAL/SECAM;
540
675
810
mV
−15 dB comb filter
H2
second harmonic distortion playback mode; 0 dB
−
−
−40
−40
−4.0
−3.0
−
dB
dB
dB
dB
dB
H3
third harmonic distortion
burst down
playback mode; 0 dB
−
−
∆GBD(S)
∆GBD(E)
GSECid
playback mode; NTSC; SP
playback mode; NTSC; EP
−6.0
−5.0
−
−5.0
−4.0
3.0
burst down
gain of output signal for
SECAM identification
record mode (ACC is not active)
from pin 43
Chrominance input from comb filter (pin 36)
VGL
DC voltage for glass comb AC coupled
3.2
0
4.0
−
4.8
1.5
−
V
VCCD
Vi(p-p)
DC voltage for CCD comb
DC coupled
PAL; NTSC
V
input signal voltage
(peak-to-peak value)
−
120
mV
1996 Oct 14
15
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Playback chrominance output (pin 38; sync blanking is always active); see Table 6
V38
DC output voltage
1.1
1.6
2.1
V
Vo(p-p)
output signal voltage
(peak-to-peak value)
V30 = 110 mV (p-p)
270
325
420
mV
H2
second harmonic distortion V30 = 110 mV (p-p)
−
−
−
−40
dB
dB
αCK
colour killer/pilot burst
suppression
colour killer or sync blanking
interval
40
−
∆VC*
∆ϕC*
∆ϕNAP
α2fsc
α3fsc
output amplitude deviation C to C*; V36 = 120 mV (p-p)
−1.5
−15
±30
35
0
+1.5
+15
±60
−
dB
°
output phase deviation
phase for NAP burst
2fsc suppression
C to C* or NAP line n to n + 1
NAP burst to −(B − Y) axis
C*; V36 = 120 mV (p-p)
0
±45
−
°
dB
dB
3fsc suppression
C*; V36 = 120 mV (p-p)
18
25
−
Playback chrominance input (pin 39)
V39
DC voltage
1.7
2.0
2.3
V
Vi(p-p)
input voltage
−
325
−
mV
(peak-to-peak value)
Vth
threshold level of AGCKP1 record mode
(no reaction on copy guard)
2.6
3.0
3.4
V
CVBS output (pin 41); see Table 7
V41
DC output voltage
sync tip; RL = 2.1 kΩ
0.9
1.05
2.14
1.2
V
V
RECORD MODE
VoREC(p-p)
record output voltage
(standard output level)
(peak-to-peak value)
video/sync = 7/3; RL = 2.1 kΩ
2.03
2.25
∆VoREC(p-p) record output voltage level ∆VCC = ±0.25 V or
−40
−
+40
mV
V
stability
Tamb = −10 to +70 °C
(peak-to-peak value)
Vo(p-p)
compressed sync output
voltage (200 IRE)
video/sync = 7.0/1.5
2.13
2.32
2.52
(peak-to-peak value)
GCON
control characteristic of
AGC
V43 = 0.5 to 2.0 V (p-p)
0
0.2
1.0
48
dB
%
∆VCG
VHS standard
(signal amplitude for
copy guard tapes)
100% = typical output level;
copy guard 7 lines/field
35
−
1996 Oct 14
16
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PLAYBACK MODE
VoPB(p-p)
playback output voltage
(peak-to-peak value)
video/sync = 7/3; nominal FM
signal; RL = 2.1 kΩ; test: EE
without ME, MDE, peaking, YNR
2.03
2.14
2.25
V
∆VoPB(p-p)
playback output voltage
level stability
∆VCC = ±0.25 V or
Tamb = −10 to +70 °C
−40
−
+40
mV
(peak-to-peak value)
VNC
white noise clip level
black-to-white = 100%; TRICK
0 dB = 2.0 V (p-p); fi = 1 MHz
115
135
150
+25
%
∆Vos
offset voltage between
DOC mode and normal
mode
−25
−
mV
αct
DOC switch crosstalk
−
−
−
−40
dB
tatt
attack time of switching to
DOC mode from normal
mode
0.7
1.0
µs
trec
recovery time of switching
to normal mode from DOC
mode
4.0
1.0
−2
5.0
1.2
−
6.0
1.4
+2
µs
V
Vo(p-p)
chrominance output
voltage
(peak-to-peak value)
V30 = 110 mV (p-p)
∆GCHROM
chrominance frequency
response
Vi = V39; fi = 5 to 1 MHz
dB
VERTICAL SYNCHRONIZATION PULSE/CHARACTER INSERT (RECORD AND PLAYBACK MODES)
∆VST
artificial sync tip level
voltage offset
V42 = 0 to 5 V; playback mode
−50
0.58
1.7
40
0
+50
0.78
2.05
−
mV
V
∆Vbl(p-p)
∆Vwh(p-p)
αVIDEO
artificial black level voltage V42 = 5 to 3 V
(peak-to-peak value)
0.68
1.9
−
artificial white level voltage V42 = 5 to 2 V
(peak-to-peak value)
V
suppression of video at
character insert
dB
NON-LINEAR DE-EMPHASIS (PLAYBACK MODE); note 7
S1
S2
L1
L2
L3
response S1
response S2
response L1
response L2
response L3
−20 dB; fi = 500 kHz; SP
−20 dB; fi = 2 MHz; SP
−20 dB; fi = 500 kHz; LP
−20 dB; fi = 2 MHz; LP
0 dB; fi = 2 MHz; LP
−2.9
−6.5
−6.5
−10.2
−4.8
−1.9
−5.0
−4.8
−8.4
−3.2
−0.9
−3.5
−3.0
−6.7
−1.8
dB
dB
dB
dB
dB
NOISE CANCELLER (PLAYBACK MODE); note 8
NC1
response NC1
response NC2
response NC4
response NCEDIT
−30 dB; fi = 1 MHz; NORMAL
−30 dB; fi = 2 MHz; NORMAL
0 dB; fi = 2 MHz; NORMAL
−30 dB; fi = 2 MHz; EDIT
−5.5
−15.0
−1.3
−5.0
−3.5
−11.6
−0.3
−3.4
−1.4
−8.0
+0.7
−1.8
dB
dB
dB
dB
NC2
NC4
NCED
1996 Oct 14
17
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
LINE NOISE CANCELLER (YNR WEAK; PLAYBACK MODE); note 9
LNC1
LNC2
LNC3
depth 1
depth 2
depth 3
−30 dB non-recursive
−20 dB non-recursive
0 dB non-recursive
−7.0
−5.5
−4.5
dB
−4.3
−1.0
−3.3
−0.2
−2.3
dB
dB
0
VERTICAL NOISE CANCELLER (YNR STRONG; PLAYBACK MODE); note 9
VNC1
VNC2
VNC3
depth 1
depth 2
depth 3
−30 dB recursive
−20 dB recursive
0 dB recursive
−10.0
−9.0
−1.8
−8.5
−7.5
−0.4
−7.5
−6.5
0
dB
dB
dB
PICTURE CONTROL; (note 10)
PC1
PC2
PC3
PC4
PC5
response 1 (sharp)
V1 = 0 V; fi = 0.5 MHz
V1 = 0 V; fi = 2 MHz
V1 = 3.2 V; fi = 0.5 MHz
V1 = 3.2 V; fi = 2 MHz
0
0.5
1.0
dB
dB
dB
dB
dB
response 2 (sharp)
response 3 (soft)
response 4 (soft)
response 5 (centre)
3.7
4.7
5.7
−2.3
−6.8
−0.5
−1.3
−5.8
+0.0
−0.8
−4.8
+0.5
pin 1 open-circuit or > 4.1 V;
fi = 2 MHz
td
delay time
pin 1 open-circuit; fi = 0.1 MHz
185
210
235
ns
Character insert (artificial sync/black/white/through; pin 42)
Ri
internal resistance to
ground
V42 = 0 to 1.0 V
40
50
−
60
kΩ
V
VAS
VAB
VAW
VTHR
input voltage for artificial
sync (inserts sync level)
4.0
2.75
1.5
0
5.0
3.5
2.25
1.0
input voltage for artificial
black (inserts black level)
−
V
input voltage for artificial
white (inserts white level)
−
V
input voltage for through
mode
−
V
CVBS input (pin 43)
V43
DC voltage
2.35
0.3
2.75
1.0
3.15
2.0
V
V
Vi(p-p)
CVBS input voltage
(peak-to-peak value)
AGC detector (pin 44)
V44
detector voltage
V43 = 1 V (p-p)
1.8
2.5
3.2
V
1996 Oct 14
18
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Sync separator push-pull output (pin 45)
VO(H)
VO(L)
tdFE
HIGH level output voltage
LOW level output voltage
front edge delay time
RL = 2 kΩ to ground
4.5
−
−
−
V
V
RL = 10 kΩ to VCC
−
0.3
referenced to sync start pin 48;
note 11
600
750
350
33
900
ns
ns
%
tdBE
back edge delay time
referenced to sync end pin 48;
note 11
100
26
600
40
Φsync
input sensitivity
sync-to-black = 100%
(slicing level for sync)
Sync separator detector (pin 46)
V46 detector voltage
YNR switch (pin 47); see Table 11
2.3
40
−
3.3
60
V
RI
internal resistance to
ground
50
kΩ
V47
input voltage
YNR off mode
YNR1 mode
YNR2 mode
3.5
1.75
0
−
−
−
5.0
V
V
V
3.0
1.25
Video input from 1HDL CCD (pin 48)
V48
DC voltage
1.5
1.9
2.3
V
Vi(p-p)
input voltage for constant
output signal at pin 49
(peak-to-peak value)
178
283
449
mV
Video output to 1HDL CCD (pin 49)
VoST
sync tip output voltage
0.9
1.4
1.9
V
Vo(p-p)
output voltage
CCD with −3 dB (record mode)
380
420
460
mV
(peak-to-peak value)
Storage capacitor for CCD level AGC (pin 50)
V50
DC voltage
1.4
0
2.1
3
2.8
6
V
GCCD
CCD gain control range
dB
Low-pass filter input for noise canceller (pin 52)
V52
DC voltage
1.0
1.2
1.4
V
1996 Oct 14
19
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
Notes to the characteristics
1. 50 Hz; rotary transition 8 to 4 lines beyond vertical pulse.
2. Test mode; YNR off; main emphasis off; V50 = 1.5 V (minimum gain).
3. Input: V48 = 143 mV sync and 0 dB = V48 = 333 mV picture. Output: 0 dB = V5 picture at ≤50 kHz and given input
level.
4. Input: V43 = 300 mV sync and 0 dB = V43 = 700 mV picture. Output: 0 dB = V5 picture at 1, 2 and 3 × fH and given
input level.
5. Burst gate pulse output with no external components; sandcastle output with 10 kΩ resistor to VCC
.
6. Crystal characteristics: TEW 8H:
fnom = 4.433619 MHz ± 15 × 10−6; RS ≤ 90 Ω; C1 = 11 fF; L1 = 117.14791 mH; C0 = 2.6 pF.
7. Input: V8 = 90 mV sync and 0 dB = V8 = 210 mV picture. Output: 0 dB = V41 at ≤50 kHz and given input level.
Noise canceller off; picture control centre; YNR off; measured with YLPF.
8. Input: V8 = 90 mV sync and 0 dB = V8 = 210 mV picture. Output: 0 dB = V41 at 100 kHz and given input level.
Picture control centre; NLDE off; YNR off. Pin 52: R = 1.3 kΩ; C = 47 nF (parasitic capacitance: 5 pF from
pin 52 to GND).
9. Input: V8 = 90 mV sync and 0 dB = V8 = 210 mV picture. Output: 0 dB = V41 at 1, 2 and 3 × fH and given input level.
Picture control at centre; NC off; NLDE off.
10. Input: V8 = 90 mV sync and V8 = 67 mV picture. Output: 0 dB = V41 at 100 kHz referring to YNRMIX signal at pin 3
of the same frequency. Noise canceller off; YNR off; NLDE off.
11. Input: V48 = 143 mV sync; V50 = 1.5 V; dropout or test mode forced DOC.
1996 Oct 14
20
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
CHROMINANCE FILTER CHARACTERISTICS
Table 2 Low-pass filter 630 kHz; frequency response pin 33 to pin 28
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PAL; NTSC/REC
∆G1
∆G2
∆G3
∆G4
∆G5
∆G7
td
frequency response 1
frequency response 2
frequency response 3
frequency response 4
frequency response 5
frequency response 7
group delay 1
G(1 MHz)/G(0.2 MHz)
G(1.5 MHz)/G(0.2 MHz)
G(2 MHz)/G(0.2 MHz)
G(3 MHz)/G(0.2 MHz)
G(4.43 MHz)/G(0.2 MHz)
G(9.5 MHz)/G(0.2 MHz)
fi = 0.63 MHz
−4
−3
−2
dB
−9
−10
−
−7
−14
−
−5
dB
dB
dB
dB
dB
ns
−18
−25
−40
−35
375
−
−
−
−
295
335
SECAM; REC
∆G2
frequency response (2)
G(1.5 MHz)/G(0.2 MHz)
−5
−3
−1
dB
Table 3 Band-pass filter 4.43 MHz at record mode; frequency response pin 43 to pin 35
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PAL; NTSC/REC
∆G1
∆G2
∆G3
∆G4
∆G5
∆G6
td
frequency response 1
frequency response 2
frequency response 3
frequency response 4
frequency response 5
frequency response 6
group delay 1
G(<2.7 MHz)/G(4.43 MHz)
G(2.7 MHz)/G(4.43 MHz)
−
−
−
−
−22
−30
−1.8
−0.5
−30
−15
490
dB
dB
dB
dB
dB
dB
ns
G(3.93 MHz)/G(4.43 MHz) −3.8
G(4.93 MHz)/G(4.43 MHz) −2.5
−2.8
−1.5
−
G(6.2 MHz)/G(4.43 MHz)
G(>6.2 MHz)/G(4.43 MHz)
fi = 4.43 MHz
−
−
−
410
450
SECAM; REC
∆G7
frequency response 7
G(5.7 MHz)/G(4.43 MHz)
−
−
−25
dB
1996 Oct 14
21
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
Table 4 Band-pass filter 4.43 MHz at playback mode; frequency response pin 33 to pin 35 (test mode)
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PAL; NTSC/PB
∆G1
∆G2
∆G3
∆G4
∆G5
∆G6
∆G7
td
frequency response 1
frequency response 2
frequency response 3
frequency response 4
frequency response 5
frequency response 6
frequency response 7
group delay 1
G(<2.7 MHz)/G(4.43 MHz)
G(2.9 MHz)/G(4.43 MHz)
−
−
−
−
−20
dB
−30
−1.7
−1.9
−25
−22
−15
525
dB
dB
dB
dB
dB
dB
ns
G(3.93 MHz)/G(4.43 MHz) −3.7
G(4.93 MHz)/G(4.43 MHz) −3.9
−2.7
−2.9
−30
−
G(5.7 MHz)/G(4.43 MHz)
G(6 MHz)/G(4.43 MHz)
G(>6 MHz)/G(4.43 MHz)
fi = 4.43 MHz
−
−
−
−
445
485
SECAM; PB
∆G8
frequency response 8
frequency response 9
G(1.9 MHz)/G(4.43 MHz)
G(5.5 MHz)/G(4.43 MHz)
−
−
−30
−30
−22
−22
dB
dB
∆G9
Table 5 Band-pass filter 630 kHz; frequency response pin 30 to pin 32 (test mode)
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PB
∆G1
∆G2
∆G3
∆G4
∆G5
∆G6
td
frequency response 1
frequency response 2
frequency response 3
frequency response 4
frequency response 5
frequency response 6
group delay 1
G(<100 Hz)/G(630 kHz)
G(100 kHz)/G(630 kHz)
G(930 kHz)/G(630 kHz)
G(1.5 MHz)/G(630 kHz)
G(2.3 MHz)/G(630 kHz)
G(>2.4 MHz)/G(630 kHz)
−
−
−20
−3
dB
dB
dB
dB
dB
dB
ns
−7
−3
−
−5
−2
−15
−
−1
−10
−40
−33
790
−170
−
−
−
fi = 630 kHz; pin 36 normal 710
V36 = 4 to 1 V −250
750
−210
∆td
group delay 4 difference
ns
Table 6 Low-pass filter C*; frequency response pin 36 to pin 38
SYMBOL
PB; C
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
∆G1
∆G2
∆G3
td
frequency response 1
frequency response 2
frequency response 3
group delay 1
G(5 MHz)/G(2 MHz)
G(13.3 MHz)/G(2 MHz)
G(>13.3 MHz)/G(2 MHz)
fi = 4.43 MHz
0
−1.5
−25
−
−3
−
dB
dB
dB
ns
−18
−18
65
−
95
125
1996 Oct 14
22
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
LUMINANCE FILTER CHARACTERISTICS
Table 7 Low-pass filter 4.43 MHz; frequency response pin 43 to pin 3 (test mode)
SYMBOL
REC
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
∆G1
∆G2
∆G3
td
frequency response 1
frequency response 2
frequency response 3
group delay 1
G(2 MHz)/G(0.2 MHz)
G(3 MHz)/G(0.2 MHz)
G(4.43 MHz)/G(0.2 MHz)
fi = 0.2 MHz
−1.0
+0.5
+1.5
dB
−2.5
−
−1.0
−40
750
+0.5
−30
790
dB
dB
ns
710
Table 8 Sub-low-pass filter; frequency response from FM demodulator to pin 9
SYMBOL
∆G1
PARAMETER
frequency response 1
frequency response 2
CONDITIONS
G(3 MHz)/G(0.2 MHz)
G(6 MHz)/G(0.2 MHz)
MIN.
−4.5
TYP.
MAX.
UNIT
−2
0
dB
dB
∆G2
−
−25
−15
Sensitivity
Table 9 Sensitivity of PB APC (multiplication factor for phase detector sensitivity)
PAL
NTSC/NAP
NTSC4.4
PROGRAM
NORM
SP
LP
SP
2(1)(2)
2(1)(2)
LP
2(1)(2)
2(1)(2)
EP
2(1)(2)
2(1)(2)
SP
LP
2(1)(2)
2(1)(2)
EP
2(1)(2)
2(1)(2)
2
2
1(2)
1(1)(2)
4(1)
2(1)(2)
TRICK
Notes
1. No alternating reference for APC loop.
2. Comb filter is inside the APC loop.
Burst down logic
Table 10 Burst down logic
MODE
SYSTEM
BURST DOWN
ON (−5.0 dB)
Playback
NTSC
SP
LP
EP
OFF
ON (−4.0 dB)
OFF
PAL
SECAM
OFF
1996 Oct 14
23
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
OPERATION MODE
Table 11 Operation mode (PART 1)
For PAL RECORD, SECAM ME RECORD, PAL PLAYBACK, SECAM ME PLAYBACK and NTSC PLAYBACK.
EP mode at NTSC PLAYBACK activates the same functions as LP mode.
EDIT OFF
EDIT ON
FILTER
YNR
MODE
CONDITIONS
SP
LP
SP
LP
REC
YNR off; pin 47 HIGH
OFF
OFF
OFF
OFF
YNR 1; pin 47 medium OFF
YNR 2; pin 47 LOW
OFF
vertical
emphasis
PB
YNR off; pin 47 HIGH
OFF
OFF
OFF
OFF
YNR 1; pin 47 medium VNC (strong)
LNC (weak)
YNR 2; pin 47 LOW
YNR off; pin 47 HIGH
YNR 1; pin 47 medium
YNR 2; pin 47 LOW
LNC (weak)
VNC (strong)
LNC (weak)
NLE(D)
NLE
REC
NLE(C) + DTE NLE(D)
NLE(C)
NLDE
PB
PB
NLDE(C)
ON
NLDE(D)
NLDE(C)
WEAK
NLDE(D)
Noise
canceller
Picture
control
PB
ON
ON
OFF
ON
FM carrier interleave
Table 12 Operation mode (PART 2)
FUNCTION
CONDITIONS
OPERATION
Clamps
REC
PB
ON
NORM
dropout;
OFF
maximum 128 lines
Character insert
REC or VIDEO; pin 42 LOW through
PB
WHITE; pin 42 = M1 white level (85%)
BLACK; pin 42 = M2 black level
SYNC; pin 42 HIGH
sync tip level
OFF
Search noise clip
SQPB
REC
PB
NORM
TRICK
ON
PB
VHS; pin 5
open-circuit
VHS
SQPB; pin 5 HIGH
SQPB
1996 Oct 14
24
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
Automatic chrominance control (ACC) characteristics
handbook, halfpage
MBG150
V
o(p-p)
(mV)
440
− 22
+ 6
V (dB)
i
0 dB is equivalent to 110 mv (p-p) at pin 30.
Fig.4 ACC characteristics.
1996 Oct 14
25
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G40
BM1G45
1996 Oct 14
26
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G06
BM1G36
BM1G38
BM1G57
BM1G56
1996 Oct 14
27
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G43
BM1G4
BM1G35
BM1G59
1996 Oct 14
28
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G3
BM1G35
BM1G07
BM1G58
BM1G54
1996 Oct 14
29
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G42
BM1G34
BM1G39
BM1G54
1996 Oct 14
30
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM4G1
BM1G32
BM1G37
BM1G49
1996 Oct 14
31
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM3G1
BM1G30
BM1G29
1996 Oct 14
32
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G27
BM1G04
BM1G03
1
1
MBG145
1996 Oct 14
33
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G0
BM1G09
BMG1
BM1G54
BM1G53
BM1G48
1996 Oct 14
34
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
MBG124
BM1G5
BM1G25
BM1G5
1
MBG135
1996 Oct 14
35
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G23
BM1G6
BM0G1
1
MBG135
1996 Oct 14
36
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G4
BM1G02
BM1G2
1
MBG135
1996 Oct 14
37
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G3
BM1G20
BM1G9
1
MBG125
1996 Oct 14
38
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM2G1
MBG17
BM1G2
BM1G47
1996 Oct 14
39
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G8
BM1G0
BM1G05
1
MBG164
1996 Oct 14
40
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
BM1G28
BM1G08
BM5G1
1996 Oct 14
41
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
PACKAGE OUTLINE
SDIP52: plastic shrink dual in-line package; 52 leads (600 mil)
SOT247-1
D
M
E
A
2
A
L
A
1
c
e
(e )
1
w M
Z
b
1
M
H
b
52
27
pin 1 index
E
1
26
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
max.
A
A
2
max.
(1)
(1)
Z
1
w
UNIT
b
b
c
D
E
e
e
L
M
M
H
1
1
E
min.
max.
1.3
0.8
0.53
0.40
0.32
0.23
47.9
47.1
14.0
13.7
3.2
2.8
15.80
15.24
17.15
15.90
mm
5.08
0.51
4.0
1.778
15.24
0.18
1.73
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
90-01-22
95-03-11
SOT247-1
1996 Oct 14
42
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum (Tstg max). If the printed-circuit
board has been pre-heated, forced cooling may be
necessary immediately after soldering to keep the
temperature within the permissible limit.
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Repairing soldered joints
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Soldering by dipping or by wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Oct 14
43
Philips Semiconductors – a worldwide company
Argentina: see South America
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Tel. +61 2 9805 4455, Fax. +61 2 9805 4466
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,
Tel. +43 1 60 101, Fax. +43 1 60 101 1210
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Belgium: see The Netherlands
Brazil: see South America
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. +48 22 612 2831, Fax. +48 22 612 2327
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 689 211, Fax. +359 2 689 102
Portugal: see Spain
Romania: see Italy
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 247 9145, Fax. +7 095 247 9144
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,
Tel. +65 350 2538, Fax. +65 251 6500
Colombia: see South America
Czech Republic: see Austria
Slovakia: see Austria
Slovenia: see Italy
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,
Tel. +45 32 88 2636, Fax. +45 31 57 1949
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615800, Fax. +358 9 61580/xxx
South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 829 1849
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.
Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722
Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,
Chung Hsiao West Road, Sec. 1, P.O. Box 22978,
TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444
Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,
Tel. +972 3 645 0444, Fax. +972 3 649 1007
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Uruguay: see South America
Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
Middle East: see Italy
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Internet: http://www.semiconductors.philips.com
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1996
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/50/02/pp44
Date of release: 1996 Oct 14
Document order number: 9397 750 01024
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