TDA9801TD-T [NXP]
IC FM, AUDIO/VIDEO DEMODULATOR, PDSO20, Receiver IC;
| 型号： | TDA9801TD-T |
| 厂家： | 
NXP |
| 描述： | IC FM, AUDIO/VIDEO DEMODULATOR, PDSO20, Receiver IC 光电二极管 商用集成电路 |
| 文件： | 总32页 (文件大小：157K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA9801
Single standard VIF-PLL
demodulator and FM-PLL detector
Product specification
1999 Aug 26
Supersedes data of 1998 May 06
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
FEATURES
• Stabilizer circuit for ripple rejection and to achieve
constant output signals
• Suitable for negative vision modulation
• 5 to 9 V positive supply voltage range
• Applicable for IF frequencies of 38.9, 45.75 and
58.75 MHz
• Low power consumption of 300 mW at 5 V supply
voltage.
• Gain controlled wide-band Vision Intermediate
Frequency (VIF) amplifier (AC-coupled)
GENERAL DESCRIPTION
• True synchronous demodulation with active carrier
regeneration (ultra-linear demodulation, good
intermodulation figures, reduced harmonics and
The TDA9801(T) is a monolithic integrated circuit for vision
and sound IF signal processing in TV and VTR sets and
multimedia front-ends.
excellent pulse response)
• Peak sync pulse AGC
• Video amplifier to match sound trap and sound filter
• AGC output voltage for tuner with fixed resistor for
takeover point setting
• AFC detector without extra reference circuit
• Alignment-free FM-PLL detector with high linearity
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
TDA9801
DIP20
SO20
plastic dual in-line package; 20 leads (300 mil)
SOT146-1
SOT163-1
TDA9801T
plastic small outline package; 20 leads; body width 7.5 mm
1999 Aug 26
2
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
QUICK REFERENCE DATA
SYMBOL
PARAMETER
supply voltage
supply current
CONDITIONS
MIN.
4.5
TYP.
MAX. UNIT
VP
IP
note 1
5.0
61
50
9.9
70
90
V
VP = 9 V
52
mA
µV
Vi(sens)(VIF)(rms) sensitivity of VIF input signal
(RMS value)
−1 dB video at output;
fPC = 38.9 or 45.75 MHz
−
Vi(max)(rms)
maximum input voltage
(RMS value)
+1 dB video at output;
fPC = 38.9 or 45.75 MHz
70
150
−
mV
GIF
IF gain control
fPC = 38.9 or 45.75 MHz
VP = 5 V
64
70
dB
V
Vo(CVBS)(p-p)
CVBS output voltage
(peak-to-peak value)
1.7
2.0
2.3
Bv(−3dB)
S/NW
−3 dB video bandwidth
CL < 20 pF; RL > 1 kΩ
VP = 5 V; note 2
for BLUE
6
8
−
−
−
MHz
dB
weighted signal-to-noise ratio
56
56
60
62
αIM(0.92/1.1)
intermodulation attenuation at
f = 0.92 or 1.1 MHz
dB
αIM(2.76/3.3)
αH(sup)
intermodulation attenuation at
f = 2.76 or 3.3 MHz
for BLUE
note 3
56
62
40
−
−
dB
dB
V
harmonics suppression in video
signal
35
−
Vo(AF)(max)(rms) maximum output AF signal
handling voltage (RMS value)
THD < 1.5%
0.8
−20
−
Tamb
ambient temperature
−
+70
°C
Notes
1. Values of video and sound parameters can be decreased at VP = 4.5 V.
2. S/N is the ratio of the black-to-white amplitude to the black level noise voltage (RMS value) at pin CVBS.
B = 5 MHz weighted in accordance with “CCIR 567” at a source impedance of 50 Ω.
3. Measurements taken with SAW filter G1962; VSB modulation; fvideo > 0.5 MHz; loop bandwidth BL = 60 kHz.
1999 Aug 26
3
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g
V
= 5 V (9 V)
P
2f
PC
V
AFC
15
P
VCO2
17
VCO1
16
TPLL
6
20
INTERNAL
REFERENCE
VOLTAGE
TRAVELLING
WAVE
DIVIDER
18
GND
9
AF
AF
AFC
DETECTOR
VCO
AMPLIFIER
10
DAF
C
DAF
3-STAGE
IF-AMPLIFIER
FM-PLL
DETECTOR
VIF1
VIF2
1
2
FREQUENCY
DETECTOR
AND PHASE
DETECTOR
VIDEO
DEMODULATOR
VIDEO
AMPLIFIER
LIMITER
AMPLIFIER
4
ADJ
TDA9801
sound
mute
AGC
DETECTOR
IF
AGC
TUNER
AGC
CVBS
7
BUFFER AMPLIFIER
AND NOISE CLIPPER
2 V (p-p)
3
13
19
8
11
5
14
12
TOP
TAGC
AGC
MUTE
n.c.
VSO
VI
SI
sound
mute
switch
takeover
point
SOUND
TRAP
SOUND
FILTER
R
C
TOP
AGC
video and
tuner AGC
intercarrier
1 V (p-p)
MHA879
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
PINNING
SYMBOL PIN
DESCRIPTION
VIF differential input 1
VIF1
VIF2
TOP
1
2
3
VIF differential input 2
tuner AGC TakeOver Point (TOP)
connection
handbook, halfpage
ADJ
4
5
6
7
8
9
phase adjust connection
sound mute switch connection
PLL time constant connection
CVBS (positive) video output
not connected
V
1
2
20
19
VIF1
VIF2
TOP
ADJ
P
MUTE
TPLL
CVBS
n.c.
AGC
3
18 GND
17
VCO2
4
16 VCO1
15 AFC
MUTE
TPLL
CVBS
n.c.
5
AF
AF output
TDA9801
6
DAF
10 AF amplifier decoupling capacitor
connection
VI
7
14
13 VSO
TAGC
SI
11 sound intercarrier input
12 tuner AGC output
8
TAGC
VSO
VI
9
12
11 SI
AF
13 video and sound intercarrier output
14 buffer amplifier video input
15 AFC output
10
DAF
MHA880
AFC
VCO1
VCO2
GND
AGC
VP
16 VCO1 reference circuit for 2fPC
17 VCO2 reference circuit for 2fPC
18 ground supply (0 V)
19 AGC detector capacitor connection
20 supply voltage (+5 V)
Fig.2 Pin configuration.
1999 Aug 26
5
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
FUNCTIONAL DESCRIPTION
3-stage IF amplifier
The voltage to set the VCO frequency to the actual double
vision carrier frequency is also amplified and converted for
the AFC output current.
The VIF amplifier consists of three AC-coupled differential
amplifier stages (see Fig.1). Each differential stage
comprises a feedback network controlled by emitter
degeneration.
The VCO signal is divided-by-2 with a Travelling Wave
Divider (TWD) which generates two differential output
signals with a 90 degree phase difference independent of
the frequency.
AGC detector, IF AGC and tuner AGC
Video amplifier
The automatic control voltage to maintain the video output
signal at a constant level is generated in accordance with
the transmission standard. Since the TDA9801(T) is
suitable for negative modulation only the peak sync pulse
level is detected.
The composite video amplifier is a wide bandwidth
operational amplifier with internal feedback. A nominal
positive video signal of 1 V (p-p) is present at pin VSO.
Buffer amplifier and noise clipper
The AGC detector charges and discharges capacitor CAGC
to set the IF amplifier and tuner gain. The voltage on
capacitor CAGC is transferred to an internal IF control
signal, and is fed to the tuner AGC to generate the tuner
AGC output current on pin TAGC (open-collector output).
The tuner AGC takeover point level is set at pin TOP. This
allows the tuner to be matched to the SAW filter in order to
achieve the optimum IF input level.
The input impedance of the 7 dB wideband CVBS buffer
amplifier (with internal feedback) is suitable for ceramic
sound trap filters. Pin CVBS provides a positive video
signal of 2 V (p-p). Noise clipping is provided internally.
Sound demodulation
LIMITER AMPLIFIER
The FM sound intercarrier signal is fed to pin SI and
through a limiter amplifier before it is demodulated.
The result is high sensitivity and AM suppression.
The limiter amplifier consists of 7 stages which are
internally AC-coupled in order to minimizing the DC offset.
Frequency detector and phase detector
The VIF amplifier output signal is fed into a frequency
detector and into a phase detector. During acquisition the
frequency detector produces a DC current proportional to
the frequency difference between the input and the VCO
signal. After frequency lock-in the phase detector
produces a DC current proportional to the phase
difference between the VCO and the input signal. The DC
current of either frequency detector or phase detector is
converted into a DC voltage via the loop filter which
controls the VCO frequency.
FM-PLL DETECTOR
The FM-PLL demodulator consists of an RC oscillator,
loop filter and phase detector. The oscillator frequency is
locked on the FM intercarrier signal from the limiter
amplifier. As a result of this locking, the RC oscillator is
frequency modulated. The modulating voltage (AF signal)
is used to control the oscillator frequency. By this, the
FM-PLL operates as an FM demodulator.
Video demodulator
The true synchronous video demodulator is realized by a
linear multiplier which is designed for low distortion and
wide bandwidth. The vision IF input signal is multiplied with
the ‘in phase’ component of the VCO output.
The demodulator output signal is fed via an integrated
low-pass filter (fg = 12 MHz) for suppression of the carrier
harmonics to the video amplifier.
AF AMPLIFIER
The audio frequency amplifier with internal feedback is
designed for high gain and high common-mode rejection.
The low-level AF signal output from the FM-PLL
demodulator is amplified and buffered in a low-ohmic
audio output stage. An external decoupling capacitor CDAF
removes the DC voltage from the audio amplifier input.
VCO, AFC detector and travelling wave divider
By using the sound mute switch (pin MUTE) the AF
amplifier is set in the mute state.
The VCO operates with a symmetrically connected
reference LC circuit, operating at the double vision carrier
frequency. Frequency control is performed by an internal
variable capacitor diode.
1999 Aug 26
6
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
MAX.
UNIT
VP
IP = 70 mA; Tamb = 70 °C;
maximum chip temperature
125 °C for TDA9801
128 °C for TDA9801T
0
0
9.9
9.9
V
V
Vn
voltage on
pins VIF1, VIF2, AFC and AGC
pin TAGC
0
VP
V
−
13.2
10
V
tsc(max)
Tstg
maximum short-circuit time
storage temperature
ambient temperature
electrostatic handling voltage
to ground or VP
note 1
−
s
−25
−20
+150
+70
+300
°C
°C
V
Tamb
Ves
−300
Notes
1. Machine model class B (L = 2.5 µH).
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient in free air
TDA9801
73
85
K/W
K/W
TDA9801T
CHARACTERISTICS
VP = 5 V; Tamb = 25 °C; see Table 1 for input frequencies and picture-to-sound carrier ratios; Vi(VIF)(rms) = 10 mV (sync
pulse level); IF input from 50 Ω via broadband transformer 1 : 1; DSB video modulation; 10% residual carrier; video
signal in accordance with “CCIR, line 17” or “NTC-7 Composite”; measurements taken in test circuit of Fig.12; unless
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply: pin VP
VP
IP
supply voltage
supply current
note 1
4.5
5.0
9.9
V
VP = 5 V
VP = 9 V
51
52
60
61
70
70
mA
mA
Vision IF input: pins VIF1 and VIF2
Vi(sens)(VIF)(rms) sensitivity of VIF input
voltage (RMS value)
−1 dB video at output
fPC = 38.9 or 45.75 MHz
−
−
50
60
90
µV
µV
fPC = 58.75 MHz
100
Vi(max)(rms)
maximum VIF input voltage 1 dB video at output
(RMS value)
f
PC = 38.9 or 45.75 MHz 70
150
160
3.4
−
mV
mV
V
f
PC = 58.75 MHz
80
−
VI
DC input voltage
3.0
3.8
1999 Aug 26
7
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
SYMBOL
∆Vint
PARAMETER
CONDITIONS
MIN.
TYP.
0.7
MAX.
UNIT
dB
internal IF amplitude
difference between picture
and sound carrier
within AGC range
−
1
GIF
IF gain control
see Fig.6
fPC = 38.9 or 45.75 MHz 64
70
−
−
−
dB
f
PC = 58.75 MHz
62
70
68
dB
BIF(−3dB)
−3 dB IF bandwidth
upper limit cut-off
frequency
100
MHz
Ri(dif)
Ci(dif)
differential input resistance note 2
1.7
1.2
2.2
1.7
2.7
2.5
kΩ
differential input
capacitance
note 2
pF
VCO and video demodulator; note 3
fVCO(max)
∆fVCO/∆T
VVCO(rms)
maximum VCO frequency
for carrier regeneration;
f = 2fPC
125
130
−
MHz
VCO frequency variation
with temperature
free running; IAFC = 0;
note 4
−
−
±20 × 10−6 K−1
VCO voltage swing
(RMS value)
measured between
pins VCO1 and VCO2
fPC = 38.9 MHz
−
120
100
80
−
mV
mV
mV
MHz
MHz
ms
f
f
PC = 45.75 MHz
PC = 58.75 MHz
−
−
−
−
fcr(PC)
picture carrier capture
frequency range
negative
1.4
1.4
−
1.8
1.8
−
−
positive
−
tacq
acquisition time
BL = 60 kHz; note 5
30
90
Vi(sens)(VIF)(rms) sensitivity of VIF input
(RMS value)
PLL still locked;
−
50
µV
maximum IF gain; note 6
C/N = 10 dB; note 7
note 8
−
−
100
140
µV
µA
Ioffset(TPLL)
offset current at pin TPLL
−
±2.0
Video amplifier output (sound carrier off): pin VSO
Vo(VSO)(p-p)
VSO output voltage
(peak-to-peak value)
see Fig.5
VP = 5 V
VP = 9 V
0.90
0.95
1.35
1.0
1.1
1.5
1.25
1.25
1.6
−
V
V
V
V
Vsync
sync pulse voltage level
Vv(clu)
upper video clipping
voltage level
VP − 1.1 VP − 1
Vv(cll)
lower video clipping voltage
level
−
−
−
0.7
32
0.9
V
Vo(intc)(rms)
intercarrier output voltage
(RMS value)
sound carrier on; note 9
note 2
−
mV
Ro
output resistance
DC bias current
−
10
Ω
Ibias
for internal emitter-follower 1.8
at pin VSO
2.5
−
mA
1999 Aug 26
8
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
SYMBOL
Io(sink)(max)
PARAMETER
CONDITIONS
MIN.
1.4
TYP.
MAX.
UNIT
mA
maximum AC and DC
output sink current
−
−
−
−
Io(source)(max)
maximum AC and DC
output source current
2.0
mA
Bv(−3dB)
−3 dB video bandwidth
CL < 50 pF; RL > 1 kΩ
7
10
40
−
−
MHz
dB
αH(sup)
harmonics suppression in
video signal
CL < 50 pF; RL > 1 kΩ;
note 10
35
PSRRVSO
power supply ripple
rejection at pin VSO
see Fig.7
32
35
−
dB
Buffer amplifier and noise clipper input: pin VI
Ri
Ci
VI
input resistance
input capacitance
DC input voltage
2.6
1.4
1.5
3.3
2
4.0
3.0
2.1
kΩ
pF
V
pin VI not connected
1.8
Buffer amplifier output: pin CVBS
Gv
voltage gain
note 11
6
7
7.5
−
dB
MHz
V
Bv(−3dB)
Vo(v)(p-p)
−3 dB video bandwidth
CL < 20 pF; RL > 1 kΩ
8
11
2.0
video output voltage
(peak-to-peak value)
sound carrier off;
see Fig.12
1.7
2.3
Vv(clu)
Vv(cll)
upper video clipping
voltage level
3.9
4.0
1.0
−
V
V
lower video clipping voltage
level
−
1.1
Vsync
Ro
sync pulse voltage level
output resistance
DC bias current
−
−
1.35
−
−
V
10
−
Ω
Ibias
internal emitter-follower at 1.8
pin CVBS
2.5
mA
Io(sink)(max)
maximum AC and DC
output sink current
1.4
−
−
−
−
mA
mA
Io(source)(max)
maximum AC and DC
output source current
2.4
Measurements from VIF inputs to CVBS output (330 Ω connected between pins VSO and VI, sound carrier off)
Vo(CVBS)(p-p)
CVBS output voltage
(peak-to-peak value)
VP = 5 V
1.7
1.8
2.0
2.2
2.3
2.6
V
V
VP = 9 V
∆Vo(CVBS)
deviation of CVBS output
voltage
at B/G standard
50 dB gain control
30 dB gain control
gain variation; note 12
−
−
−
−
−
−
−
2
0.5
0.1
1
dB
dB
%
∆Vo(bl)
black level tilt
Gdif
differential gain
“CCIR, line 330” or
“NTC-7 Composite”
5
%
ϕdif
differential phase
“CCIR, line 330” or
“NTC-7 Composite”
−
2
8
4
deg
Bv(−3dB)
−3 dB video bandwidth
CL < 20 pF; RL > 1 kΩ
6
−
MHz
1999 Aug 26
9
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
SYMBOL
S/NW
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
weighted signal-to-noise
ratio
see Fig.3; note 13
VP = 5 V
56
60
−
−
dB
VP = 9 V
55
59
dB
αIM(0.92/1.1)
αIM(2.76/3.3)
∆Vr(PC)(rms)
intermodulation attenuation see Fig.4; note 14
at f = 0.92 or 1.1 MHz
for BLUE
56
58
62
64
−
−
dB
dB
for YELLOW
intermodulation attenuation see Fig.4; note 14
at f = 2.76 or 3.3 MHz
for BLUE
56
57
−
62
63
1
−
dB
dB
mV
mV
dB
for YELLOW
−
residual picture carrier
(RMS value)
fundamental wave
harmonics
10
10
−
−
1
αH(sup)
harmonics suppression in
video signal
note 10
35
40
PSRRCVBS
power supply ripple
see Fig.7
25
28
−
dB
rejection at pin CVBS
AGC detector output: pin AGC
tres
response time
at 50 dB amplitude step of
input signal
for increasing step
for decreasing step
note 12
−
1
10
ms
ms
mA
µA
−
50
1.1
22
100
1.38
28
Ich
charging current
0.82
16
Idch
Vo
discharging current
gain control output voltage see Fig.6
maximum gain
0
−
−
−
V
V
minimum gain
−
VP − 0.7
Tuner AGC
Vi(VIF)(rms)
VIF input voltage
(RMS value)
for onset tuner takeover
point
minimum level with
−
−
5
mV
mV
mV
dB/K
dB
RTOP = 22 kΩ
maximum level with
RTOP = 0 Ω
50
7
−
−
QVi(VIF)(rms)
∆Vi(VIF)/∆T
∆GIF
accuracy level of tuner
RTOP = 13 kΩ;
takeover point (RMS value) ITAGC = 0.4 mA
−
14
0.06
8
variation of tuner takeover
point with temperature
ITAGC = 0.4 mA
−
0.02
6
IF slip by automatic gain
control
tuner gain current from
20 to 80%
−
1999 Aug 26
10
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
TUNER AGC OUTPUT: PIN TAGC
Vmax
maximum voltage
from external source;
note 2
−
−
−
−
13.2
V
V
Vsat
Isink
saturation voltage
sink current
ITAGC = 1.7 mA
see Fig.6
0.2
no tuner gain reduction
−
0.1
2.0
0.3
2.6
µA
maximum tuner gain
reduction
1.7
mA
AFC detector: pin AFC; note 15
CRstps
control steepness
equal to ∆IAFC/∆fVIF
see Table 2
f
PC = 38.9 MHz
fPC = 45.75 MHz
PC = 58.75 MHz
AFC = 0; note 4
−0.5
−0.4
−0.3
−
−0.75
−0.65
−0.55
−
−1.0
−0.9
−0.8
µA/kHz
µA/kHz
µA/kHz
f
∆f/∆T
frequency variation with
temperature
I
±20 × 106 K−1
Vo
output voltage
without external
components; see Fig.8
upper limit
lower limit
VP − 0.5 VP − 0.3
−
V
V
−
0.3
0.5
Io
output current
see Fig.8
source current
sink current
150
150
−
200
200
20
250
250
30
µA
µA
µA
∆Ir(v)(p-p)
residual video modulation
current
(peak-to-peak value)
Sound mute switch: pin MUTE; note 16
VIL
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
mute attenuation
mute on
0
−
0.8
VP
V
VIH
mute off
1.5
−
−
V
IIL
VMUTE = 0 V
VMUTE = 0 V
−300
80
−360
−
µA
dB
mV
αmute
70
−
∆Voffset(MUTE)
DC offset voltage at
pin MUTE
at switching to mute on
state (plop)
100
500
FM sound limiter amplifier input: pin SI; note 17
Vi(FM)(rms)
FM input voltage
(RMS value)
“CCIR468-4”
S/N = 40 dB; see Fig.10
−
−
200
1
300
µV
αAM = 40 dB; f = 1 kHz;
−
mV
m = 0.3
Vi(FM)(max)(rms)
maximum FM input
handling voltage
(RMS value)
200
2.3
−
−
mV
V
VI
DC input voltage
2.6
2.9
1999 Aug 26
11
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
SYMBOL
PARAMETER
input resistance
CONDITIONS
MIN.
480
46
TYP.
600
MAX.
720
UNIT
Ri
note 2
Ω
αAM
AM suppression
AM signal: f = 1 kHz;
m = 0.3; see Fig.9
50
−
dB
fres(−3dB)
frequency response
−3 dB points of lower and 3.5
upper limits of IF sound
cut-off frequency
−
10
MHz
FM-PLL sound detector and AF amplifier; note 17
fcr(PLL)
catching range of PLL
upper limit
lower limit
upper limit
lower limit
7
−
−
MHz
MHz
MHz
MHz
µs
−
−
4
fhr(PLL)
holding range of PLL
8
−
−
−
−
3.5
4
tacq
acquisition time
−
−
∆fAF
audio frequency deviation
THD < 1.5%; note 18
−
−
±50
−
kHz
kHz
BAF(−3dB)
−3 dB audio frequency
95
120
bandwidth
THD
total harmonic distortion
27 kHz FM deviation;
R3 = 0 Ω; note 18
−
0.25
55
−
0.5
−
%
S/NW
weighted signal-to-noise
ratio
“CCIR 468-4”; see Fig.10
50
−
dB
mV
∆Vr(SC)(rms)
residual sound carrier
(RMS value)
fundamental wave and
harmonics
75
AUDIO OUTPUT: PIN AF
Vo(AF)(rms)
AF output voltage
(RMS value)
∆fAF = ±27 kHz;
B/G standard; see Fig.10
400
370
0.8
500
460
−
600
550
−
mV
mV
V
∆fAF = ±25 kHz;
M standard; see Fig.10
Vo(AF)(max)(rms)
maximum AF output
handling voltage
(RMS value)
THD < 1.5%
∆Vo(AF)/∆T
AF output voltage variation
with temperature
−
3 × 10−3 7 × 10−3
dB/K
Ro
RL
output resistance
load resistance
note 2
−
200
−
−
Ω
AC-coupled at pin AF
AC and DC
2.2
−
−
kΩ
mA
Io(sink/source)(max) maximum sink or source
output current
−
1.5
VO
DC output voltage
2.1
24
2.5
30
2.9
V
PSRRAF
power supply ripple
rejection at pin AF
R3 = 0 Ω; see Fig.7;
note 18
−
dB
DECOUPLING CAPACITOR: PIN DAF
VDAF
DC voltage at decoupling
capacitor
voltage depends on VCO
frequency; note 19
1.5
−
3.3
V
1999 Aug 26
12
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Measurements from VIF input to AF output; notes 20 and 21; see Fig.13
S/NW
weighted signal-to-noise
ratio
“CCIR 468-4”
black picture (sync only) 46
52
−
−
−
dB
white picture
colour bar
42
40
48
46
dB
dB
Notes
1. Values of video and sound parameters can be decreased at VP = 4.5 V.
2. This parameter is not tested during production and is only given as application information for designing the television
receiver.
3. Conditions for video demodulator:
a) Loop bandwidth: BL = 60 kHz, natural frequency fn = 15 kHz, damping factor d = 2, calculated with grey level and
FPLL input level
b) Resonance circuit of VCO: Qo > 50, see Table 2 for the value of the external capacitor C; CVCO = 8.5 pF, loop
voltage is approximately 2.6 V at VP = 5 V and approximately 2.7 V at VP = 9 V.
4. Temperature coefficient of the external LC circuit is equal to zero.
5. Vi(VIF)(rms) = 10 mV; ∆f = 1 MHz (VCO frequency offset related to fPC); white picture video modulation.
6. Vi(VIF) signal for nominal video signal.
7. Broadband transformer at the VIF input (see Fig.12). The C/N ratio at the VIF input for ‘lock-in’ is defined as the VIF
input signal (RMS value of sync pulse level) related to a superimposed 5 MHz band-limited white noise signal
(RMS value). The video modulation is for white picture.
8. The offset current is measured between pin TPLL and half of the supply voltage (VP = 2.5 V) under the conditions:
a) no input signal at VIF inputs
b) IF amplifier gain at minimum (VAGC = VP) and pin ADJ is left open-circuit.
9. The intercarrier output signal is superimposed to the video signal at pin VSO and can be calculated by the following
formula:
Vi(SC)
(dB) + 6 dB ± 2 dB
---------------
Vi(PC)
------------------------------------------------------------------
20
1
Vo(intc)(rms) = 1.0 V (p-p) ×
× 10
----------
2 2
where
a) 1.0 V (p-p) = video output signal as reference
1
b)
= correction term for RMS value
----------
2 2
V i(SC)
c)
(dB) = sound-to-picture carrier ratio at VIF inputs in dB
---------------
Vi(PC)
d) 6 dB = correction term of internal circuitry
e) ±2 dB = tolerance of video output and intercarrier output amplitude Vo(intc)(rms)
.
f) Example for SAW filter G1962:
sound shelf value = 20 dB,
Vi(SC)
= –27 dB Vo(intc)(rms) = 32 mV (typical value)
---------------
Vi(PC)
1999 Aug 26
13
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
10. Measurements taken with SAW filter G1962; VSB modulation; fvideo > 0.5 MHz; loop bandwidth BL = 60 kHz.
11. The 7 dB buffer amplifier gain accounts for 1 dB loss in the sound trap. The buffer output signal is typical 2 V (p-p).
If no sound trap is applied a resistor of 330 Ω must be connected between pins VSO and VI.
12. The leakage current of CAGC should not exceed 1 µA. Larger currents will increase the tilt.
13. S/N is the ratio of the black-to-white amplitude to the black level noise voltage (RMS value) at pin CVBS.
B = 5 MHz weighted in accordance with “CCIR 567” at a source impedance of 50 Ω.
14. The intermodulation figures are defined:
Vo at 4.4 (3.58) MHz
a) αIM(0.92 ⁄ 1.1) = 20 log
+ 3.6 dB
-------------------------------------------------------
Vo at 0.92 (1.1) MHz
αIM(0.92/1.1) value at 0.92 (or 1.1) MHz referenced to black or white signal
Vo at 4.4 (3.58) MHz
b) αIM(2.76 ⁄ 3.3) = 20 log
-------------------------------------------------------
Vo at 2.76 (3.3) MHz
αIM(2.76/3.3) value at 2.76 (or 3.3) MHz referenced to colour carrier.
15. To match the AFC output signal to different tuning systems a current source output is provided (see Fig.8).
16. The no mute state is also valid when pin MUTE is not connected.
17. The input signal is provided by an external generator with 50 Ω source impedance, AC-coupled with a 10 nF
capacitor, fmod = 1 kHz and 27 kHz (54% FM deviation) of audio reference. A VIF input signal is not permitted.
Pin AGC has to be connected to the supply voltage. Measurements are taken at 50 µs de-emphasis (75 µs at the
M standard).
18. To allow a higher frequency deviation, the value of resistor R3 on pin DAF (see Fig.13) has to be increased.
However, the AF output signal must not exceed 0.5 V (nominal value) for THD = 0.2%. R3 = 4.7 kΩ provides −6 dB
amplification.
19. The leakage current of the 2.2 µF decoupling capacitor should not exceed 100 nA.
20. For all S/N measurements the used vision IF modulator has to meet the following specifications:
a) Incidental phase modulation for black-to-white jump less than 0.5 degrees
b) AF performance, measured with the television demodulator AMF2 (audio output, weighted S/N ratio), better than
60 dB (deviation 27 kHz) for white picture video modulation.
21. Input signal according to B/G standard of Table 1:
a) Input: Vi(VIF)(rms) = 10 mV, VSB modulation and 10% residual carrier
b) Reference: FM deviation = 27 kHz and measurements are taken at 50 µs de-emphasis.
Table 1 Input frequencies and carrier ratios
STANDARD
SYMBOL
fPC
DESCRIPTION
UNIT
B/G
M/N
M
picture carrier frequency
sound carrier frequency
picture-to-sound carrier ratio
38.9
33.4
13
45.75
41.25
7
58.75
54.25
7
MHz
MHz
dB
fSC
PC/SC
1999 Aug 26
14
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
MHB507
75
handbook, halfpage
3.2 dB
handbook, halfpage
S/N
W
(dB)
10 dB
13.2 dB
27 dB
13.2 dB
50
27 dB
25
SC CC
PC
SC CC
PC
BLUE
YELLOW
MED685 - 1
0
−60
−40
−20
6 10
0
i(VIF)(rms)
60
20
V
V
(dB)
SC = sound carrier level, with respect to sync pulse level.
0.06
0.6
600
CC = chrominance carrier level, with respect to sync pulse level.
PC = picture carrier level, with respect to sync pulse level.
Sound shelf attenuation: 20 dB.
(mV)
i(VIF)(rms)
Fig.3 Video output weighted signal-to-noise ratio
as a function of the VIF input voltage.
Fig.4 Input signal conditions for intermodulation
measurements.
zero carrier level
white level
hand2b.o6oVk, halfpage
2.5 V
black level
sync level
1.8 V
1.5 V
B/G and M/N standard
MHA889
Fig.5 Video signal levels on output pin VSO
(sound carrier off).
1999 Aug 26
15
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
MHB510
70
(1)
60
G
I
IF
TAGC
(dB)
50
(mA)
0
40
0.2
(2)
(3)
(4)
30
20
10
0
0.6
1.0
1.4
1.8
2.0
−10
0
1
2
3
4
5
V
(V)
AGC
(1) GIF (IF gain control).
(2) TOP = 22 kΩ.
R
(3) RTOP = 13 kΩ.
(4) RTOP = 0 Ω.
Fig.6 IF AGC gain control and tuner AGC output current as a function of the tuner AGC detector voltage.
V
P
100 mV
V
= 5 V
P
(f
= 70 Hz)
ripple
TDA9801
MHA884
t
Fig.7 Power supply ripple rejection condition.
16
1999 Aug 26
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
V
= 5 V
V = 5 V
P
V
= 9 V
V
= 9 V
P
handbook, halfpage
handbook, halfpage
P
P
22 kΩ
62 kΩ
AFC
AFC
15
15
TDA9801
TDA9801
V
V
I
I
AFC
22 kΩ
AFC
AFC
AFC
62 kΩ
MHA887
MHA888
MHB508
MHB509
9
150
I
5
225
I
handbook, halfpage
handbook, halfpage
V
AFC
AFC
AFC
V
AFC
(µA)
100
(V)
(µA)
150
(V)
7.5
(source current)
(source current)
3.75
6
4.5
3
50
0
75
2.5
0
−50
−75
−150
−225
(sink current)
(sink current)
1.25
−100
−150
1.5
0
38.3
0
38.3
38.6
38.9
39.2
39.5
38.6
38.9
39.2
39.5
f (MHz)
f (MHz)
a. VP = 5 V.
b. VP = 9 V.
Fig.8 AFC measurement conditions and typical characteristics.
1999 Aug 26
17
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
MHA885
0
α
AM
(dB)
−20
−40
−60
−80
−100
−1
2
3
10
1
10
10
10
V
(mV)
i(SI)
Fig.9 AM suppression (typical value) of the FM limiter amplifier as a function of the input voltage.
MHA886
540
60
V
o(AF)(rms)
(mV)
(1)
(2)
S/N
W
(dB)
520
50
500
480
460
40
30
20
3
−1
2
10
1
10
10
10
V
(mV)
i(SI)
(1) Signal-to-noise ratio (weighted).
(2) AF output signal (typical value).
Fig.10 AF output signal and signal-to-noise ratio as a function of the input voltage.
18
1999 Aug 26
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
120
antenna input
IF gain range
64 (<70) dB
video
1 V (p-p)
(dBµV)
IF signals
(RMS value)
(V)
(1)
−1
100
10
SAW insertion
loss 20 dB
tuner gain
control range
6 dB IF slip
−2
80
10
64 dB
IF AGC
TOP
−3
10
60
40
20
−3
−4
0.66 × 10
SAW insertion
loss 20 dB
−4
10
40 dB
RF gain
0.66 × 10
−5
10
−5
0.66 × 10
IF amplifier, demodulator
and video
IF
VHF/UHF
SAW filter
TDA9801
tuner
MHA883
(1) Depends on TOP.
Fig.11 Front-end level diagram.
19
1999 Aug 26
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
INTERNAL CIRCUITRY
PIN
SYMBOL DC VOLTAGE (V)
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
1
2
VIF1
VIF2
3.4
3.4
+
1
1.1 kΩ
400 µA
1.1 kΩ
+
2
3.6 V
400 µA
MHB511
3
TOP
0 to 1.9
30 kΩ
9 kΩ
20 kΩ
3.6 V
3
1.9 V
MHB512
4
ADJ
0 to 0.4
5 kΩ
3.6 V
4
18 kΩ
16 kΩ
MHB513
1999 Aug 26
20
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
PIN
SYMBOL DC VOLTAGE (V)
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
5
MUTE
0 to VP
mute
+
+
2.5 µA
5
25 µA
MHB514
6
TPLL
1.5 to 4.0
+
+
I
b
+
6
VCO
200 µA
MHB515
7
CVBS
sync pulse level:
1.35
6.4
kΩ
1.5 pF
+
7
2.5 mA
MHB516
8
n.c.
−
1999 Aug 26
21
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
PIN
SYMBOL DC VOLTAGE (V)
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
9
AF
2.5
2.4 mA
+
+
9
MHB517
10
DAF
1.5 to 3.3
57 kΩ
5 kΩ
5 kΩ
10
190 µA
MHB518
11
SI
2.6
3.6 V
670 Ω
5.5 kΩ
11
5.5 kΩ
15 pF
MHB519
12
13
TAGC
VSO
0 to 13.2
12
15 V
MHB520
sync pulse level:
1.5
+
100 Ω
20 kΩ
13
10 µF
11.5 kΩ
2 kΩ
3.6 V
2.5 mA
MHB521
1999 Aug 26
22
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
PIN
SYMBOL DC VOLTAGE (V)
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
14
VI
1.8
3.6 V
6.6 kΩ
14
2 kΩ
5 kΩ
MHB522
15
AFC
0.3 to VP − 0.3
+
+
+
200 µA
15
1 kΩ
1 kΩ
MHB523
16
17
VCO1
VCO2
2.7
2.7
420 Ω
420 Ω
50 Ω
16
17
+
+
2.8 V
500 µA
MHB524
1999 Aug 26
23
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
PIN
SYMBOL DC VOLTAGE (V)
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
18
GND
0
20
13.5 V
18
MHB525
19
AGC
1.5 to 4.0
1 mA
19
20 µA
I
b
MHB526
20
VP
VP
20
13.5 V
18
MHB525
1999 Aug 26
24
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g
22 kΩ
(62 kΩ)
AFC
video and intercarrier
tuner AGC
V
= 5 V (9 V)
P
10 µF
22 kΩ
(62 kΩ)
1 V (p-p)
10 nF
0.1 µF
330 Ω
560 Ω
2.2 µF
AGC
(1)
V
GND
18
VCO2
17
VCO1
AFC
VI
14
VSO
13
TAGC
SI
11
P
20
19
12
16
15
TDA9801
1
2
3
4
5
6
7
8
9
AF
10
DAF
VIF1
VIF2
TOP
ADJ
MUTE
TPLL
CVBS
n.c.
1:1
vision
IF
2.2 µF
13 kΩ
390 Ω
0.1 µF
50 Ω
AF
takeover
point
sound
mute
CVBS
MHA881
2 V (p-p)
(1) See Table 2.
Fig.12 Test circuit.
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a
22 kΩ
(62 kΩ)
AFC
video and intercarrier
tuner AGC
V
= 5 V (9 V)
P
330 Ω
22 kΩ
(62 kΩ)
1 V (p-p)
10 µF
sound
trap
10 nF
560
Ω
0.1 µF
(2)
(2)
R1
R2
15
µH
(2)
12 V (9 V)
sound
filter
(1)
2.2 µF
V
AGC
19
GND
18
VCO2
17
VCO1
AFC
VI
14
VSO
13
TAGC
SI
P
20
12
16
15
11
TDA9801
1
2
3
4
5
6
7
8
9
AF
10
DAF
VIF1
VIF2
TOP
ADJ
MUTE
TPLL
CVBS
n.c.
vision
IF
2.2
(3)
SAW
filter
R3
390 Ω
0.1 µF
13 kΩ
k
Ω
50 Ω
IF input
2.2 µF
G1962
takeover
point
sound
mute
CVBS
2 V (p-p)
AF
MHA882
22 nF
(1) See Table 2.
(2) Depends on tuner.
(3) See note 18 of Chapter “Characteristics”.
Fig.13 Application circuit.
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
Table 2 Oscillator circuit for different TV standards
PARAMETER
EUROPE
USA
JAPAN
IF frequency
38.9 MHz
77.8 MHz
45.75 MHz
91.5 MHz
58.75 MHz
117.5 MHz
VCO frequency
Oscillator circuit
16
16
16
(1)
(2)
(3)
(1)
(2)
(3)
(1)
(2)
(3)
17
17
17
MGG099
MGG099
MGG099
(1) CVCO = 8.5 pF.
(2) C = 8.2 ±0.25 pF.
(3) L = 251 nH.
(1) CVCO = 8.5 pF.
(2) C = 10 ±0.25 pF.
(3) L = 163 nH.
(1) CVCO = 8.5 pF.
(2) C = 15 ±0.25 pF.
(3) L = 78 nH.
Toko coil
5KM 369SNS-2010Z
2222 632 51828
5KMC V369SCS-2370Z
inside coil
MC139 NE545SNAS100108
15 pF (SMD; size: 0805)
Philips ceramic
capacitor
1999 Aug 26
27
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
PACKAGE OUTLINES
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
M
H
20
11
pin 1 index
E
1
10
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
(1)
(1)
Z
1
2
UNIT
mm
b
b
c
D
E
e
e
1
L
M
M
H
w
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
6.40
6.22
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.10
7.62
0.30
0.254
0.01
2.0
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
0.25
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.020
0.13
0.078
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-05-24
SOT146-1
SC603
1999 Aug 26
28
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
0.25
0.01
1.27
0.050
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-24
97-05-22
SOT163-1
075E04
MS-013AC
1999 Aug 26
29
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
SOLDERING
Introduction
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
WAVE SOLDERING
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed on
one printed-circuit board. However, wave soldering is not
always suitable for surface mount ICs, or for printed-circuit
boards with high population densities. In these situations
reflow soldering is often used.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Through-hole mount packages
SOLDERING BY DIPPING OR BY SOLDER WAVE
• For packages with leads on two sides and a pitch (e):
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
300 and 400 °C, contact may be up to 5 seconds.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Surface mount packages
REFLOW SOLDERING
MANUAL SOLDERING
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
1999 Aug 26
30
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
Suitability of IC packages for wave, reflow and dipping soldering methods
SOLDERING METHOD
WAVE
REFLOW(1) DIPPING
suitable(2)
MOUNTING
PACKAGE
Through-hole mount DBS, DIP, HDIP, SDIP, SIL
−
suitable
Surface mount
BGA, SQFP
not suitable
not suitable(3)
suitable
suitable
−
−
HLQFP, HSQFP, HSOP, HTQFP, HTSSOP,
SMS
PLCC(4), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
suitable
−
−
−
not recommended(4)(5) suitable
not recommended(6)
suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Aug 26
31
Philips Semiconductors – a worldwide company
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67
SCA
© Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/02/pp32
Date of release: 1999 Aug 26
Document order number: 9397 750 05292
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