TDA9800T-T [NXP]
IC AUDIO/VIDEO DEMODULATOR, PDSO20, Receiver IC;
| 型号： | TDA9800T-T |
| 厂家： | 
NXP |
| 描述： | IC AUDIO/VIDEO DEMODULATOR, PDSO20, Receiver IC 消费电路 商用集成电路 光电二极管 |
| 文件： | 总23页 (文件大小：181K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA9800
VIF-PLL demodulator and FM-PLL
detector
July 1994
Preliminary specification
File under Integrated Circuits, IC02
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
• AGC output voltage for tuner; adjustable take-over point
FEATURES
(TOP)
• Suitable for negative vision modulation
• AFC detector without extra reference circuit
• Applicable for IF frequencies of 38.9 MHz, 45.75 MHz
and 58.75 MHz
• Alignment-free FM-PLL detector with high linearity
• Stabilizer circuit for ripple rejection and to achieve
constant output signals
• Gain controlled wide band VIF amplifier (AC coupled)
• True synchronous demodulation with active carrier
regeneration (ultra-linear demodulation, good
intermodulation figures, reduced harmonics and
excellent pulse response)
• 5 to 8 V positive supply voltage range, low power
consumption (300 mW at +5 V supply voltage).
• Peak sync AGC for negative modulation
GENERAL DESCRIPTION
• Video amplifier to match sound trap and sound filter
The TDA9800 is a monolithic integrated circuit for vision
and sound IF signal processing in TV and VTR sets.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
positive supply voltage (pin 20)
MIN. TYP. MAX. UNIT
VP
IP
4.5
51
−
5
8.8
69
90
−
V
supply current
60
50
150
70
2.0
8
mA
µV
mV
dB
V
Vi IF
vision IF input signal sensitivity (RMS value, pins 1 and 2)
maximum vision IF input signal (RMS value, pins 1 and 2)
IF gain control
70
64
1.7
6
Gv
73
2.3
−
Vo CVBS
B
CVBS output signal on pin 7 (peak-to-peak value)
−3 dB video bandwidth on pin 7
MHz
dB
dB
dB
dB
V
S/N (W)
α0.92/1.1
α2.76/3.3
αH
signal-to-noise ratio weighted; for video
intermodulation attenuation
56
56
56
35
0.8
−20
59
62
62
40
−
−
−
−
suppression of harmonics in video signal
maximum AF output signal for THD < 1.5% (RMS value, pin 9)
operating ambient temperature
−
Vo AF
Tamb
−
−
+70
°C
ORDERING INFORMATION
PACKAGE
MATERIAL
EXTENDED TYPE
NUMBER
PINS
PIN POSITION
CODE
TDA9800
20
20
DIL
plastic
plastic
SOT146(1)
SOT163A(2)
TDA9800T
mini-pack
Note
1. SOT146-1; 1996 December 6.
2. SOT163-1; 1996 December 6.
July 1994
2
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
bnok,lfuapgedwith
V
= 5 V (9 V)
P
2f
PC
V
T
6
AFC
15
P
VCO2
17
VCO1
16
PLL
20
INTERNAL
REFERENCE
VOLTAGE
TRAVELLING
WAVE
DIVIDER
V
18
GND
9
o AF
AF
AF
VCO
AFC
AMPLIFIER
C
10
C
AF
3-STAGE
IF-AMPLIFIER
V
V
1
2
i VIF1
IF input
FREQUENCY
DETECTOR
AND PHASE
DETECTOR
VIDEO
DEMODULATOR
VIDEO
AMPLIFIER
FM-PLL
i VIF2
CCS
V
i PC
4
TDA9800
sound
mute
AGC
DETECTOR
IF
AGC
TUNER
AGC
BUFFER AND
NOISE
CLIPPING
V
o CVBS
7
2 V (p-p)
3
13
V
19
C
8
11
V
5
14
V
12
n.c.
TOP
TAGC
MUTE
o(vid)
i(vid)
i IC
AGC
takeover
point
sound
MUTE
SOUND SOUND
TRAP
FILTER
C
AGC
tuner AGC
output
video and
intercarrier
1 V (p-p)
MED329
Fig.1 Block diagram.
3
July 1994
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
PINNING
SYMBOL
PIN
DESCRIPTION
Vi IF
1
vision IF differential input signal
2
TADJ
3
tuner AGC take-over adjust (TOP)
phase detector adjust
φADJ
4
MUTE
TPLL
5
sound mute switch
6
PLL time constant of phase detector
CVBS (positive) output signal
not connected
Vo CVBS
n.c.
7
8
Vo AF
CAF
9
audio frequency output signal
decoupling capacitor of audio frequency amplifier
sound intercarrier input signal
tuner AGC output
10
11
12
13
14
15
16
17
18
19
20
Vi IC
TAGC
Vo VID
Vi VID
AFC
video and sound intercarrier output signal
video input signal to buffer amplifier
automatic frequency control output
VCO reference circuit for 2 fPC
VCO1
VCO2
GND
CAGC
VP
ground (0 V)
AGC capacitor
positive supply voltage
handbook, halfpage
V
V
V
P
1
2
20
19
i VIF1
C
i VIF2
TOP
AGC
3
18 GND
17
CCS
VCO2
4
MUTE
16 VCO1
15 AFC
5
TDA9800
T
6
PLL
V
V
V
7
14
13
12
11
o CVBS
n.c.
i(vid)
8
o(vid)
V
TAGC
9
o AF
V
C
10
i IC
AF
MED330
Fig.2 Pin configuration.
July 1994
4
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
with 90 degree phase difference independent of
frequency.
FUNCTIONAL DESCRIPTION
Vision IF input
Video amplifier, buffer and noise clipping
The vision IF amplifier consists of three AC-coupled
differential amplifier stages; each stage comprises a
controlled feedback network by means of emitter
degeneration.
The video amplifier is a wide bandwidth operational
amplifier with internal feedback. A nominal positive
modulated video signal of 1 V (p-p) is present on the
composite video output (pin 13). The input impedance of
the 7 dB wideband buffer amplifier (with internal feedback)
is suitable for ceramic sound trap filters. The CVBS output
(pin 7) provides a positive video signal of 2 V (p-p). Noise
clipping is provided internally.
IF and tuner AGC
The automatic control voltage to maintain the video output
signal at a constant level is generated according to the
transmission standard. Since the TDA9800 is suitable for
negative modulation only the peak-sync level is detected.
The AGC detector charges and discharges the capacitor
on pin 19 to set the IF gain and the tuner gain. The AGC
capacitor voltage is transferred to an internal IF control
signal, and is fed to the tuner AGC to generate the tuner
AGC output current on pin 12 (open-collector output). The
tuner AGC voltage take over point is adjusted on pin 3.
This allows the tuner and the IF SAW filter to be matched
to achieve the optimum IF input level.
Sound demodulation
The FM sound intercarrier signal is fed to pin 11 and
through a limiter amplifier before it is demodulated. This
achieves high sensitivity and high AM suppression. The
limiter amplifier consists of seven internal AC-coupled
stages, minimizing the DC offset.
The FM-PLL demodulator consists of an RC-oscillator,
loop filter and phase detector. The oscillator frequency is
locked on the FM intercarrier signal from the limiter
amplifier. As a result of this locking, the RC-oscillator is
frequency-modulated.
Frequency detector, phase detector and video
demodulator
The modulating signal voltage (AF signal) is used to
control the oscillator frequency. By this, the FM-PLL
operates as an FM demodulator.
The audio frequency amplifier with internal feedback is
designed for high gain and high common mode rejection.
The low-level AF signal output from the FM-PLL
demodulator is amplified and buffered in a low-ohmic
audio signal output stage (pin 9). An external decoupling
capacitor on pin 10 removes the DC voltage from the audio
amplifier input.
The IF amplifier output signal is fed to a frequency detector
and to a phase detector. During acquisition the frequency
detector produces a DC current which is proportional to the
frequency difference between the input and the VCO
signal. After frequency lock-in the phase detector
produces a DC current proportional to the phase
difference between the VCO and the input signal. Via the
loop filter the DC current of either frequency detector or
phase detector is converted into a DC voltage, which
controls the VCO frequency.
By using the sound mute switch (pin 5) the AF amplifier is
set to mute state.
The video demodulator is a linear multiplier, designed for
low distortion and wide bandwidth. The vision IF input
signal is multiplied by the in-phase component of the VCO
output. The demodulated output signal is fed via an
integrated low-pass filter (fg = 12 MHz) to the video
amplifier for suppression of the carrier harmonics.
VCO and travelling wave divider
The VCO operates with a symmetrically-connected
reference LC-circuit, operating at double vision carrier
frequency. Frequency control is performed by an internal
varicap diode. The voltage to set the VCO frequency to the
actual frequency of double vision carrier frequency, is also
amplified and converted for the AFC output current.
The VCO signal is divided-by-two in a travelling wave
divider, which generates two differential output signals
July 1994
5
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC134).
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VP
supply voltage (pin 20) for a maximum chip temperature (note 1)
SOT146 at +120 °C
0
0
0
−
−
8.8
V
V
V
s
SOT163A at +100 °C
5.5
VI
voltage on pins 1, 2, 7, 11, 13, 14, 15 and 19
short-circuit time
VP
ts max
V12
10
tuner AGC output voltage
13.2
+150
±300
V
°C
V
Tstg
storage temperature range
−25
VESD
electrostatic handling for all pins (note 2)
−
Notes
1. Supply current IP = 69 mA at Tamb = +70 °C.
2. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor (negative and positive voltage).
THERMAL RESISTANCE
SYMBOL
Rth j-a
PARAMETER
THERMAL RESISTANCE
from junction to ambient in free air
SOT146
73 K/W
85 K/W
SOT163A
July 1994
6
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
CHARACTERISTICS
The following characteristics apply for VP = 5 V; Tamb = +25 °C; see Table 1 for input frequencies and picture to sound
ratios; VilF = 10 mV RMS value (sync level); video modulation DSB; residual carrier: 10%; video signal in accordance
with CCIR line 17 or NTC-7 Composite; measurements taken in Fig.3 unless otherwise specified
SYMBOL
PARAMETER
supply voltage (pin 20)
supply current
CONDITIONS
note 1
MIN.
4.5
TYP.
MAX.
8.8
UNIT
VP
IP
5
V
51
60
69
mA
Vision IF input (pins 1 and 2)
Vi
input sensitivity (RMS value) at
38.9 MHz and 45.75 MHz
−1 dB video at output
−
50
90
100
−
µV
µV
mV
mV
dB
input sensitivity (RMS value) at
58.75 MHz
−
60
maximum input signal (RMS value) at +1 dB video at output
38.9 MHz and 45.75 MHz
70
80
−
150
160
0.7
maximum input signal (RMS value) at
58.75 MHz
−
∆Vo int.
internal IF amplitude difference
between picture and sound carrier
within AGC range;
B/G: ∆f = 5.5 MHz;
M/N: ∆f = 4.5 MHz
1
GIF
IF gain control
see Fig.4
38.9 MHz and
45.75 MHz
64
62
70
−
dB
58.75 MHz
68
−
dB
MHz
kΩ
pF
V
B
−3 dB IF bandwidth
upper cut-off frequency 70
100
2.2
1.7
3.4
−
Ri
input resistance (differential)
input capacitance (differential)
DC input voltage
1.7
2.7
2.5
3.8
Ci
1.2
V1, 2
3.0
note 2
True synchronous video demodulator
fVCO
maximum oscillator frequency for
carrier regeneration
f = 2fPC
125
130
−
MHz
∆fVCO
Vo ref
oscillator drift (free running) as a
function of temperature
IAFC = 0; note 3
fPC = 38.9 MHz
−
−
±20
ppm/K
oscillator swing at pins 16 and 17
(RMS value)
−
120
100
80
−
−
−
−
mV
mV
mV
MHz
f
f
PC = 45.75 MHz
PC = 58.75 MHz
−
−
∆fPC
vision carrier capture range
(negative)
1.5
2
vision carrier capture range (positive)
acquisition time
1.5
2
−
MHz
ms
tacqu
BL = 60 kHz; note 4
−
−
30
July 1994
7
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Vi IF
IF input signal sensitivity
(RMS value, pins 1 and 2)
for PLL still locked
maximum IF gain;
note 5
−
50
90
µV
for C/N = 10 dB
note 6
−
−
100
140
µV
µA
Iloop
FPLL loop offset current at pin 6
note 7
−
±4.5
sound carrier off
Composite video amplifier (pin 13)
V0 vid
V13
output signal (peak-to-peak value)
see Fig.7
0.9
1.4
−
1.0
1.5
2.6
1.1
1.6
−
V
sync level
V
zero carrier level
V
upper video clipping level
lower video clipping level
IF intercarrier level (RMS value)
output resistance
VP − 1.1 VP − 1.0
−
V
−
0.3
170
−
0.4
−
V
V0 FM
R13
sound carrier on; note 8 −
mV
Ω
−
10
−
Iint13
internal bias current for emitter
follower
DC
1.8
2.5
mA
I13
maximum output sink current
maximum output source current
−3 dB video bandwidth
DC and AC
1.4
2.0
7
−
−
−
−
−
mA
mA
MHz
dB
−
B
C13 < 50 pF; RL >1 kΩ
10
40
αH
suppression of video signal
harmonics
C13 < 50 pF; RL >1 kΩ; 35
note 9
RR
ripple rejection on pin 13
see Fig.9
32
35
−
dB
CVBS buffer amplifier and noise clipper (pins 7 and 14)
R14
input resistance
input capacitance
DC voltage at input
voltage gain
2.6
1.4
1.5
6
3.3
2
4.0
3.0
2.1
7.5
2.3
kΩ
pF
V
C14
V14
pin 14 not connected
note 10
1.8
7
Gv
dB
V
Vo CVBS
CVBS output signal on pin 7
(peak-to-peak value)
sound carrier off;
see Fig.3
1.7
2.0
CVBS output level
output resistance
upper video clipping
lower video clipping
sync level
3.9
−
4.0
1.0
1.35
−
−
V
1.1
−
V
−
V
R7
−
10
−
Ω
Iint7
internal bias current for emitter
follower
DC
1.8
2.5
mA
I7
B
maximum output sink current
maximum output source current
−3 dB video bandwidth
DC and AC
1.4
2.4
8
−
−
−
−
mA
−
mA
C7 < 20 pF; RL > 1 kΩ
11
MHz
July 1994
8
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Measurements from IF input to CVBS output (pin 7) 330 Ω between pins 13 and 14, sound carrier off
Vo CVBS
CVBS output signal on pin 7
(peak-to-peak value)
1.7
2.0
2.3
V
∆Vo
deviation of CVBS output signal at
B/G
50 dB gain control
30 dB gain control
note 11
−
−
0.5
0.1
1
dB
dB
%
−
−
black level tilt
−
−
∆G
differential gain
CCIR line 330 or
NTC-7 Composite
−
2
5
%
∆ϕ
differential phase
−
1
3
deg
MHz
dB
dB
dB
dB
dB
mV
mV
dB
B
−3 dB video bandwidth
signal-to-noise ratio; weighted
intermodulation at ‘blue’
intermodulation at ‘yellow’
intermodulation at ‘blue’
intermodulation at ‘yellow’
residual vision carrier (RMS value)
CL < 20 pF; RL > 1 kΩ
6
8
−
S/N(W)
α0.92/1.1
see Fig.5 and note 12
56
56
58
56
57
−
59
62
64
62
63
1
−
f = 0.92 or 1.1 MHz;
see Fig.6 and note 13
−
−
α2.76/3.3
f = 2.76 or 3.3 MHz;
see Fig.6 and note 13
−
−
αC
fundamental wave
harmonics
10
10
−
−
1
αH
suppression of video signal
harmonics
note 9
35
40
RR
ripple rejection on pin 7
see Fig.9
25
28
−
dB
AGC detector (pin 19)
tresp
response to an increasing amplitude
step of 50 dB in input signal
−
−
1
10
ms
ms
response to a decreasing amplitude
step of 50 dB in input signal
50
100
I19
charging current
discharging current
AGC voltage
note 11
0.85
17
0
1.1
22
1.35
27
−
mA
µA
V
V19
maximum gain
minimum gain
see
Fig.4
−
see
VP − 0.7 V
Fig.4
July 1994
9
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Tuner AGC (pin 12)
Vi
IF input signal for minimum starting
point of tuner take over (RMS value) RTOP = 22 kΩ
input at pins 1 and 2;
−
−
−
5
mV
IF input signal for maximum starting input at pins 1 and 2;
50
−
mV
point of tuner take over (RMS value)
R
TOP = 0 Ω
from external source
12 = 1.7 mA
V12
allowable voltage
−
−
−
−
−
13.2
0.2
V
saturation voltage
I
V
∆V12
variation of take over point by
temperature
I12 = 0.4 mA
0.02
0.06
dB/K
I12
sink current
see Fig.4
no tuner gain reduction
−
0.1
2.0
0.3
2.6
µA
maximum tuner gain
reduction
1.7
mA
∆GIF
IF slip by automatic gain control
tuner gain current from
20 to 80%
−
6
8
dB
see Fig.8 and note 14
AFC circuit (pin 15)
S
control steepness ∆I15/∆f
note 15
38.9 MHz
45.75 MHz
58.75 MHz
IAFC = 0; note 3
see Fig.8
−0.6
−0.45
−0.38
−
−0.72
−0.6
−0.5
−
−0.84
−0.75
−0.62
±20
−
µA/kHz
µA/kHz
µA/kHz
ppm/K
V
∆fIF
frequency variation by temperature
output voltage upper limit
output voltage lower limit
output current source
V15
VP − 0.5 VP − 0.3
−
0.3
200
200
20
0.5
V
I15
160
160
−
240
240
30
µA
output current sink
µA
∆I15
residual video modulation current
(peak-to-peak value)
µA
note 16
Sound mute switch (pin 5)
VIL
input voltage for MUTE-ON
0
−
0.8
VP
V
VIH
IIL
input voltage for MUTE-OFF
LOW level input current
audio attenuation
1.5
−
−
V
V5 = 0 V
V5 = 0 V
−300
80
−360
−
µA
dB
mV
αmute
∆V5
70
−
DC offset voltage at switching (plop) switching to MUTE-ON
100
500
July 1994
10
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
SYMBOL
PARAMETER
CONDITIONS
note 17
MIN.
TYP.
MAX.
UNIT
FM sound limiter amplifier (pin 11)
Vi FM
input signal (RMS value, pin 11)
for S/N = 40 dB
CCIR468-4
see Fig.11
−
−
200
300
µV
for AM suppression αAM = 40 dB
AM: f = 1 kHz; m = 0.3
1
−
−
mV
mV
maximum input signal handling
(RMS value)
200
−
αAM
AM suppression
see Fig.10;
46
50
−
dB
AM: f = 1 kHz; m = 0.3
R11
B
input resistance
480
3.5
600
720
10
Ω
−3 dB IF frequency response of
sound IF
lower and upper
cut-off frequency
−
MHz
V11
DC voltage
2.3
2.6
2.9
V
FM-PLL sound demodulator and AF output (pin 9) note 17
fi FM
catching range of PLL
holding range of PLL
acquisition time
4
−
7
MHz
MHz
µs
3.5
−
−
8
tacqu
−
4
Vo AF
AF output signal (RMS value, pin 9) ∆fAF = ±27 kHz;
280
350
420
mV
see Fig.11
maximum output signal handling
temperature drift of AF output signal
frequency deviation
THD < 1.5%
0.8
−
−
3
−
−
−
V
∆Vo
∆fAF
V10
7
10-3 dB/K
THD < 1.5%; note 18
−
±50
2.2
kHz
V
DC voltage at decoupling capacitor
voltage dependent on
VCO frequency;
note 19
1.2
R9
output resistance
−
100
−
−
Ω
RL
load resistance (pin 9)
DC voltage
2.2
1.6
95
−
−
kΩ
V
V9
2.0
120
0.1
55
−
2.4
−
B
−3 dB audio frequency bandwidth
total harmonic distortion
signal-to-noise ratio, weighted
kHz
%
THD
S/N (W)
VSC
without ceramic filter
0.5
−
CCIR468-4; see Fig.11 50
dB
mV
residual sound carrier and
harmonics (RMS value)
−
75
RR
ripple rejection on pin 9
see Fig.9
26
30
−
dB
Measurements from IF input to audio output (pin 9) 560 Ω between pins 13 and 11; note 20
S/N (W)
weighted signal-to-noise ratio
27 kHz FM deviation; CCIR468-4; 50 µs (75 µs at standard M)
de-emphasis; with offset alignment on pin 4
6 kHz sinusoidal waveform
black picture
black-to-white
sync only
39
40
39
39
46
48
46
46
−
−
−
−
dB
dB
dB
dB
white picture
colour bar
July 1994
11
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
Notes
1. Values of video and sound parameters are decreased at VP = 4.5 V.
2. Loop bandwidth BL = 60 kHz (natural frequency fn = 15 kHz; damping factor d = 2 calculated with grey level and
FPLL input signal level). Resonance circuit of VCO: Qo > 50; Cext = 8.2 pF; Cint ≈ 8.5 pF (loop voltage about 2.7 V).
3. Temperature coefficient of external LC-circuit is equal to zero.
4. Vi IF = 10 mV (RMS value); ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture
video modulation.
5. Vi IF signal for nominal video signal.
6. Transformer at IF input (Fig.3). The C/N ratio at IF input for ‘lock-in’ is defined as the vision IF input signal (sync level,
RMS value) in relation to a superimposed, 5 MHz band-limited white noise signal (RMS value); video modulation:
white picture.
7. Offset current measured between pin 6 and half of supply voltage (V = 2.5 V) under the following conditions: no input
signal at IF input (pins 1 and 2) and IF amplifier gain at minimum (V19 = VP), pin 4 (phase adjust) open-circuit.
8. The intercarrier output signal is superimposed to the video signal at pin 13 and can be calculated by the following
V13 interc. (p-p)
ViSC
ViSC
formula: 20 log
=
dB + 6.9 dB ± 2 dB with
dB = sound to picture carrier ratio at IF
---------------------------------------
-----------
ViPC
-----------
ViPC
1V (p-p)
input (pins 1 and 2 in dB and ±2 dB = tolerance of intercarrier output amplitude Vo FM
.
9. Measurements taken with SAW filter G1962; modulation: VSB, fvideo > 0.5 MHz, loop bandwidth BL = 60 kHz.
10. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p). If no sound
trap is applied a 330 Ω resistor must be connected from output to input (from pin 13 to pin 14).
11. The leakage current of the AGC capacitor has to be < 1 µA to avoid larger tilt.
12. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 7). B = 5 MHz weighted
in accordance with CCIR-567 at a source impedance of 50 Ω.
13. α0.92/1.1 = 20 log (Vo at 4.4 (3.58) MHz / Vo at 0.92 (1.1) MHz) + 3.6 dB; α0.92/1.1 value at 0.92 (1.1) MHz related to
black/white signal.
α2.76/3.3 = 20 log (Vo at 4.4 (3.58) MHz / Vo at 2.76 (3.3) MHz); α2.76/3.3 value at 2.76 (3.3) MHz related to colour
carrier.
14. To match the AFC output signal to different tuning systems a current source output is provided (Fig.8).
15. Depending on the ratio ∆C/Co of the LC resonance circuit of VCO (Qo > 50; Co = Cint + Cext; Cext = 8.2 pF;
Cint ≈ 8.5 pF).
16. No mute state is also valid for pin not connected.
17. Input level for second IF from an external generator with 50 Ω source impedance, AC coupled with 10 nF capacitor,
fmod = 1 kHz, 27 kHz (54% FM deviation) of audio reference. A VIF/SIF input signal is not permitted. Pin 19 has to
be connected to positive supply voltage. S/N and THD measurements are taken at 50 µs (75 µs at standard M)
de-emphasis.
18. To allow higher frequency deviation, the resistor Rx on pin 10 (see Fig.12) has to be increased to a value which does
not exceed the AF output signal of nominally 0.35 V for THD = 0.1% (Rx = 4.7 kΩ provides −6 dB amplification).
19. The leakage current of the 2.2 µF capacitor is < 100 nA.
20. For all S/N measurements the used vision IF modulator has to meet the following specification:
- Incidental phase modulation for black-to-white jump less than 0.5 degree.
July 1994
12
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
Table 1 Input frequencies and carrier ratios.
B/G STANDARD
M/N STANDARD
45.75
M STANDARD
UNIT
MHz
picture carrier
fPC
fSC
SC
38.9
33.4
13
58.75
54.25
7
sound carrier
41.25
7
MHz
dB
picture to sound carrier ratio
22 kΩ
(62 kΩ)
AFC
V
= 5 V (9 V)
P
10 µF
22 kΩ
(62 kΩ)
1 V (p-p)
video and intercarrier
tuner AGC
10 nF
0.1 µF
330 Ω
see
table
(1)
560 Ω
2.2 µF
V
V
V
C
V
i(vid)
o(vid)
VCO2
VCO1
P
AGC
GND
AFC
TAGC
i IC
20
19
14
13
12
18
17
16
15
11
TDA9800
1
2
3
4
5
6
7
8
9
10
n.c.
TOP
CCS
MUTE
T
V
C
AF
V
V
V
o CVBS
PLL
o AF
i VIF1
i VIF2
1:1
vision
IF
2.2 µF
13 kΩ
390 Ω
0.1 µF
50 Ω
V
o AF
takeover
point
sound
mute
CVBS
MED331
2 V (p-p)
Fig.3 Test circuit.
July 1994
13
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
MED332
70
60
G
IF
I
12
(dB)
50
(mA)
0
40
0.2
(2) (3)
(4)
(1)
30
20
10
0
0.6
1.0
1.4
1.8
2.0
−10
0
1
2
3
4
5
V
(V)
19
Fig.4 IF AGC (dashed) and tuner AGC as a function of take over point adjustment.
−3.2 dB
handbook, halfpage
MED333
80
handbook, halfpage
−10 dB
−13.2 dB
−24 dB
−13.2 dB
−24 dB
S/N
(dB)
60
40
20
SC CC
PC
SC CC
YELLOW
PC
BLUE
MED334
SC = sound carrier level
; with respect to TOP sync level.
CC = chrominance carrier level ; with respect to TOP sync level.
0
−60
PC = picture carrier level
; with respect to TOP sync level.
−40
−20
0
20
(dB)
V
i IF(rms)
Sound shelf attenuation: 17 dB.
0.06
0.6
6
60
V
600
(mV)
10
i IF(rms)
Fig.5 Typical signal-to-noise ratio as a function of
IF input signal.
Fig.6 Input conditions for intermodulation
measurements.
July 1994
14
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
zero carrier
level
handbook, halfpage
2.6 V
2.5 V
white level
1.8 V
1.5 V
sync level
MED335
Fig.7 Video signal levels on output pin 13.
Fig.8 Measurement conditions and typical AFC characteristic.
V
P
100 mV
V
= 5 V
P
(f
= 70 Hz)
ripple
TDA9800
MED337
t
Fig.9 Ripple rejection condition.
15
July 1994
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
MED338
0
α
AM
(dB)
−20
−40
−60
−80
−100
−1
2
3
10
1
10
10
10
V
(mV)
i IC
Fig.10 Typical AM suppression of FM sound demodulator.
MED339
370
60
V
(1)
(2)
o AF
S/N (W)
(dB)
(mV RMS)
360
50
40
30
350
340
330
20
3
−1
2
10
1
10
10
10
V
(mV)
i FM
Fig.11 Typical AF output signal and signal-to-noise ratio.
July 1994
16
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
bnok,lfuapgedwith
22 kΩ
(62 kΩ)
AFC
video and intercarrier
tuner AGC
V
= 5 V (9 V)
P
330 Ω
22 kΩ
(62 kΩ)
1 V (p-p)
10 µF
sound
trap
10 nF
560
Ω
0.1 µF
(2)
(2)
15
µH
see
table
12 V (9 V)
(2)
(1)
sound
filter
2.2 µF
V
V
V
V
C
AGC
GND
18
VCO2
VCO1
AFC
15
i(vid)
o(vid)
TAGC
12
11
i IC
P
20
19
14
13
17
16
TDA9800
1
2
3
4
5
6
7
8
9
10
n.c.
T
V
V
V
V
C
AF
TOP
CCS
MUTE
PLL
i VIF1
i VIF2
o CVBS
o AF
vision
IF
(3)
x
2.2
SAW
filter
R
390 Ω
0.1 µF
13 kΩ
kΩ
50 Ω
IF input
C
2.2 µF
AF
G1962
takeover
point
sound
mute
CVBS
2 V (p-p)
(1) depends on tuner
V
o AF
22 nF
MED340
Fig.12 Application circuit.
July 1994
17
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
120
antenna input
IF gain range
64 (<70) dB
video
1 V (p-p)
(dBµV)
IF signals
(1)
(RMS value)
−1
100
10
SAW insertion
loss 20 dB
(V)
−1
0.66 × 10
tuner gain
control range
6 dB IF slip
−2
80
10
10
64 dB
IF AGC
TOP
−3
60
40
20
−3
0.66 × 10
SAW insertion
loss 20 dB
−4
10
−4
40 dB
RF gain
0.66 × 10
−5
10
−5
0.66 × 10
IF amplifier, demodulator
and video
IF
VHF/UHF
SAW filter
TDA9800
tuner
MED341
(1) depends on TOP
Fig.13 Front end level diagram.
18
July 1994
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL
detector
TDA9800
EM3D42
f
July 1994
19
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
PACKAGE OUTLINES
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
M
H
20
11
pin 1 index
E
1
10
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
(1)
(1)
Z
1
2
UNIT
mm
b
b
c
D
E
e
e
1
L
M
M
H
w
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
6.40
6.22
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.10
7.62
0.30
0.254
0.01
2.0
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
0.25
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.020
0.13
0.078
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-05-24
SOT146-1
SC603
July 1994
20
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
0.25
0.01
1.27
0.050
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-24
97-05-22
SOT163-1
075E04
MS-013AC
July 1994
21
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
Several techniques exist for reflowing; for example,
SOLDERING
Introduction
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
WAVE SOLDERING
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
DIP
SOLDERING BY DIPPING OR BY WAVE
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
REPAIRING SOLDERED JOINTS
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
July 1994
22
Philips Semiconductors
Preliminary specification
VIF-PLL demodulator and FM-PLL detector
TDA9800
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
July 1994
23
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