BUK9237-55A [NXP]
TrenchMOS logic level FET; 的TrenchMOS逻辑电平FET
| 型号： | BUK9237-55A |
| 厂家： | 
NXP |
| 描述： | TrenchMOS logic level FET |
| 文件： | 总12页 (文件大小：275K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BUK9237-55A
TrenchMOS™ logic level FET
M3D300
Rev. 02 — 14 February 2002
Product data
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using
TrenchMOS™1 technology, featuring very low on-state resistance.
Product availability:
BUK9237-55A in SOT428 (D-PAK).
2. Features
■ TrenchMOS™ technology
■ Q101 compliant
■ 175 °C rated
■ Logic level compatible.
3. Applications
■ Automotive and general purpose power switching:
◆ 12 V and 24 V loads
◆ Motors, lamps and solenoids.
4. Pinning information
Table 1:
Pinning - SOT428 (D-PAK), simplified outline and symbol
Pin
1
Description
gate (g)
Simplified outline
Symbol
d
s
mb
[1]
2
drain (d)
3
source (s)
g
mb
mounting base;
connected to
drain (d)
MBB076
2
1
3
Top view
MBK091
SOT428 (D-PAK)
[1] It is not possible to make connection to pin 2 of the SOT428 package.
1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
BUK9237-55A
TrenchMOS™ logic level FET
Philips Semiconductors
5. Quick reference data
Table 2:
Quick reference data
Symbol Parameter
Conditions
Typ
Max
55
Unit
V
VDS
ID
drain-source voltage (DC)
-
drain current (DC)
Tmb = 25 °C; VGS = 5 V
Tmb = 25 °C
-
32
A
Ptot
Tj
total power dissipation
junction temperature
-
77
W
-
175
37
°C
RDSon
drain-source on-state resistance
Tj = 25 °C; VGS = 5 V; ID = 15 A
Tj = 25 °C; VGS = 4.5 V; ID = 15 A
Tj = 25 °C; VGS = 10 V; ID = 15 A
31
-
mΩ
mΩ
mΩ
38
28
33
6. Limiting values
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
55
Unit
V
VDS
VDGR
VGS
ID
drain-source voltage (DC)
-
-
-
-
drain-gate voltage (DC)
gate-source voltage (DC)
drain current (DC)
RGS = 20 kΩ
55
V
±15
32
V
Tmb = 25 °C; VGS = 5 V;
A
Figure 2 and 3
T
mb = 100 °C; VGS = 5 V; Figure 2
-
-
22
A
A
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs;
129
Figure 3
Ptot
Tstg
Tj
total power dissipation
storage temperature
Tmb = 25 °C; Figure 1
-
77
W
−55
−55
+175
+175
°C
°C
operating junction temperature
Source-drain diode
IDR
reverse drain current (DC)
peak reverse drain current
Tmb = 25 °C
-
-
32
A
A
IDRM
Tmb = 25 °C; pulsed; tp ≤ 10 µs
129
Avalanche ruggedness
WDSS
non-repetitive avalanche energy
unclamped inductive load; ID = 32 A;
-
76
mJ
VDS ≤ 30 V; VGS = 5 V; RGS = 50 Ω;
starting Tj = 25 °C
9397 750 09134
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 14 February 2002
2 of 12
BUK9237-55A
TrenchMOS™ logic level FET
Philips Semiconductors
03na19
120
03nh71
40
P
I
der
D
(A)
(%)
30
80
20
10
0
40
0
25
50
75
100
125
150
175
200
(ºC)
0
50
100
150
200
( C)
T
T
mb
mb
VGS ≥ 4.5 V
Ptot
Pder
=
× 100%
-----------------------
P
°
tot(25 C)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Continuous drain current as a function of
mounting base temperature.
03na99
3
10
I
D
(A)
t
= 10 µs
p
2
10
10
1
R
= V
/ I
DS D
DSon
100 µs
1 ms
DC
10 ms
100 ms
2
10
1
10
V
(V)
DS
Tmb = 25 °C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 09134
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 14 February 2002
3 of 12
BUK9237-55A
TrenchMOS™ logic level FET
Philips Semiconductors
7. Thermal characteristics
Table 4:
Symbol
Rth(j-a)
Thermal characteristics
Parameter
Conditions
Value
71.4
Unit
K/W
K/W
thermal resistance from junction to ambient
Rth(j-mb)
thermal resistance from junction to mounting Figure 4
base
1.94
7.1 Transient thermal impedance
03nb00
10
Z
th(j-mb)
(K/W)
1
δ = 0.5
0.2
0.1
0.05
-1
10
t
p
P
δ =
0.02
T
t
t
p
Single Shot
T
-2
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
10
1
t
(s)
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 09134
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 14 February 2002
4 of 12
BUK9237-55A
TrenchMOS™ logic level FET
Philips Semiconductors
8. Characteristics
Table 5:
Tj = 25 °C unless otherwise specified
Symbol Parameter
Static characteristics
V(BR)DSS drain-source breakdown
Characteristics
Conditions
Min
Typ
Max
Unit
ID = 0.25 mA; VGS = 0 V
Tj = 25 °C
voltage
55
50
-
-
-
-
V
V
Tj = −55 °C
VGS(th)
gate-source threshold
voltage-
ID = 1 mA; VDS = VGS
Figure 9
;
Tj = 25 °C
Tj = 175 °C
Tj = −55 °C
1
1.5
2
V
V
V
0.5
-
-
-
-
2.3
IDSS
drain-source leakage current VDS = 55 V; VGS = 0 V
Tj = 25 °C
Tj = 175 °C
-
-
-
0.05
10
µA
µA
nA
-
500
100
IGSS
gate-source leakage current VGS = ±10 V; VDS = 0 V
2
RDSon
drain-source on-state
resistance
VGS = 5 V; ID = 15 A;
Figure 7 and 8
Tj = 25 °C
-
-
-
-
31
-
37
74
38
33
mΩ
mΩ
mΩ
mΩ
Tj = 175 °C
VGS = 4.5 V; ID = 15 A
VGS = 10 V; ID = 15 A
-
28
Dynamic characteristics
Qg(tot)
Qgs
Qgd
Ciss
Coss
Crss
td(on)
tr
total gate charge
VGS = 5 V; VDD = 44 V;
ID = 15 A; Figure 14
-
-
-
-
-
-
-
-
-
-
-
17.6
2.9
9.2
927
151
96
-
nC
nC
nC
pF
pF
pF
ns
gate-to-source charge
gate-to-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
-
-
VGS = 0 V; VDS = 25 V;
f = 1 MHz; Figure 12
1236
181
131
VDD = 30 V; RL = 1.2 Ω;
VGS = 5 V; RG = 10 Ω
6
-
-
-
-
-
36
ns
td(off)
tf
turn-off delay time
fall time
95
ns
73
ns
Ld
internal drain inductance
measured from drain to
centre of die
2.5
nH
Ls
internal source inductance
measured from source lead
to source bond pad
-
7.5
-
nH
9397 750 09134
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 14 February 2002
5 of 12
BUK9237-55A
TrenchMOS™ logic level FET
Philips Semiconductors
Table 5:
Tj = 25 °C unless otherwise specified
Symbol Parameter
Source-drain diode
Characteristics…continued
Conditions
Min
Typ
Max
Unit
VSD
source-drain (diode forward) IS = 15 A; VGS = 0 V;
-
0.85
1.2
V
voltage
Figure 15
trr
reverse recovery time
recovered charge
IS = 20 A; dIS/dt = −100 A/µs
VGS = −10 V; VDS = 30 V
-
-
42
83
-
-
ns
Qr
nC
03na96
35
100
10
8
I
D
(A)
R
V
= 6 V
DSon
(mΩ)
GS
80
5
30
25
20
60
40
20
0
4
3
2.2
0
2
4
6
8
10
(V)
0
5
10
15
V
(V)
V
GS
DS
Tj = 25 °C; tp = 300 µs
Tj = 25 °C; ID = 15 A
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
Fig 6. Drain-source on-state resistance as a function
of gate-source voltage; typical values.
03ne89
2
handbook, halfpage
03na97
70
a
4
3.8
R
3.2
DSon
(mΩ)
3.4 3.6
V
= 3 V
GS
5
1.5
60
50
40
30
20
1
0.5
0
10
0
20
40
60
80
60
0
60
120
180
I
(A)
D
T ( C)
j
Tj = 25 °C
RDSon
a =
----------------------------
RDSon(25 C)
°
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
9397 750 09134
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 14 February 2002
6 of 12
BUK9237-55A
TrenchMOS™ logic level FET
Philips Semiconductors
03aa33
03aa36
2.5
-1
-2
-3
-4
-5
-6
10
I
V
D
GS(th)
(A)
10
max
(V)
2
1.5
1
typ
min
typ
max
10
10
10
10
min
0.5
0
-60
0
60
120
180
0
1
2
3
T ( C)
V
(V)
GS
j
ID = 1 mA; VDS = VGS
Tj = 25 °C; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of
junction temperature.
Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
03na95
03na98
25
2500
g
(S)
fs
C
(pF)
C
iss
20
2000
C
oss
15
10
5
1500
C
rss
1000
500
0
0
-2
10
-1
10
2
10
0
10
20
30
40
1
10
I
(A)
V
(V)
D
DS
Tj = 25 °C; VDS = 25 V
VGS = 0 V; f = 1 MHz
Fig 11. Forward transconductance as a function of
drain current; typical values.
Fig 12. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values.
9397 750 09134
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 14 February 2002
7 of 12
BUK9237-55A
TrenchMOS™ logic level FET
Philips Semiconductors
03na91
40
5
V
(V)
GS
I
D
(A)
4
V
= 14 V
DD
30
V
= 44 V
DD
3
2
1
0
20
10
T = 175 ºC
j
T = 25 ºC
j
0
0
1
2
3
4
0
5
10
15
20
Q
(nC)
V
(V)
G
GS
VDS = 25 V
Tj = 25 °C; ID = 15 A
Fig 13. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
Fig 14. Gate-source voltage as a function of turn-on
gate charge; typical values.
03na92
100
I
S
(A)
80
60
40
T = 175 ºC
j
T = 25 ºC
j
20
0
0.0
0.4
0.8
1.2
1.6
V
(V)
SD
VGS = 0 V
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.
9397 750 09134
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 14 February 2002
8 of 12
BUK9237-55A
TrenchMOS™ logic level FET
Philips Semiconductors
9. Package outline
Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads
(one lead cropped)
SOT428
seating plane
y
A
A
E
A
2
A
b
E
1
1
2
mounting
base
D
1
D
H
E
L
2
2
L
1
L
1
3
b
b
w
M
A
c
1
e
e
1
0
10
20 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
D
L
y
1
1
A
A
A
b
D
E
E
H
UNIT
b
b
c
e
e
1
L
L
w
2
1
2
1
E
1
2
max.
min.
min.
0.65
0.45
0.89
0.71
0.9
0.5
2.38
2.22
0.93
0.73
1.1
0.9
5.46
5.26
0.4 6.22
0.2 5.98
6.73
6.47
10.4 2.95
9.6
2.55
4.81
4.45
mm
4.57
0.2
0.2
4.0
2.285
0.5
Note
1. Measured from heatsink back to lead.
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
JEITA
99-09-13
01-12-11
SOT428
TO-252
SC-63
Fig 16. SOT428 (D-PAK).
9397 750 09134
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 14 February 2002
9 of 12
BUK9237-55A
TrenchMOS™ logic level FET
Philips Semiconductors
10. Revision history
Table 6:
Revision history
CPCN
Rev Date
Description
02 20020214
-
Product specification, second version, supersedes Rev 01 of 20000905
• VGS value of ±10 V updated to ±15 V in table 6, Limiting values.
Product specification, initial version.
01 20000905
-
9397 750 09134
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 — 14 February 2002
10 of 12
BUK9237-55A
TrenchMOS™ logic level FET
Philips Semiconductors
11. Data sheet status
Data sheet status[1]
Product status[2]
Definition
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips Semiconductors
reserves the right to change the specification in any manner without notice.
Preliminary data
Product data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be published at a
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to
improve the design and supply the best possible product.
This data sheet contains data from the product specification. Philips Semiconductors reserves the right to
make changes at any time in order to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change Notification (CPCN) procedure
SNW-SQ-650A.
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
12. Definitions
13. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Right to make changes — Philips Semiconductors reserves the right to
make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve
design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
Contact information
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
Fax: +31 40 27 24825
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
11 of 12
9397 750 09134
Product data
Rev. 02 — 14 February 2002
BUK9237-55A
TrenchMOS™ logic level FET
Philips Semiconductors
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Transient thermal impedance . . . . . . . . . . . . . . 4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2
3
4
5
6
7
7.1
8
9
10
11
12
13
© Koninklijke Philips Electronics N.V. 2002.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 14 February 2002
Document order number: 9397 750 09134
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