AU5780D-T [NXP]
SAE/J1850/VPW transceiver; SAE / J1850 / VPW收发器
| 型号： | AU5780D-T |
| 厂家： | 
NXP |
| 描述： | SAE/J1850/VPW transceiver |
| 文件： | 总10页 (文件大小：74K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
AU5780
SAE/J1850/VPW transceiver
Product specification
1998 Jun 30
Supersedes data of 1997 Dec 22
Philips
Semiconductors
Philips Semiconductors
Product specification
SAE/J1850/VPW transceiver
AU5780
FEATURES
DESCRIPTION
The AU5780 is a line transceiver being primarily intended for
in-vehicle multiplex applications. It provides interfacing between a
link controller and the physical bus wire. The device supports the
SAE/J1850 VPWM standard with a nominal bus speed of 10.4 kbps.
• Supports SAE/J1850 VPW standard for in-vehicle class B
multiplexing
• Bus speed 10.4 kbps nominal
• Drive capability 32 bus nodes
• Low RFI due to output waveshaping with adjustable slew rate
PIN CONFIGURATION
• Direct battery operation with protection against +50V load dump,
jump start and reverse battery
• Bus terminals proof against automotive transients up to
1
8
7
6
BATT
TX
GND
–200V/+200V
• Thermal overload protection
2
3
BUS_OUT
/LB
• Very low bus idle power consumption
• Diagnostic loop-back mode
AU5780
R/F
• 4X mode (41.6 kbps) reception capability
• ESD protected to 9 KV on bus and battery pins
• 8-pin SOIC
RX
4
5
BUS_IN
SL01196
SO8
QUICK REFERENCE DATA
SYMBOL
PARAMETER
Operating supply voltage
Operating ambient temperature
Battery voltage
CONDITIONS
MIN.
6
TYP.
MAX.
24
UNIT
V
12
V
°C
V
BATT.op
A
T
–40
+125
+50
200
+20
8.0
V
load dump; 1s
=12V
BATT.ld
BATT.lp
I
Bus idle supply current
Bus voltage
V
µA
V
BATT
V
0 < V
< 24V
–20
7.3
B
BATT
V
Bus output voltage
300Ω < R < 1.6kΩ
V
BOH
L
–I
Bus output source current
Bus input threshold
0V < V < +8.5V
47
mA
V
BO.LIM
BO
V
BI
3.65
16
4.1
t
P
Propagation delay
Tx to Rx
24
µs
V/µs
V
SR
Bus output slew rate
R = 56 kΩ
s
0.3
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
ORDER CODE
DWG #
SO8: 8-pin plastic small outline package; Packed in tubes
–40 to +125°C
AU5780D
SOT96-1
SO8: 8-pin plastic small outline package; Packed on tape & reel
–40 to +125°C
AU5780D–T
SOT96-1
2
1998 Jun 30
853–2087 19650
Philips Semiconductors
Product specification
SAE/J1850/VPW transceiver
AU5780
BLOCK DIAGRAM
BATTERY (+12V)
BATT
1
VOLTAGE
LOW–POWER
TEMP.
REFERENCE
PROTECTION
TIMER
BUS_OUT
Rb
TX
2
3
OUTPUT
BUFFER
7
TX–
BUFFER
Rs
R/F
INPUT
/LB
6
Rf
BUFFER
Vcc
Rd
BUS_IN
5
4
INPUT
FILTER
RX
VOLTAGE
REFERENCE
AU5780
8
GND
SL01195
3
1998 Jun 30
Philips Semiconductors
Product specification
SAE/J1850/VPW transceiver
AU5780
PIN DESCRIPTION
SYMBOL
BATT
TX
PIN
1
DESCRIPTION
Battery supply input (12V nom.)
2
Transmit data input; low: transmitter passive; high: transmitter active
Rise/fall slew rate set input
R/F
3
RX
4
Receive data output; low: active bus condition detected; float/high: passive bus condition detected
BUS_IN
/LB
5
Bus line receive input
6
Loop-back test mode control input; low: loop-back mode; high: normal communication mode
BUS_OUT
GND
7
Bus line transmit output
Ground
8
again upon detection of activity, i.e., rising edge at the TX input. The
device is able to receive and transmit a valid J1850 message when
initially in low-power mode.
FUNCTIONAL DESCRIPTION
The AU5780 is an integrated line transceiver IC that interfaces an
SAE/J1850 protocol controller IC to the vehicle’s multiplexed bus
line. It is primarily intended for automotive “Class B” multiplexing
applications in passenger cars using VPW (Variable Pulse Width)
modulated signals with a nominal bit rate of 10.4 kbps. The AU5780
also receives messages in the so-called 4X mode where data is
transmitted with a typical bit rate of 41.6 kbps. The device provides
transmit and receive capability as well as protection to a J1850
electronic module.
The AU5780 features special robustness at its BATT and BUS_OUT
pins hence the device is well suited for applications in the
automotive environment. Specifically, the BATT input is protected
against 50V load dump, jump start and reverse battery condition.
The BUS_OUT output is protected against wiring fault conditions,
e.g., short circuit to battery voltage as well as typical automotive
transients (i.e., –200V / +200V). In addition, an overtemperature
shutdown function with hysteresis is incorporated which protects the
device under system fault conditions. The chip temperature is
sensed at the bus drive transistor in the output buffer. In case of the
chip temperature reaching the trip point, the AU5780 will latch-off
the transceiver function. The device is reset on the first rising edge
on the TX input after a small decrease of the chip temperature.
A J1850 link controller feeds the transmit data stream to the
transceiver’s TX input. The AU5780 transceiver waveshapes the TX
data input signal with controlled rise & fall slew rates and rounded
shape. The bus output signal is transmitted with both voltage and
current control. The BUS_IN input is connected to the physical bus
line via an external resistor. The external resistor and an internal
capacitance provides filtering against RF bus noise. The incoming
signal is output at the RX pin being connected to the J1850 link
controller.
The AU5780 also provides a loop-back mode for diagnostic
purpose. If the /LB pin is open circuit or pulled low, then TX signal is
internally looped back to the RX output independent of the signals
on the bus. In this mode the electronic module is disconnected from
the bus, i.e., the TX signal is not output to the physical bus line. In
this mode, it can be used, e.g., for self-test purpose.
If the TX input is idle for a certain time, then the AU5780 enters a
low-power mode. This mode is dedicated to help meet ignition-off
current draw requirements. The BUS_IN input comparator is kept
alive in the low-power mode. Normal power mode will be entered
4
1998 Jun 30
Philips Semiconductors
Product specification
SAE/J1850/VPW transceiver
AU5780
CONTROL INPUT SUMMARY
RX
(out)
TX
/LB
MODE
BIT VALUE
BUS_OUT
0
1
0
0
0
1
1
Loop-back
Loop-back
TX passive (default state)
TX active
float
float
float
high
float (high)
low
1
Communication
Communication
Transmitter passive
Transmitter active
bus state
1
low
NOTE:
1. RX outputs the bus state. If the bus level is below the receiver threshold (i.e., all transmitters passive), then RX will be floating (i.e., high,
considering external pull-up resistance). Otherwise, if the bus level is above the receiver threshold (i.e., at least one transmitter is active),
then RX will be low.
ABSOLUTE MAXIMUM RATINGS
According to the IEC 134 Absolute Maximum System; operation is not guaranteed under these conditions; all voltages are referenced to pin 8
(GND); positive currents flow into the IC; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
–20
MAX.
+24
UNIT
V
V
V
V
V
V
V
V
V
V
supply voltage
V
V
V
V
V
V
V
V
V
V
BATT
short-term supply voltage
transient supply voltage
transient supply voltage
transient supply voltage
Bus voltage
load dump; t < 1s
+50
BATT.ld
BATT.tr1
BATT.tr2
BATT.tr3
B
SAE J1113 pulse 1
SAE J1113 pulses 2
–100
+150
+200
+20
SAE J1113 pulses 3A, 3B
–200
–20
1
R > 10 kΩ ; Rb >10Ω
f
transient bus voltage
SAE J1113 pulse 1
–50
B.tr1
transient bus voltage
SAE J1113 pulses 2
SAE J1113 pulses 3A, 3B
+100
+200
7
B.tr2
transient bus voltage
–200
–0.3
–9
B.tr3
DC voltage on pins TX, R/F, RX, /LB
ESD capability of BATT pin
I
ESD
ESD
ESD
Air gap discharge,
R=2kΩ, C=150pF
+9
kV
kV
kV
BATT
ESD capability of BUS_OUT and BUS_IN pins Air gap discharge,
–9
–2
+9
+2
bus
R=2kΩ, C=150pF
ESD capability of TX, RX, R/F, and /LB pins
Human Body,
logic
R=1.5kΩ, C=100pF
P
maximum power dissipation
thermal impedance
at T
= +125 °C
164
mW
°C/W
°C
tot
amb
Θ
in free air
152
JA
T
amb
operating ambient temperature
storage temperature
–40
–40
–40
+125
+150
+150
T
stg
°C
T
vj
junction temperature
°C
NOTE:
1. For bus voltages –20V < V
< –17V and +17V < V
< +20V the current is limited by the external resistors R and R .
bus b f
bus
5
1998 Jun 30
Philips Semiconductors
Product specification
SAE/J1850/VPW transceiver
AU5780
CHARACTERISTICS
–40°C < T
< +125°C; 6V < V
< 16V; V > 3V; 0 < V
< +8.5V;
amb
BATT
/LB
BUS
R = 56 kW R = 10 kW; R = 15 kW; R = 10W; 300 W< R < 1.6 kW;
S
d
f
b
L
all voltages are referenced to pin 8 (GND); positive currents flow into the IC; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN.
supply current; bus idle TX low; Note 1
TYP.
MAX.
200
UNIT
µA
I
I
I
I
BATT.id
BATT.p
BATT.oc
BATT.sc
supply current; passive state
supply current; no load
TX low
1.5
8
mA
mA
mA
°C
TX high
supply current; bus short to GND
Thermal shutdown
TX high, V = 0V
50
BO
T
155
5
sd
T
hys
Thermal shutdown hysteresis
15
°C
Pins TX and /LB
V
V
V
High level input voltage
Low level input voltage
Input hysteresis
3
V
ih
il
0.9
V
0.4
12
3
V
h
I
ih2
I
ih6
TX high level input current
/LB high level input current
V = 5V
50
10
µA
µA
i
V = 5V
i
Pin RX
V
Low level output voltage
High level output leakage
RX output current
I = 1.6 mA
0.4
+10
20
V
ol
o
I
ih
I
rx
V = 5V
o
–10
4
µA
mA
V = 5V
o
Pin BUS_OUT
V
BUS_OUT in loop-back mode; TX high or low
BUS_OUT voltage; passive
/LB low or floating;
0.1
0.1
8
V
V
V
olb
0<V
< 24V; R =1.6kΩ
BATT
L
V
ol
TX low or floating;
0<V < 24V; R =1.6kΩ
BATT
L
V
oh
BUS_OUT voltage; active
TX high; Note 2
9V<V < 24V;
7.3
BATT
300Ω < R <1.6kΩ;
L
V
ohb
BUS_OUT voltage; low battery
TX high;
V
BATT
– 1.7
8
V
6V<V
<9V;
BATT
300Ω < R < 1.6kΩ;
L
Note 2
– I
– I
– I
– I
– I
BUS_OUT source current; bus positive
TX high;
47
mA
mA
µA
µA
µA
BO.LIM
BO.LIMn
BO.LK
0V< V
<+8.5V
bus
BUS_OUT source current; bus negative
TX high;
–17V< V
55
< 0V
bus
BUS_OUT leakage current; TX low; bus positive
BUS_OUT leakage current; TX low; bus negative
BUS_OUT leakage current with loss of ground
TX low; 0V<V
<24V;
<24V;
–10
–10
–10
+10
+100
100
BATT
<+17V
0V< V
bus
TX low; 0V<V
–17V< V
BO.N
BATT
< 0V
bus
0V<V
<16V
BO.LOG
BATT
Pin BUS_IN
V
V
V
V
Input high voltage
Input low voltage
Input hysteresis
4.1
V
ih
il
3.65
+5
V
100
–5
mV
µA
h
Input leakage current
–17V < V
6
< +17V
bus
ilk
1998 Jun 30
Philips Semiconductors
Product specification
SAE/J1850/VPW transceiver
AU5780
DYNAMIC CHARACTERISTICS
–40°C < T
< +125°C; 9V < V
< 16V; V > 3V; 0V <V
< +8.5V;
amb
BATT
/LB
BUS
R
= 56 kW; R = 10 kW; R = 15 kW; R = 10W; BUS_OUT: 300W < R < 1.6 kW;
d f b L
S
1.7 ms < (R * C ) < 5.2 ms; 2.2 nF < C < 16 nF; R : C < 40pF; unless otherwise specified.
L
L
L
X
L
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Pins TX, RX, /LB
t
t
Delay TX to RX rising and falling edge
16
16
25
25
µs
p
Delay TX to RX rising and falling edge in
loop-back mode
/LB low
6V < V
µs
pI
t
t
Delay TX to RX rising and falling edge
< 9V
< 9V
16
16
25
25
µs
µs
p_lobatt
BATT
Delay TX to RX rising and falling edge in
loop-back mode
/LB low,
6V < V
pI_lobatt
BATT
t
Delay /LB to BUS_OUT
TX high, toggle /LB
1
10
µs
dIb
Pin BUS_OUT
t
t
Delay TX to BUS_OUT
Delay TX to BUS_OUT
measured at 3.875V
measured at 3.875V,
15
15
24
24
µs
µs
bo
bo_lobatt
6V < V
< 9V
BATT
V
Bus output voltage slew rate
Bus output current slew rate
6V < V
measured at 1.5V and min
[6.25V, V –2.75V]
< 16V;
0.238
0.87
0.365 V/µs
sr
BATT
BATT
I
sr
6V < V
< 16V;
BATT
2.1
mA/µs
R = 100W; measured at 30% and
L
70% of waveform
V
Bus emissions voltage output
Bus noise rejection from battery
Bus noise isolation from battery
f > 500 kHz
–60
dBV
dB
dB_limit
N
N
30 Hz < f < 250kHz
250 kHz < f < 200 MHz
20
16
R
I
dB
Pin Rs
K
sr
Slew rate relationship factor, Note 3
0.7
1
1.3
–
Pin BUS_IN
C
Bus Input capacitance
10
20
pF
BIN
t
;
Bus line to RX propagation delay
With 8V / 0V square wave input,
0.4
1.7
µs
DRXON
T
R = 15kΩ
f
DRXOFF
T
Bus line to RX propagation delay mismatch
time-out to low power state
t
–t
1
4
µs
∆
DRX_
DRXOFF DRXON
Pin BATT
t
TX low
1
ms
low_power
NOTES;
1. TX < 0.9V for more than 4 ms
2. For 6V < V < 9V the bus output voltage is limited by the supply voltage.
BATT
For 16V < V
< 24V (jump start) the load is limited by the package power dissipation
BATT
ratings; the duration of this condition is recommended to be less than 90 seconds.
3. V = (K * V
* R
) / R
s.nom s
sr
sr
sr.nom
with V
= 0.3 V/µs; R = 56 kΩ; 45 kΩ < R < 70 kΩ
s.nom s
sr.nom
7
1998 Jun 30
Philips Semiconductors
Product specification
SAE/J1850/VPW transceiver
AU5780
APPLICATION INFORMATION
J1850 LINKCONTROLLER
VPWO
VPWI
+5V
10NF
10k
2)
56k
TX
R/F
BATT
RX
/LB
+12V
AU5780
TRANSCEIVER
GND
BUS_IN
BUS_OUT
15k
10W
1)
RL
CL
SAE/J1850 VPW BUS LINE
SL01197
NOTES:
1. Value depends, e.g., on type of bus node. Example: primary node RL=1.6k , secondary node RL=11k.
2. For connection of /LB there are different options, e.g., connect to V or to low-active reset or to a port pin.
CC
8
1998 Jun 30
Philips Semiconductors
Product specification
SAE/J1850/VPW transceiver
AU5780
SO8: plastic small outline package; 8 leads; body width 3.9mm
SOT96-1
9
1998 Jun 30
Philips Semiconductors
Product specification
SAE/J1850/VPW transceiver
AU5780
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397 750 04079
Document order number:
Philips
Semiconductors
相关型号：
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