74ALVCH16374DL [NXP]
2.5V/3.3V 16-bit edge-triggered D-type flip-flop 3-State; 2.5V / 3.3V的16位边沿触发的D型触发器三态
| 型号： | 74ALVCH16374DL |
| 厂家： | 
NXP |
| 描述： | 2.5V/3.3V 16-bit edge-triggered D-type flip-flop 3-State |
| 文件： | 总12页 (文件大小：100K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ALVCH16374
2.5V/3.3V 16-bit edge-triggered D-type
flip-flop (3-State)
Product specification
1998 Jun 18
Supersedes data of 1997 Mar 21
IC24 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
16-bit edge-triggered D-type flip-flop (3-State)
74ALVCH16374
FEATURES
PIN CONFIGURATION
• Wide supply voltage range of 1.2 V to 3.6 V
48 1CP
1OE
1Q0
1Q1
1
2
3
• Complies with JEDEC standard no. 8-1A
• CMOS low power consumption
47
46
45
1D0
1D1
GND
TM
• MULTIBYTE flow-through standard pin-out architecture
GND
1Q2
4
5
• Low inductance multiple V and ground pins for minimum noise
CC
44 1D2
43 1D3
and ground bounce
1Q3
6
7
8
9
• Direct interface with TTL levels
• All data inputs have bushold
42
41
40
V
V
CC
CC
1Q4
1Q5
1D4
1D5
• Output drive capability 50Ω transmission lines @ 85°C
• Current drive ±24 mA at 3.0 V
39 GND
38 1D6
37 1D7
GND 10
1Q6 11
1Q7 12
2Q0 13
2Q1 14
GND 15
2Q2 16
2Q3 17
DESCRIPTION
The 74ALVCH16374 is a 16-bit edge-triggered flip-flop featuring
separate D-type inputs for each flip-flop and 3-State outputs for bus
oriented applications. Incorporates bus hold data inputs which
eliminate the need for external pull-up or pull-down resistors to hold
unused inputs. The 74ALVCH16374 consists of 2 sections of eight
edge-triggered flip-flops. A clock (CP) input and an output enable
(OE) are provided per 8-bit section.
36
2D0
35 2D1
34 GND
33 2D2
32 2D3
31
30
V
18
V
CC
CC
The flip-flops will store the state of their individual D-inputs that meet
the set-up and hold time requirements on the LOW-to-HIGH CP
transition.
2D4
2Q4 19
2Q5 20
GND 21
2Q6 22
2Q7 23
2OE 24
29 2D5
28 GND
27 2D6
When OE is LOW, the contents of the flip-flops are available at the
outputs. When OE is HIGH, the outputs go to the high impedance
OFF-state. Operation of the OE input does not affect the state of the
flip-flops.
26
25
2D7
2CP
SW00074
QUICK REFERENCE DATA
GND = 0V; T
= 25°C; t = t ≤ 2.5 ns
amb
r f
SYMBOL
PARAMETER
CONDITIONS
= 2.5V, C = 30pF
TYPICAL
2.3
UNIT
V
V
V
V
CC
CC
CC
CC
L
Propagation delay
CP to Qn
t
f
/t
ns
PHL PLH
= 3.3V, C = 50pF
2.4
L
= 2.5V
= 3.3V
300
350
5.0
MHz
MHz
pF
Maximum clock frequency
Input capacitance
MAX
C
C
I
Outputs enabled
Outputs disabled
16
1
Power dissipation capacitance per flip-flop
V = GND to V
CC
pF
PD
I
10
NOTE:
1. C is used to determine the dynamic power dissipation (P in mW):
PD
D
2
2
P
= C × V
× f + S (C × V
× f ) where: f = input frequency in MHz; C = output load capacitance in pF;
CC o i L
D
PD
CC
i
L
2
f = output frequency in MHz; V = supply voltage in V; S (C × V
o
× f ) = sum of outputs.
o
CC
L
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
ACH16374 DL
DWG NUMBER
SOT370-1
48-Pin Plastic SSOP Type III
48-Pin Plastic TSSOP Type II
–40°C to +85°C
–40°C to +85°C
74ALVCH16374 DL
74ALVCH16374 DGG
ACH16374 DGG
SOT362-1
2
1998 Jun 18
853-2073 19604
Philips Semiconductors
Product specification
16-bit edge-triggered D-type flip-flop (3-State)
74ALVCH16374
PIN DESCRIPTION
LOGIC SYMBOL
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1
24
Output enable input
(active LOW)
1
1OE
1Q0 to 1Q7
GND
1OE
2OE
2, 3, 5, 6, 8, 9,
11, 12
47
2
1D0
1Q0
3-State flip-flop outputs
46
44
1D1
1D2
1Q1
1Q2
3
5
4, 10, 15, 21,
28, 34, 39, 45
Ground (0V)
43
41
1D3
1D4
1Q3
1Q4
6
8
7, 18, 31, 42
V
Positive supply voltage
3-State flip-flop outputs
CC
13, 14, 16, 17,
19, 20, 22, 23
40
38
37
1D5
1D6
1D7
1Q5
1Q6
1Q7
9
2Q0 to 2Q7
11
12
Output enable input
(active LOW)
24
25
2OE
2CP
36
35
2D0
2D1
2Q0
2Q1
13
14
Clock input
Data inputs
36, 35, 33, 32,
30, 29, 27, 26
33
32
2D2
2D3
2Q2
2Q3
16
17
2D0 to 2D7
47, 46, 44, 43,
41, 40, 38, 37
1D0 to 1D7
1CP
Data inputs
Clock input
30
29
2D4
2D5
2Q4
2Q5
19
20
48
27
26
2D6
2D7
2Q6
2Q7
22
23
1CP
48
2CP
25
SW00075
LOGIC DIAGRAM
1D0
D
Q
1Q0
2D0
D
Q
2Q0
CP
CP
FF1
FF9
1CP
1OE
2CP
2OE
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
SW00076
FUNCTION TABLE
INPUTS
OUTPUTS
INTERNAL
FLIP-FLOPS
OPERATING MODES
OE
CP
Dn
Q0 to Q7
L
L
°
°
l
h
L
H
L
H
Load and read register
H
H
°
°
l
h
L
H
Z
Z
Load register and disable outputs
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition
L = LOW voltage level
l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition
Z = high impedance OFF-state
° = LOW-to-HIGH CP transition
3
1998 Jun 18
Philips Semiconductors
Product specification
16-bit edge-triggered D-type flip-flop (3-State)
74ALVCH16374
LOGIC SYMBOL (IEEE/IEC)
BUS HOLD CIRCUIT
V
CC
1
1OE
1EN
C1
2EN
C2
48
24
25
1CLK
2OE
2CLK
47
46
44
43
2
3
5
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
2D0
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
2Q0
1D
1
Data Input
To internal circuit
6
8
9
41
40
38
37
11
12
SW00044
36
13
2D
2
35
33
14
16
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
32
30
29
17
19
20
22
23
27
26
SW00199
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
CONDITIONS
UNIT
V
MIN
MAX
DC supply voltage 2.5V range (for max. speed
performance @ 30 pF output load)
2.3
2.7
DC supply voltage 3.3V range (for max. speed
performance @ 50 pF output load)
V
CC
3.0
3.6
3.6
DC supply voltage (for low-voltage applications)
1.2
0
For data input pins
For control pins
V
CC
V
I
DC Input voltage range
V
0
5.5
V
O
DC output voltage range
0
V
CC
V
T
amb
Operating free-air temperature range
–40
+85
°C
V
CC
V
CC
= 2.3 to 3.0V
= 3.0 to 3.6V
0
0
20
10
t , t
r
Input rise and fall times
ns/V
f
4
1998 Jun 18
Philips Semiconductors
Product specification
16-bit edge-triggered D-type flip-flop (3-State)
74ALVCH16374
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +4.6
–50
UNIT
V
V
CC
I
IK
DC input diode current
V t0
I
mA
1
For control pins
–0.5 to +4.6
V
I
DC input voltage
V
1
For data inputs
–0.5 to V +0.5
CC
I
DC output diode current
DC output voltage
V
uV or V t 0
"50
mA
V
OK
O
CC
O
V
Note 1
= 0 to V
CC
–0.5 to V +0.5
O
CC
I
DC output source or sink current
V
O
"50
"100
mA
mA
°C
O
I
, I
DC V or GND current
GND CC
CC
T
Storage temperature range
–65 to +150
stg
Power dissipation per package
–plastic medium-shrink (SSOP)
–plastic thin-medium-shrink (TSSOP) above +55°C derate linearly with 8 mW/K
For temperature range: –40 to +125 °C
above +55°C derate linearly with 11.3 mW/K
850
600
P
TOT
mW
NOTE:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
UNIT
1
MIN
TYP
MAX
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.2V
= 1.8V
V
CC
0.7*V
0.9
1.2
1.5
CC
V
HIGH level Input voltage
V
V
IH
= 2.3 to 2.7V
= 2.7 to 3.6V
= 1.2V
1.7
2.0
GND
0.2*V
= 1.8V
0.9
1.2
1.5
CC
V
LOW level Input voltage
IL
= 2.3 to 2.7V
= 2.7 to 3.6V
0.7
0.8
= 1.8 to 3.6V; V = V or V ; I = –100µA
V
*0.2
V
CC
I
IH
IL
O
CC
= 1.8V; V = V or V ; I = –6mA
V
V
V
V
V
V
0.4
0.3
0.5
0.6
0.5
V
V
V
V
V
V
0.10
*
*
*
*
*
*
*
*
*
*
*
I
IH
IL
O
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 2.3V; V = V or V ; I = –6mA
0.08
0.17
0.26
0.14
0.28
I
IH
IL
O
= 2.3V; V = V or V ; I = –12mA
V
OH
HIGH level output voltage
V
I
IH
IL
O
= 2.3V; V = V or V ; I = –18mA
I
IH
IL
O
= 2.7V; V = V or V ; I = –12mA
I
IH
IL
O
= 3.0V; V = V or V
I
= –24mA
*1.0
CC
I
IH
IL; O
5
1998 Jun 18
Philips Semiconductors
Product specification
16-bit edge-triggered D-type flip-flop (3-State)
74ALVCH16374
DC ELECTRICAL CHARACTERISTICS (Continued)
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
UNIT
1
MIN
TYP
MAX
0.20
0.30
0.20
0.40
0.60
0.40
0.55
V
V
V
V
V
V
V
V
= 1.8 to 3.6V; V = V or V ; I = 100µA
GND
0.09
0.07
0.15
0.23
0.14
0.27
CC
CC
CC
CC
CC
CC
CC
CC
I
IH
IL
O
= 1.8V; V = V or V ; I = 6mA
I
IH
IL
O
= 2.3V; V = V or V ; I = 6mA
I
IH
IL
O
= 2.3V; V = V or V ; I = 12mA
V
LOW level output voltage
V
I
IH
IL
O
OL
= 2.3V; V = V or V ; I = 12mA
I
IH
IL
O
= 2.7V; V = V or V ; I = 12mA
I
IH
IL
O
= 3.0V; V = V or V
I = 24mA
IL; O
I
IH
Input leakage current per
control pin
= 1.8 to 3.6V;
0.1
0.1
5
5
V = 5.5V or GND
I
I
µA
µA
I
Input leakage current per data
pin
V
CC
= 1.8 to 3.6V;
CC
V = V or GND
I
V
V
= 1.8 to 2.7V; V = V or GND
0.1
0.1
10
15
CC
CC
CC
I
CC
Input current for common I/O
pins
I
/I
IHZ ILZ
= 3.6V; V = V or GND
I
CC
V
V
= 1.8 to 2.7V; V = V or V ;
I IH IL
0.1
0.1
5
µA
µA
= V or GND
O
CC
3-State output OFF-state
current
I
OZ
V
V
= 2.7 to 3.6V; V = V or V ;
I IH IL
CC
O
10
= V or GND
CC
V
= 1.8 to 2.7V; V = V or GND; I = 0
0.1
0.2
20
40
CC
CC
I
CC
O
I
Quiescent supply current
µA
µA
CC
V
= 2.7 to 3.6V; V = V or GND; I = 0
I
CC
O
Additional quiescent supply
current given per control pin
5
500
750
∆I
V
= 2.7V to 3.6V; V = V – 0.6V; I = 0
CC
CC I CC O
Additional quiescent supply
current given per data I/O pin
150
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.3V; V = 0.7V
45
75
–
I
Bus hold LOW sustaining
current
2
2
I
µA
µA
µA
µA
BHL
= 3.0V; V = 0.8V
150
I
= 2.3V; V = 1.7V
–45
–75
300
450
–300
–450
I
Bus hold HIGH sustaining
current
I
BHH
= 3.0V; V = 2.0V
–175
I
= 2.7V
= 3.6V
= 2.7V
= 3.6V
Bus hold LOW overdrive
current
2
I
BHLO
Bus hold HIGH overdrive
current
2
I
BHHO
NOTES:
1. All typical values are at T
= 25°C.
amb
2. Valid for data inputs of bus hold parts.
6
1998 Jun 18
Philips Semiconductors
Product specification
16-bit edge-triggered D-type flip-flop (3-State)
74ALVCH16374
AC CHARACTERISTICS FOR V = 2.3V TO 2.7V RANGE AND V < 2.3V
CC
CC
GND = 0V; t = t ≤ 2.0ns; C = 30pF
r
f
L
LIMITS
V
WAVEFORM
SYMBOL
PARAMETER
V
CC
= 2.3 to 2.7V
= 1.8V
V
CC
= 1.2V UNIT
CC
1, 2
1
MIN
TYP
MAX
MIN
TYP
MAX
TYP1
7.7
Propagation delay
nCP to nQn
t
/t
1, 4
2, 4
1.0
2.3
4.3
1.5
3.6
6.5
ns
ns
PHL PLH
3-State output enable
time
t
/t
1.0
2.6
4.8
1.5
4.0
7.2
8.7
PZH PZL
nOE to nQn
3-State output disable
time
nOE to nQn
t
/t
2, 4
1
1.0
3.0
2.1
1.6
4.0
–
1.5
4.0
3.1
5.4
–
6.2
–
ns
ns
PHZ PLZ
nCP pulse width
HIGH or LOW
t
2.0
0.2
W
t
Set-up time Dn to nCP
Hold time Dn to nCP
3
3
1.2
0.8
0.2
–
–
1.5
0.6
–
–
–
–
ns
ns
su
t
–0.1
–0.2
h
Maximum clock pulse
frequency
f
1
150
300
–
125
250
–
–
MHz
max
NOTES:
1. All typical values are measured at T
= 25°C.
amb
2. Typical value is measured at V = 2.5V.
CC
AC CHARACTERISTICS FOR V = 3.0V TO 3.6V RANGE AND V = 2.7V
CC
CC
GND = 0V; t = t ≤ 2.5ns; C = 50pF
r
f
L
LIMITS
WAVEFORM
SYMBOL
PARAMETER
V
CC
= 2.3 to 2.7V
V
CC
= 2.7V
UNIT
1, 2
1
MIN
TYP
MAX
MIN
TYP
MAX
Propagation delay
nCP to nQn
t
/t
1, 4
2, 4
1.0
2.4
2.3
3.4
1.0
2.3
3.8
ns
ns
PHL PLH
3-State output enable
time
t
/t
1.0
4.0
1.0
2.9
4.8
PZH PZL
nOE to nQn
3-State output disable
time
nOE to nQn
t
/t
2, 4
1
1.0
2.5
2.6
1.4
4.1
–
1.0
3.0
2.9
1.6
4.5
–
ns
ns
PHZ PLZ
nCP pulse width
HIGH or LOW
t
W
t
Set-up time Dn to nCP
Hold time Dn to nCP
3
3
1.2
0.8
0.2
0.0
–
–
1.5
0.6
0.4
–
–
ns
ns
su
t
–0.2
h
Maximum clock pulse
frequency
f
1
200
350
–
150
300
–
MHz
max
NOTES:
1. All typical values are measured at T
= 25°C.
amb
2. Typical value is measured at V = 3.3V.
CC
7
1998 Jun 18
Philips Semiconductors
Product specification
16-bit edge-triggered D-type flip-flop (3-State)
74ALVCH16374
AC WAVEFORMS FOR V = 2.3V TO 2.7V AND
CC
V
I
CP
INPUT
V
< 2.3V RANGE
CC
V
M
V
V
V
V
= 0.5 V
M
CC
GND
= V + 0.15V
X
Y
OL
OL
= V –0.15V
t
su
OH
t
su
and V are the typical output voltage drop that occur with the
OH
t
h
t
h
output load.
V
V
I
= V
I
CC
Dn
INPUT
V
M
AC WAVEFORMS FOR V = 3.0V TO 3.6V AND
CC
GND
V
= 2.7V RANGE
CC
V
OH
V
V
V
V
= 1.5 V
M
X
Y
Qn
OUTPUT
= V + 0.3V
V
OL
M
= V –0.3V
OH
V
OL
and V are the typical output voltage drop that occur with the
OL
OH
NOTE: The shaded areas indicate when the input is permitted to change
output load.
for predictable output performance.
V
= 2.7V
I
SW00079
1/f
MAX
Waveform 3. Data set-up and hold times for the Dn input to the
CP input
V
I
CP INPUT
GND
V
M
TEST CIRCUIT
t
w
t
t
PLH
S
1
PHL
2 * V
V
V
CC
CC
OH
Open
GND
Qn OUTPUT
V
M
V
OL
R
R
= 500 Ω
= 500 Ω
L
L
V
V
O
I
SW00078
PULSE
GENERATOR
D.U.T.
Waveform 1. Clock (CP) to output (Qn) propagation delays, the
clock pulse width and the maximum clock pulse frequency
R
T
C
L
V
I
Test Circuit for switching times
V
OE INPUT
GND
V
M
M
DEFINITIONS
R
L
C
L
R
T
= Load resistor
= Load capacitance includes jig and probe capacitance
= Termination resistance should be equal to Z of pulse generators.
OUT
t
t
PZL
PLZ
SWITCH POSITION
V
CC
OUTPUT
TEST
S
V
V
I
1
CC
LOW-to-OFF
OFF-to-LOW
V
M
t
t
Open
< 2.7V
V
CC
PLH/ PHL
V
X
V
OL
t
t
t
2.7–3.6V
2.7V
PLZ/ PZL
2 < V
CC
t
t
t
PHZ
PZH
GND
PHZ/ PZH
V
OH
SV00906
V
Y
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
V
Waveform 4. Load circuitry for switching times
M
GND
outputs
enabled
outputs
disabled
outputs
enabled
SW00072
Waveform 2. 3-State enable and disable times
8
1998 Jun 18
Philips Semiconductors
Product specification
2.5V/3.3V 16-bit edge-triggered D-type flip-flop
(3-State)
74ALVCH16374
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
9
1998 Jun 18
Philips Semiconductors
Product specification
2.5V/3.3V 16-bit edge-triggered D-type flip-flop
(3-State)
74ALVCH16374
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm
SOT362-1
10
1998 Jun 18
Philips Semiconductors
Product specification
2.5V/3.3V 16-bit edge-triggered D-type flip-flop
(3-State)
74ALVCH16374
NOTES
11
1998 Jun 18
Philips Semiconductors
Product specification
2.5V/3.3V 16-bit edge-triggered D-type flip-flop
(3-State)
74ALVCH16374
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
Preproduction Product
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Date of release: 06-98
Document order number:
9397-750-04542
Philips
Semiconductors
相关型号：
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FAIRCHILD
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Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 6.10 MM, MO-153, TSSOP-48
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74ALVCH16374TTR
LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS
STMICROELECTR
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