NTE6809 [NTE]
Integrated Circuit NMOS, 8-Bit Microprocessor (MPU); 集成电路的NMOS ，8位微处理器（MPU）
| 型号： | NTE6809 |
| 厂家： | 
NTE ELECTRONICS |
| 描述： | Integrated Circuit NMOS, 8-Bit Microprocessor (MPU) |
| 文件： | 总4页 (文件大小：38K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NTE6809 & NTE6809E
Integrated Circuit
NMOS, 8–Bit Microprocessor (MPU)
Description:
The NTE6809 and NTE6809E are revolutionary high performance 8–bit microprocessors in 40–Lead
DIP type packages which support modern programming techniques such as position independece,
reentrancy, and modular programming.
The basic instructions of any computer are greatly enhanced by the presence of powerful addressing
modes. The NTE6809 and NTE6809E have the most complete set of addressing modes available
on any 8–bit microprocessor today.
These devices contain hardware and software features which make them ideal processors for higher
level language execution or standard controller applications. External clock inputs are provided on
the NTE6809E to allow synchronization with peripherals, systems, or other MPUs.
Architectural Features:
D Two 16–Bit Index Registers
D Two 16–Bit Indexable Stack Pointers
D Two 8–Bit Accumulators can be Concatenated to Form One 16–Bit Accumulator
D Direct Page Register Allows Direct Addressing Throughout Memory
Hardware Features:
D On–Chip Oscillator (Crystal Frequency = 4 x E), NTE6809 Only
D DMA/BREQ Allows DMA Operation on Memory Refresh, NTE6809 Only
D External Clock Inputs, E and Q, Allow Synchronization, NTE6809E Only
D TSC Input Controls Internal Bus Buffers, NTE6809E Only
D LIC Indicates Opcode Fetch, NTE6809E Only
D AVMA Allows Efficient Use of Common Resource in a Multiprocessor System, NTE6809E Only
D BUSY is a Status Line for Multiprocessing, NTE6809E Only
D Fast Interrupt Request Input Stacks Only Condition Code Register and Program Counter
D MRDY Input Extends Data Across Times for Use with Slow Memory
D Interrupt Acknowledge Output Allows Vectoring by Devices
D Sync Acknowledge Output Allows for Synchronization to External Event
D Single Bus–Cycle RESET
D Single 5V Supply Operation
D NMI Inhibited After RESET Until After First Load Stack Pointer
D Early Address Valid Allows Use with Slower Memories
D Early Write Data for Dynamic Memories
Software Features:
D 10 Addressing Modes
S M6800 Upward Compatible Addressing Modes
S Direct Addressing Anywhere in Memory Map
S Long RelativeBranches
S Program Counter Relative
S True Indirect Addressing
S Expanded Indexed Addressing
0–, 5–, 8–, or 16–Bit Constant Offsets
8– or 16–Bit Accumulator Offsets
Auto–Increment/Decrement by 1 or 2
D Improved Stack Manipulation
D 1464 Instruction with Unique Addressing Modes
D 8 x 8 Unsigned Multiply
D 16–Bit Arithmetic
D Transfer/Exchange All Registers
D Push/Pull Any Registers or Any Set of Registers
D Load Effective Address
Absolute Maximum Ratings: (Note 1)
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +7.0V
Input Voltage, Vin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +7.0V
Operating Ambient Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0° to +70°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55° to +150°C
Thermal Resistance, Junction–to–Ambient, RthJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Note 1. These devices contain circuitry to protect the inputs against damage due to high static volt-
ages or electric fields; however, it is advised that normal precautions be taken to avoid ap-
plication of any voltage higher than maximum rated voltages to these high impedance cir-
cuits. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic
voltage level (e.g., either VSS or VCC).
DC Electrical Characteristics: (VCC = 5V ±5%, VSS = 0, TA = 0° to +70°C unless otherwise specified)
Parameter
Input High Voltage
Symbol
Test Conditions
Min
V +2.0
Typ
–
Max
Unit
V
V
IH
V
SS
CC
CC
V
IHR
V
IHC
V +4.0
SS
–
V
V
NTE6809E Only
Input Low Voltage
NTE6809E Only
V –0.75
CC
–
V
+0.3
CC
V
V
IL
V –0.3
SS
–
V +0.8
SS
V
V
ILC
V
ILQ
V –0.3
SS
–
V +0.4
SS
V
V –0.3
SS
–
V +0.6
SS
V
Input Leakage Current
NTE6809E Only (E)
I
V = 0 to 5.25V, V = Max
–
–
–
2.5
100
–
µA
µA
V
in
in
CC
–
DC Output High Voltage
V
OH
I
I
I
I
= 145µA, V = Min
V +2.4
SS
–
Load
Load
Load
Load
CC
= 205µA, V = Min
V +2.4
SS
–
–
V
CC
= 100µA, V = Max
V +2.4
SS
–
–
V
CC
DC Output Low Voltage
V
OL
= 2mA, V = Min
–
–
–
V +0.5
SS
V
CC
Internal Power Dissipation
P
INT
T = 0°, Steady State Operation
A
–
1.0
W
DC Electrical Characteristics (Cont’d): (VCC = 5V ±5%, VSS = 0, TA = 0° to +70°C unless otherwise
specified)
Parameter
Input Capacitance (Note 2
NTE6809E Only (E)
Symbol
Test Conditions
V = 0, T = +25°C, f = 1MHz
Min
–
Typ
10
Max
15
Unit
pF
C
in
in
A
–
30
50
pF
Output Capacitance (Note 2)
C
out
–
10
15
pF
Frequency of Operation
NTE6809
f
Crystal or External Input
E and Q Inputs
0.4
0.1
–
–
4.0
1.0
MHz
MHz
NTE6809E
Hi–Z (Off State) Input Current
D0 – D7
I
TSI
V = 0.4 to 2.4V, V = Max
–
–
2
10
µA
µA
in
CC
A0 – A15, R/W
–
100
Note 2. Capacitances are periodically tested rather than 100% tested.
Pin Connection Diagram
NTE6809
NTE6809E
1
2
3
4
5
6
7
8
9
40
1
2
3
4
5
6
7
8
9
40
HALT
HALT
V
V
SS
SS
39 X’tal
39 TSC
NMI
IRQ
FIRQ
BS
NMI
IRQ
38
37
36
35
34
33
32
31
30
38
37
36
35
34
E X’tal
RESET
MRDY
LIC
FIRQ
BS
RESET
AVMA
BA
BA
Q
E
Q
E
V
CC
V
CC
A0
A1
A0
A1
33 BUSY
DMA/BREQ
R/W
R/W
D0
32
31
30
A2 10
A2 10
D0
D1
11
11
D1
A3
A3
A4 12
29 D2
28
A4 12
29 D2
28
A5
A6
A5
A6
13
14
13
14
D3
D3
27 D4
26 D5
25 D6
24 D7
27 D4
26 D5
25 D6
24 D7
A7 15
A8 16
A7 15
A8 16
A9
A9
17
18
19
20
17
18
19
20
23
23
A10
A11
A15
22 A14
A13
A10
A11
A15
22 A14
A13
A12
A12
21
21
40
21
20
1
2.055 (52.2)
.550 (13.9)
Max
.155 (3.9)
.100 (2.54)
.019 (0.5)
.137
(3.5)
.650 (16.5)
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