DS3245N [NSC]
DS3245 Quad MOS Clock Driver; DS3245四马鞍山时钟驱动器
| 型号： | DS3245N |
| 厂家： | 
National Semiconductor |
| 描述： | DS3245 Quad MOS Clock Driver |
| 文件： | 总4页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 1986
DS3245 Quad MOS Clock Driver
General Description
Features
Y
Y
Y
TTL compatible inputs
The DS3245 is a quad bipolar-to-MOS clock driver with TTL
compatible inputs. It is designed to provide high output cur-
rent and voltage capabilities necessary for optimum driving
of high capacitance N-channel MOS memory systems.
Operates from 2 standard supplies: 5 V , 12 V
DC
DC
Internal bootstrap circuit eliminates need for external
PNP’s
Y
Y
Y
Y
Only 2 supplies, 5 V
DC
compromising the usual high V
circuits using a third supply.
and 12 V , are required without
DC
PNP inputs minimize loading
specification obtained by
High voltage/current outputs
OH
Input and output clamping diodes
Control logic optimized for use with MOS memory sys-
tems
The device features 2 common enable inputs, a refresh in-
put, and a clock control input for simplified system designs.
The circuit was designed for driving highly capacitive loads
at high speeds and uses Schottky-clamped transistors. PNP
transistors are used on all inputs, thereby minimizing input
loading.
Y
Pin and function equivalent to Intel 3245
Logic and Connection Diagrams
Dual-In-Line Package
TL/F/5873–2
Top View
Order Number DS3245J or DS3245N
See NS Package Number J16A or N16A
TL/F/5873–1
C
1995 National Semiconductor Corporation
TL/F/5873
RRD-B30M115/Printed in U. S. A.
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Conditions
Min
Max
5.25
12.6
75
Units
Supply Voltage, V
Supply Voltage, V
4.75
11.4
0
V
V
CC
DD
b
a
10 C to 85 C
Temperature Under Bias
Storage Temperature
Operating Temperature 9T
C
§
65 C to 150 C
§
§
§
A
b
a
§
b
a
0.5V to 7V
Supply Voltage, V
Supply Voltage, V
All Input Voltages
CC
b
a
0.5V to 14V
DD
b
1.0V to V
DD
b
a
Outputs for Clock Driver
1.0V to V
DD
1V
Maximum Power Dissipation* at 25 C
Cavity Package
Molded Package
§
1509 mW
1476 mW
*Derate cavity package 10.1 mW/ C above 25 C; derate molded package
§
§
11.8 mW/ C above 25 C.
§
§
Electrical Characteristics (Notes 2 and 3)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
mA
mA
mA
mA
V
e
e
e
e
b
0.25
I
I
I
I
Select Input Load Current
Enable Input Load Current
Select Input Leakage Current
Enable Input Leakage Current
Output Low Voltage
V
V
V
V
0.45V
FD
FE
RD
RE
F
b
1.0
10
0.45V
5V
F
R
5V
40
R
e
e
V
OL
I
I
I
I
5 mA, V
IH
2V
0.45
OL
OL
OH
OH
e b
e b
b
1.0
5 mA
1 mA, V
V
e
b
0.50
V
OH
Output High Voltage
0.8V
V
DD
V
IL
e
a
5 mA
V
1.0
V
DD
V
V
V
Input Low Voltage, All Inputs
Input High Voltage, All Inputs
Input Clamp Voltage
0.8
V
IL
2
V
IH
e
e b
Min, I
IN
b
b
1.5
V
CC
12 mA
1.0
V
CLAMP
Power Supply Current Drain
Symbol
Parameter
Conditions
Min
Typ
Max
Units
e
e
I
I
I
I
Current from V
CC
Output in High State
V
5.25V,
12.6V
CC
DD
CC
DD
CC
26
23
29
13
34
mA
mA
mA
mA
V
DD
e
e
Current from V
DD
V
V
5.25V,
12.6V
CC
30
39
19
Output in High State
DD
e
e
Current from V
CC
Output in Low State
V
V
5.25V,
12.6V
CC
DD
e
e
Current from V
DD
V
V
5.25V,
12.6V
CC
Output in Low State
DD
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
a
e
e
e
12V.
DD
Note 2: Unless otherwise specified min/max limits apply across the 0 C to
§
C range. All typical values are for T
25 C and V
§
5V and V
§
A
CC
Note 3: All currents into device pins shown as positive, out of device pins as negative, all voltages referenced to ground unless otherwise noted. All values shown
as max or min on absolute value basis.
2
e
a
0 C to 75 C, V
e
e
g
5V 5%, V
g
12V 5%
Switching Characteristics T
§
§
A
CC
DD
(1)
(2,4)
(3)
Max
Symbol
Parameter
Conditions
Min
Typ
Units
ns
e
e
e
e
e
e
e
t
t
t
t
t
t
t
Input to Output Delay
Delay Plus Rise Time
Input to Output Delay
Delay Plus Fall Time
Output Transition Time
Delay Plus Rise Time
Delay Plus Fall Time
R
0
5
11
20
7
ba
SERIES
SERIES
SERIES
SERIES
SERIES
SERIES
SERIES
R
R
R
R
R
R
0
32
ns
DR
0
3
ns
ab
0
18
17
27
25
32
25
38
38
ns
DF
T
20X
20X
20X
10
ns
ns
DR
DF
ns
(5)
25 C
§
e
Capacitance T
A
Symbol
Parameter
Conditions
Min
Typ
Max
8
Units
pF
C
C
Input Capacitance, I , I , I , I
1 2 3 4
5
8
IN
Input Capacitance, R, C, E1, E2
12
pF
IN
e
e
e
Note 1: C
Note 2: C
Note 3: C
150 pF
200 pF
250 pF
L
L
L
These values represent a range of total stray plus clock capacitance for nine 4k RAMs.
(
Note 4: Typical values are measured at 25 C.
§
Note 5: This parameter is periodically sampled and is not 100% tested. Condition of measurement is f
e
e
e
e
0V, and T
A
1 MHz, V
2V, V
25 C.
§
BIAS
CC
AC Test Circuit and Switching Time Waveforms
Input pulse amplitudes: 3V
Input pulse rise and fall times:
5 ns between 1V and 2V
Measurements points: see waveforms
TL/F/5873–3
TL/F/5873–4
3
Physical Dimensions inches (millimeters)
Ceramic Dual-in-Line Package (J)
Order Number DS3245J
NS Package Number J16A
Molded Dual-in-Line Package (N)
Order Number DS3245N
NS Package Number N16A
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