2SK4078-ZK-E2-AY [NEC]
SWITCHING N-CHANNEL POWER MOS FET; 切换N沟道功率MOS FET
| 型号： | 2SK4078-ZK-E2-AY |
| 厂家： | 
NEC |
| 描述： | SWITCHING N-CHANNEL POWER MOS FET |
| 文件： | 总8页 (文件大小：178K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK4078
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The 2SK4078 is N-channel MOS Field Effect Transistor designed for high current switching applications.
ORDERING INFORMATION
LEAD PLATING
PACKING
PART NUMBER
PACKAGE
2SK4078-ZK-E1-AY Note
2SK4078-ZK-E2-AY Note
TO-252 (MP-3ZK)
typ. 0.27 g
Pure Sn (Tin)
Tape 2500 p/reel
Note Pb-free (This product does not contain Pb in external electrode.)
FEATURES
• Low on-state resistance
RDS(on)1 = 8.5 mΩ MAX. (VGS = 10 V, ID = 25 A)
RDS(on)2 = 14.0 mΩ MAX. (VGS = 4.5 V, ID = 13 A)
• Low input capacitance
(TO-252)
Ciss = 2300 pF TYP.
• Logic level drive type
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
40
V
V
20
50
A
150
A
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C)
Channel Temperature
45
W
W
°C
°C
A
PT2
1.0
150
Tch
Storage Temperature
Tstg
−55 to +150
23
Single Avalanche Current Note2
Single Avalanche Energy Note2
IAS
EAS
52
mJ
Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, VDD = 20 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH
THERMAL RESISTANCE
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance
Rth(ch-C)
2.77
125
°C/W
°C/W
Rth(ch-A)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D18885EJ1V0DS00 (1st edition)
Date Published July 2007 NS
Printed in Japan
2007
2SK4078
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
SYMBOL
TEST CONDITIONS
VDS = 40 V, VGS = 0 V
MIN.
TYP.
2.0
MAX.
UNIT
μA
nA
V
IDSS
1
IGSS
VGS = 20 V, VDS = 0 V
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 25 A
VGS = 10 V, ID = 25 A
VGS = 4.5 V, ID = 13 A
100
2.5
Gate to Source Cut-off Voltage
Forward Transfer Admittance Note
Drain to Source On-state Resistance Note
VGS(off)
| yfs |
1.5
7.0
S
RDS(on)1
6.3
9.5
8.5
mΩ
mΩ
RDS(on)2
14.0
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Ciss
Coss
Crss
td(on)
tr
VDS = 10 V,
VGS = 0 V,
2300
360
220
12
15
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
f = 1 MHz
VDD = 20 V, ID = 25 A,
VGS = 10 V,
RG = 0 Ω
Turn-off Delay Time
Fall Time
td(off)
tf
51
9
Total Gate Charge
QG
VDD = 32 V,
45
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage Note
Reverse Recovery Time
Reverse Recovery Charge
Note Pulsed
QGS
QGD
VF(S-D)
trr
VGS = 10 V,
7
ID = 50 A
13
IF = 50 A, VGS = 0 V
IF = 50 A, VGS = 0 V,
di/dt = 100 A/μs
1.5
30
26
ns
nC
Qrr
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
D.U.T.
V
V
GS
RG
= 25 Ω
50 Ω
R
L
90%
90%
V
GS
Wave Form
V
GS
10%
90%
0
R
G
PG.
VDD
PG.
GS = 20 → 0 V
VDD
V
DS
V
DS
V
0
GS
BVDSS
10% 10%
V
DS
Wave Form
0
I
AS
V
DS
I
D
τ
t
d(on)
t
r
t
d(off)
tf
V
DD
t
on
toff
τ = 1
μs
Duty Cycle ≤ 1%
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
= 2 mA
I
G
RL
50 Ω
PG.
VDD
2
Data Sheet D18885EJ1V0DS
2SK4078
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
120
100
80
60
40
20
0
60
50
40
30
20
10
0
0
25
50
75 100 125 150 175
0
25
50
75 100 125 150 175
TC - Case Temperature - °C
TC - Case Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
1000
100
10
I
D(pulse)
I
D(DC)
DC
1
0.1
0.01
T
C
= 25°C
Single Pulse
0.1
1
10
100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
100
10
Rth(ch-A) = 125°C/Wi
Rth(ch-C) = 2.77°C/Wi
1
Single Pulse
100 1000
0.1
100 μ
1 m
10 m
100 m
1
10
PW - Pulse Width - s
3
Data Sheet D18885EJ1V0DS
2SK4078
DRAIN CURRENT vs.
FORWARD TRANSFER CHARACTERISTICS
DRAIN TO SOURCE VOLTAGE
150
100
50
1000
100
10
VGS = 10 V
T
ch = −55°C
25°C
4.5 V
75°C
150°C
1
0.1
0.01
0.001
V
DS = 10 V
Pulsed
Pulsed
0
0
0.5
1
1.5
2
0
1
2
3
4
5
VDS - Drain to Source Voltage - V
VGS - Gate to Source Voltage - V
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
3
2.5
2
100
10
1
T
ch = −55°C
25°C
1.5
1
75°C
150°C
0.5
0
VDS = 10 V
ID = 1 mA
V
DS = 10 V
Pulsed
0.1
0.1
1
10
100
-100
-50
0
50
100
150
200
ID - Drain Current - A
Tch - Channel Temperature - °C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
20
20
Pulsed
Pulsed
I
D
= 10 A
25 A
50 A
16
12
16
12
8
V
GS = 4.5 V
10 V
8
4
0
4
0
1
10
ID - Drain Current - A
100
0
5
10
15
20
VGS - Gate to Source Voltage - V
4
Data Sheet D18885EJ1V0DS
2SK4078
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
20
10000
1000
100
C
iss
16
V
GS = 4.5 V, I = 13 A
D
12
8
C
oss
C
rss
10 V, 25 A
4
V
GS = 0 V
Pulsed
150
f = 1 MHz
0
10
-100
-50
0
50
100
200
0.1
1
10
100
Tch - Channel Temperature - °C
VDS - Drain to Source Voltage - V
SWITCHING CHARACTERISTICS
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
40
100
10
1
12
9
35
t
d(off)
V
DD = 32 V
20 V
30
25
20
15
10
5
t
d(on)
8 V
t
t
r
f
6
V
GS
3
V
V
DD = 20 V
GS = 10 V
V
DS
I
D
= 50 A
40
R = 0 Ω
G
0
0
0.1
1
10
100
0
10
20
30
50
ID - Drain Current - A
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
1000
100
10
1000
V
GS = 10 V
100
10
1
0 V
1
0.1
0.01
di/dt = 100 A/μs
Pulsed
1.5
V
GS = 0 V
0
0.5
1
0.1
1
10
100
VF(S-D) - Source to Drain Voltage - V
IF - Diode Forward Current - A
5
Data Sheet D18885EJ1V0DS
2SK4078
PACKAGE DRAWING (Unit: mm)
TO-252 (MP-3ZK)
2.3 0.1
6.5 0.2
5.1 TYP.
4.3 MIN.
0.5 0.1
No Plating
4
1
2
3
No Plating
0.76 0.12
1.14 MAX.
0 to 0.25
0.5 0.1
2.3 2.3
1.0
1. Gate
2. Drain
3. Source
4. Fin (Drain)
EQUIVALENT CIRCUIT
Drain
Body
Diode
Gate
Source
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as
possible, and quickly dissipate it once, when it has occurred.
6
Data Sheet D18885EJ1V0DS
2SK4078
TAPE INFORMATION
There are two types (-E1, -E2) of taping depending on the direction of the device.
Draw-out side
Reel side
MARKING INFORMATION
Abbreviation of part number
Pb-free plating marking
K4078
Lot code
RECOMMENDED SOLDERING CONDITIONS
The 2SK4078 should be soldered and mounted under the following recommended conditions.
For soldering methods and conditions other than those recommended below, please contact an NEC Electronics
sales representative.
For technical information, see the following website.
Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html)
Recommended
Soldering Method
Infrared reflow
Soldering Conditions
Condition Symbol
IR60-00-3
Maximum temperature (Package's surface temperature): 260°C or below
Time at maximum temperature: 10 seconds or less
Time of temperature higher than 220°C: 60 seconds or less
Preheating time at 160 to 180°C: 60 to 120 seconds
Maximum number of reflow processes: 3 times
Maximum chlorine content of rosin flux (percentage mass): 0.2% or less
Maximum temperature (Pin temperature): 350°C or below
Time (per side of the device): 3 seconds or less
Partial heating
P350
Maximum chlorine content of rosin flux: 0.2% (wt.) or less
7
Data Sheet D18885EJ1V0DS
2SK4078
•
The information in this document is current as of July, 2007. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
•
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responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by
customers or third parties arising from the use of these circuits, software and information.
•
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The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC
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(Note)
(1)
"NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
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(2)
"NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as
defined above).
M8E 02. 11-1
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