PC33897D [MOTOROLA]
Interface Circuit, 1-Trnsvr, PDSO14, SOIC-14;
| 型号： | PC33897D |
| 厂家： | 
MOTOROLA |
| 描述： | Interface Circuit, 1-Trnsvr, PDSO14, SOIC-14 电信 光电二极管 电信集成电路 |
| 文件： | 总12页 (文件大小：169K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Order this document from Analog Marketing: MC33897/D
Rev 0, 07/2002
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Preliminary Information
33897
Single-Wire CAN Transceiver
The 33897 is intended to be used as the physical interface in an SWCAN
(Single-Wire Controller Area Network) application. It supports both the
standard 33.333 kbps communications rate and the high-speed service rate of
83.333 kbps. The modes (speed, high-voltage wakeup [HVWU], and sleep)
are controlled by the state of two input pins for easy MCU interfacing.
SINGLE-WIRE CAN
TRANSCEIVER
Features
• 33.33 kbps Data Rate with Loading per J2411
• Waveshaping for Low EMI
• High-Speed Mode up to 83.33 kbps
• Responds to High-Voltage Wakeup
• CNTL Output to External Regulator for Bus-Controlled Module Wakeup
• Built-In Delay Timers to Allow MCU-Required Wakeup Timing
• Detects and Automatically Handles Loss of Ground
• Extended Frame Tolerance
• Worst-Case Sleep Mode Current of Only 80 µA
• Current Limit Prevents Damage Due to Bus Shorts
• Built-In Thermal Shutdown on Bus Output
• Protected Against Vehicular Electrical Transients
• Undervoltage Lockout Prevents False Data with Low Battery
• Designed to Meet GMW3089 V2.1 Requirements
D SUFFIX
14-LEAD NARROW SOIC
CASE 751A
PIN CONNECTIONS
1 GND
2 TXD
3 MODE0
4 MODE1
5 RXD
6 NC
7 GND
8 GND
9 CNTL
10 BAT
11 LOAD
12 BUS
13 NC
14 GND
33897 Simplified Application Diagram
Voltage
Power
33897
Regulator
Source
En
GND
TXD
GND
NC
V
cc
2.7 K
SWCAN
BUS
33 uH
MODE0
MODE1
RXD
BUS
LOAD
BAT
220 pF
Battery
6.49 K
NC
CNTL
GND
1 uF
ORDERING INFORMATION
GND
Temperature
Device
Package
Range (TA)
PC33897D
-40 to 125°C
14 SOIC
This document contains information on a product under development.
Motorola reserves the right to change or discontinue this product without notice.
© Motorola, Inc. 2002
TX Bus DRVR
HVWU En
MODE0
MODE1
BUS
Wave Shaping En
TX Data
Control
Disable
Bus RCVR
HV W U Det
RX Data
Disable
TXD
RXD
Undervoltage
Detect
BAT
Timer
OSC
Timers
Load Switch
LOAD
GND
CNTL
Figure 1. 33897 Simplified Block Diagram
Description
PIN FUNCTION DESCRIPTION
Pin
Pin Name
1, 7, 8, 14
GND
Electrical Common Ground and Heat removal. A good thermal path will also reduce the die temperature.
Data input here will appear on the BUS pin. A logic “0” will assert the bus, a “1” will go to the recessive state.
These control Sleep Mode, Transmit Level, and Speed. They have weak pull-downs.
Open drain output of the data on BUS. A recessive bus = “1”, dominant = “0”. An external pull-up is required.
No internal connection to this pin.
2
3, 4
5
TXD
MODEn
RXD
6, 13
9
NC
CNTL
BAT
Enables an external regulator when not in Sleep mode. The regulator should be activated by a logic high level.
Power input. An external diode is needed for reverse battery protection.
10
11
12
LOAD
BUS
The external bus load resistor connects here to prevent bus pull-up in the case of loss of module ground.
This pin connects to the bus through external components.
33897
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
2
MAXIMUM RATINGS
All voltages are with respect to ground unless otherwise noted.
Rating
Symbol
Value
Unit
Supply Voltage
VBATT
40
V
Input Logic Voltage
VIN
VRXD
VCNTL
VESD1
VESD2
TSTG
TA
-0.3 to 7.0
-0.3 to 7.0
-0.3 to 40
2000
V
V
RXD
CNTL
V
ESD1 Voltage (All Pins) (Note 1)
ESD2 Voltage (All Pins) (Note 2)
Storage Temperature
V
200
V
-55 to +150
-40 to +125
-40 to +150
150
°C
°C
°C
°C/W
°C
Operating Ambient Temperature
Operating Junction Temperature
Junction-to-Ambient Thermal Resistance
Soldering Temperature (for 10 seconds)
Notes:
TJ
RθJ-A
TSOLDER
260
1. ESD1 performed in accordance with Human Body Model (CZAP = 100 pF, RZAP= 1500 Ω).
2. ESD2 performed in accordance with Machine Model (CZAP = 200 pF, RZAP = 0 Ω).
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33897
3
STATIC DC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions -40°C ≤ TA ≤ 125°C unless otherwise noted. Voltages are relative to GND unless otherwise
noted. All positive currents are into the pin. All negative currents are out of the pin.
Characteristic
Symbol
Min
Typ
Max
Unit
Logic I/O
Logic Input Low Threshold (MODE0, MODE1, and TXD)
VIL
V
5.0 V ≤ VBATT ≤ 27.0 V
–
–
–
–
–
–
–
0.8
–
Logic Input High Threshold (MODE0, MODE1, and TXD)
VIH
V
5.0 V ≤ VBATT ≤ 27 V
2.0
Mode Pin Pull Down Current
IPD
µA
V
Pin Voltage = 0.8 V, 5.0 V ≤ VBATT ≤ 27 V
10
50
Receiver Output Low
VOL
IIN = 2.0 mA, 5.0 V ≤VBATT ≤ 27 V
–
0
0.45
0.8
CNTL Output Low
VOLCNTL
V
Iin = 5.0 µA, 5.0 V ≤V BATT ≤ 27 V
CNTL Output High
VOHCNTL
V
Iout = 180 µA, 5.0 V ≤ VBATT ≤ 27 V
VBATT -0.8
VBATT
General
Passive Out Bus Leakage
µΑ
No Loss of Ground
0 ≤VBATT ≤ 27 V, VBUS = -1.5 V
ILEAK
ILKLOG
ILKAI
0
0
0
–
–
–
-10
-50
100
Loss of Ground
VBATT = 0, VBUS = -18 V, VLOAD = -18 V
Passive Out Active In
0 ≤ VBATT ≤ 27 V, VBUS = 10 V
Sleep Mode Current
IQSLP
µA
VBATT = 13 V
–
35
80
Undervoltage Shutdown
Undervoltage Hysteresis
Load Pin Voltage Rise
VBATTUV
VUVHYS
VLDRISE
2.5
0
4.8
5.0
0.5
V
V
V
Normal
–
–
–
–
0.1
1.0
I = 1.0 mA, 5.0 V ≤ VBATT ≤ 27 V
Loss of Ground
I = 7.0 mA
33897
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
4
STATIC DC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions -40°C ≤ TA ≤ 125°C unless otherwise noted. Voltages are relative to GND unless otherwise
noted. All positive currents are into the pin. All negative currents are out of the pin.
Characteristic
Symbol
VOHWUO
VOHWUF
VOHHS
VOH
Min
VBATT -1.6
9.9
Typ
Max
VBATT
12.5
5.1
Unit
Transmitter
Offset Wakeup Output High Voltage
BATT = 5.0 V, 200 ≤ RL ≤ 4596
–
–
V
V
Fixed Wakeup Output High Voltage
V
12 V ≤ VBATT ≤ 27 V, 200 ≤ RL ≤ 4596
High Speed Mode Output High Voltage
4.2
–
V
6.0 V ≤ VBATT ≤ 18 V, RL = 92
Normal Mode Output High Voltage
4.4
4.75
–
5.1
V
6.0 V ≤ VBATT ≤ 27 V, 200 ≤ RL ≤ 4596
Normal Mode Low Battery Output High Voltage
VOHLOBATT
VBATT -1.6
-0.2
VBATT
0.2
V
V
BATT = 5.0 V, 200 ≤ RL ≤ 4596
Bus Low Voltage
VOL
–
V
VBATT = 5.0 V, 200 ≤ RL ≤ 4596
Short Circuit Bus Output Current
IBSC
-50
–
-350
mA
Dominant State, 6.0 V ≤ VBATT ≤ 27 V
Thermal Shutdown
Bus driver disabled.
TSD
150
10
–
–
190
20
°C
°C
Thermal Shutdown Hysteresis
TSDHYS
Receiver
Offset Wakeup Input High-Voltage Threshold
VBATT = 5.0 V
VBIHWUO
VBIHWUF
VBIH
VBATT -4.3
6.6
–
–
VBATT -3.25
V
V
V
Fixed Wakeup Input High-Voltage Threshold
7.9
2.2
12 V ≤ VBATT ≤ 27 V
High Speed and Normal Mode Input High-Voltage Input
Threshold
2.0
2.1
5.0 V ≤ VBATT ≤ 27 V
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33897
5
DYNAMIC AC TIMING
Characteristics noted under conditions -40°C ≤ TA ≤ 125°C unless otherwise noted. Voltages are relative to GND unless otherwise
noted. All positive currents are into the pin. All negative currents are out of the pin.
Characteristic
Symbol
Min
Typ
Max
Unit
Transmitter
Normal Speed Delay
TDLYNORM
200 ≤RL ≤ 4596
3.0
–
6.3
µSec
Rising Output – Measured from TXD = VIL to VBUS as
follows:
Max Time to VBUS = 3.7 V, Load time constant = 4.0 µS,
6.0 V ≤ VBATT ≤27 V
Min Time to VBUS = 1.0 V, Load time constant = 1.0 µS,
6.0 V ≤ VBATT ≤27 V
Max Time to VBUS = 2.7 V, Load time constant = 4.0 µS,
VBATT = 5.0 V
Min Time to VBUS = 2.7 V, Load time constant = 1.0 µS,
VBATT = 5.0 V
Falling Output – Measured from TXD = VIH to VBUS as
follows:
Max Time to VBUS = 1.0 V, Load time constant = 4.0 µS,
6.0 V ≤ VBATT ≤ 27 V
Min Time to VBUS = 3.7 V, Load time constant = 1.0 µS,
6.0 V ≤ VBATT ≤ 27V
Max Time to VBUS = 1.0 V, Load time constant = 4.0 µS,
VBATT = 5.0 V
Min Time to VBUS = 1.0 V, Load time constant = 1.0 µS,
VBATT = 5.0 V
High Speed Delay Time
RL = 92
TDLYHS
0.1
–
1.5
µSec
Rising Output – Measured from TXD = VIL to VBUS as
follows:
Max Time to VBUS = 3.7 V, Load time constant = 1.5 µS,
8.0 V ≤ VBATT ≤ 27 V
Min Time to VBUS = 1.0 V, Load time constant = 0 µS,
8.0 V ≤ VBATT ≤ 27 V
Falling Output – Measured from TXD = VIH to VBUS as
follows:
Max Time to VBUS = 1.0 V, Load time constant = 1.5 µS,
8.0 V ≤ VBATT ≤ 27V
Min Time to VBUS = 3.7 V , Load time constant = 0 µS,
8.0 V ≤ VBATT ≤ 27 V
33897
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
6
DYNAMIC AC TIMING
Characteristics noted under conditions -40°C ≤ TA ≤ 125°C unless otherwise noted. Voltages are relative to GND unless otherwise
noted. All positive currents are into the pin. All negative currents are out of the pin.
Characteristic
Symbol
Min
Typ
Max
Unit
Transmitter
High Voltage Delay Time
TDLYHV
200 ≤RL ≤ 4596
µSec
Rising Output – Measured from VIL to VBUS as follows:
3.0
3.0
3.0
–
–
–
6.3
6.3
18
Max Time to VBUS = 3.7 V, Load time constant = 4.0 µS,
6.0 V ≤ VBATT ≤ 27 V
Min Time to VBUS = 1.0 V, Load time constant = 1.0 µS,
6.0 V ≤ VBATT ≤ 27 V
Max Time to VBUS = 9.4 V, Load time constant = 4.0 µS,
12.0 V ≤ VBATT ≤ 27 V
Falling Output – Measured from VIH to VBUS as follows:
Max Time to VBUS = 1.0 V, Load time constant = 4.0 µS,
3.0
3.0
–
–
TBD
TBD
12.0 V ≤ VBATT ≤27 V
Min Time to VBUS = 9.4 V, Load time constant = 1.0 µS,
12.0 V ≤ VBATT ≤ 27V
Bus Disable Delay
TDLYDIS
1.0
mSec
µSec
From passive to bus disabled
Receiver
Receive Delay Time (6.0 V ≤ VBATT ≤ 27 V, Bus Rising to RXD
falling)
TRDLY
0.2
10
–
–
TBD
70
Awake
Sleep
CNTL Transition to Sleep Hold Time
TCNTLHLD
mSec
mSec
From low voltage to high voltage on bus, MODE0, and
0.75
100
–
–
10
MODE1 must be ≤ VIL at end of TCNTHLD
.
CNTL Power-Up Hold Time
TCNTLPU
From rising edge of VBATT ≥ 5.5 V
1000
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33897
7
SYSTEM/APPLICATION INFORMATION
INTRODUCTION
The 33897 is intended for use as a physical layer device in a
communications where the radiated EMI of the higher rate
single-wire CAN communications bus. The communications
takes place from a single pin over a single wire using a common
ground for a current return path. Two data rates are available,
with the high rate used for factory or assembly line
could be an issue.
Two pins control of the mode of operation (sleep, low-speed,
high-speed, and high voltage wakeup).
communications and the lower for actual system
BLOCK DIAGRAM COMPONENTS
Timer OSC
TX Bus DRVR
This circuit generates a 500 kHz signal to be used for internal
logic. It is the reference for some of the required delays.
This circuit drives the bus. It can drive it with the higher
voltage wakeup signals when enabled by the MODE
CONTROL. It can also provide waveshaping for reduced EMI or
not provide it for the higher data rate mode. The actual data is
received on TXD at CMOS logic levels, then translated by this
circuit to the necessary operating voltages.
Timer
This circuit contains the timing logic used to hold the CNTL
active for the required time after the conditions for sleep mode
have been met. It is also used to keep the TXD driver active for
a period of time after the it has generated a passive level on the
bus.
Undervoltage Detect
This circuit monitors internal operating voltage to assure
proper operation of the part. If a low-voltage condition is
detected, it sends a signal to disable the Bus RCVR and Tx Bus
DRVR. This prevents incorrect data from being put on the Bus
or sent to the MCU.
Control
This circuit contains the control logic for the various
operating modes and conditions required for the IC.
Load Switch
Bus RCVR
The load switch provides a path for an external resistor
connected to the bus to be connected to ground. When a loss
of ground is detected, this switch is opened to prevent the
current that would normally be flowing to the ground from the
module from going back through the load resistor and raising
the bus level. The circuit is opened when the voltage between
GND and BAT becomes too low as would be the case if module
ground were lost.
This circuit translates the levels on the BUS pin to a CMOS
level indicating the presence of a data 0 or 1. It also determines
the presence of a High-Voltage Wakeup Signal that is passed
to CONTROL and TIMERS. An analog filter is used to “de-
glitch” the high-voltage wakeup signal and prevent false exits
from the sleep mode.
OPERATION
The 33897 is intended to be used with an MCU to control its
operation and to process and generate the data for the bus.
waveshaping in the driven state is determined by the levels on
the MODE0 and MODE1 pins (see Table 1).
Ground Pins
Table 1. Mode Control
The four ground pins are not only for electrical conduction,
their number and locations at each of the four corners serve
also to remove heat from the IC. The biggest benefit of this is
obtained by putting a lot of copper on the PCB in this area and,
if ground is an internal layer, by adding numerous plated
through connections to it with the largest diameter holes the
layout can use.
MODE0
MODE1
Operation
Sleep Mode
0
0
0
1
Transmit High Voltage
(Wakeup)
1
1
0
1
Transmit High Speed
TX Data
The data driven onto the SWCAN Bus is inverted from the
TXD pin. A “1” driven on TXD will result in an undriven
(recessive) state (bus at near zero volts). When the TXD pin is
low, the output goes to a driven state. The voltage and
Normal Speed and Voltage
33897
8
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
Mode Control
BUS I/O
This Input/Output may require ESD and/or EMI external
The Mode pins control the transmitter filtering and bus
voltage and the IC sleep mode operation. Table 1 shows the
mode versus the logic levels on MODE0 and MODE1.
circuitry. A set of components is shown in the Simplified
Application Diagram on the front of this data sheet. The value
of the capacitor should be adjusted downward in direct
proportion to the added capacitance of the ESD or EMI circuits.
The series resistance of the inductor should be kept below
3.5 Ω to prevent its voltage drop from significantly degrading
system noise margins.
The MODE0 and MODE1 pins have a weak pull-down in the
IC so that in case the pins are not driven, the device will enter
the sleep mode. This is usually the situation as the MCU comes
out of reset, before the driving signals have been configured as
outputs.
RX Data
The data received on the Bus is translated to logic levels on
this pin. This pin is a logic high when the bus is in the recessive
state (near zero volts) and is low when in the bus is in either the
normal or high voltage dominant state.
This is an open-drain type of output that requires an external
resistor to pull it up. When the device is in sleep mode, the
output will be off unless a high-voltage wakeup level is detected
on the bus. If the wakeup level is detected, the output will be
driven by the data on the bus. If the level of the data returns to
normal level, the output will return to off after a short delay
unless a non-sleep mode condition is set by the MCU.
Load Switch
This switch is on in all operating modes unless a loss of
ground is detected. If this happens, the switch is opened and
the resistor normally attached to its pin will be no longer pass
current to or from the bus.
CNTL Output
This logic level signal is used to control a VCC regulator.
When the output is low, the VCC regulator is expected to
shutdown. This is normally used to shut down the MCU and all
the devices powered by VCC when the IC is in sleep mode. This
is done to save power. When the part is taken out of the sleep
mode by the higher than normal bus voltage, this pin is asserted
high and the Vcc regulator brings its output up to the regulated
level. This starts the MCU, which controls the mode of the IC.
The MCU must change the mode signals to non-sleep mode
levels in order to keep this pin from going low. There is a delay
to allow the MCU to fully wake up and take control after the
high-voltage signaling is removed before the level on this output
returns low. After a delay time, even if the bus is at high voltage,
the IC will return to sleep mode if both mode pins are low.
BAT Input
This power input is not reverse battery protected and should
use an external diode to protect it from damage due to reverse
battery if this protection is desired. The voltage drop of the
diode must be taken into consideration when the operating
range of the system is being determined. This diode is generally
used to protect the entire module from reverse battery and
should be selected accordingly.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33897
9
PACKAGE DIMENSIONS
D SUFFIX
(14-LEAD SOIC)
CASE 751A-03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLINGDIMENSION:
MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15
(0.006) PER SIDE.
-A-
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
14
1
8
7
-B-
P 7 PL
M
M
0.25 (0.010)
B
MILLIMETERS
INCHES
G
DIM MIN
MAX
MIN MAX
F
R X 45
°
C
A
B
C
D
F
8.55
3.80
1.35
0.35
0.40
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
-T-
J
M
G
J
1.27 BSC
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
K
SEATING
PLANE
D 14 PL
0.25 (0.010)
0.19
0.10
K
M
P
R
S
S
M
T B
A
0
7
0
7
°
°
°
°
5.80
6.20 0.228 0.244
0.50 0.010 0.019
0.25
33897
10
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
NOTES
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33897
11
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee
regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product
or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do
vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”, must be validated for each customer
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respective owners.
© Motorola, Inc. 2002
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MC33897/D
相关型号：
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