MMBT2369LT1 [MOTOROLA]
Switching Transistors; 开关晶体管型号: | MMBT2369LT1 |
厂家: | MOTOROLA |
描述: | Switching Transistors |
文件: | 总8页 (文件大小:307K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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by MMBT2369LT1/D
SEMICONDUCTOR TECHNICAL DATA
COLLECTOR
3
NPN Silicon
*Motorola Preferred Device
1
BASE
2
EMITTER
MAXIMUM RATINGS
3
Rating
Collector–Emitter Voltage
Collector–Emitter Voltage
Collector–Base Voltage
Symbol
Value
Unit
Vdc
1
V
CEO
15
40
2
V
CES
Vdc
V
40
Vdc
CASE 318–08, STYLE 6
SOT–23 (TO–236AB)
CBO
EBO
Emitter–Base Voltage
V
4.5
200
Vdc
Collector Current — Continuous
THERMAL CHARACTERISTICS
Characteristic
I
C
mAdc
Symbol
Max
Unit
(1)
Total Device Dissipation FR–5 Board
P
225
mW
D
T
= 25°C
A
Derate above 25°C
1.8
556
300
mW/°C
°C/W
mW
Thermal Resistance, Junction to Ambient
Total Device Dissipation
R
JA
D
P
(2)
Alumina Substrate,
T
A
= 25°C
Derate above 25°C
2.4
417
mW/°C
°C/W
°C
Thermal Resistance, Junction to Ambient
Junction and Storage Temperature
DEVICE MARKING
R
JA
T , T
J stg
–55 to +150
MMBT2369LT1 = M1J; MMBT2369ALT1 = 1JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
OFF CHARACTERISTICS
Symbol
Min
Typ
Max
Unit
Collector–Emitter Breakdown Voltage (3)
V
Vdc
Vdc
(BR)CEO
(I = 10 mAdc, I = 0)
15
40
40
4.5
—
—
—
—
—
—
—
—
C
B
Collector–Emitter Breakdown Voltage
(I = 10 µAdc, V = 0)
V
(BR)CES
(BR)CBO
(BR)EBO
C
BE
Collector–Base Breakdown Voltage
(I = 10 Adc, I = 0)
V
V
Vdc
C
E
Emitter–Base Breakdown Voltage
(I = 10 Adc, I = 0)
Vdc
E
C
Collector Cutoff Current
I
µAdc
CBO
(V
CB
(V
CB
= 20 Vdc, I = 0)
—
—
—
—
0.4
30
E
= 20 Vdc, I = 0, T = 150°C)
E
A
Collector Cutoff Current
(V = 20 Vdc, V = 0)
I
µAdc
CES
MMBT2369A
—
—
0.4
CE BE
1. FR–5 = 1.0 0.75 0.062 in.
2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina.
3. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
Motorola, Inc. 1996
ELECTRICAL CHARACTERISTICS (continued) (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
ON CHARACTERISTICS
DC Current Gain (3)
h
FE
—
(I = 10 mAdc, V
= 1.0 Vdc)
= 1.0 Vdc)
= 0.35 Vdc)
= 0.35 Vdc, T = –55°C)
MMBT2369
MMBT2369A
MMBT2369A
MMBT2369A
MMBT2369A
MMBT2369
MMBT2369A
40
—
40
20
30
20
20
—
—
—
—
—
—
—
120
120
—
—
—
C
CE
CE
CE
CE
CE
(I = 10 mAdc, V
C
(I = 10 mAdc, V
C
(I = 10 mAdc, V
C
A
(I = 30 mAdc, V
= 0.4 Vdc)
C
(I = 100 mAdc, V
= 2.0 Vdc)
= 1.0 Vdc)
—
—
C
CE
CE
(I = 100 mAdc, V
C
Collector–Emitter Saturation Voltage (3)
(I = 10 mAdc, I = 1.0 mAdc)
V
V
Vdc
Vdc
CE(sat)
MMBT2369
—
—
—
—
—
—
—
—
—
—
0.25
0.20
0.30
0.25
0.50
C
B
(I = 10 mAdc, I = 1.0 mAdc)
MMBT2369A
MMBT2369A
MMBT2369A
MMBT2369A
C
B
(I = 10 mAdc, I = 1.0 mAdc, T = +125°C)
C
C
B
B
B
A
(I = 30 mAdc, I = 3.0 mAdc)
(I = 100 mAdc, I = 10 mAdc)
C
Base–Emitter Saturation Voltage (3)
(I = 10 mAdc, I = 1.0 mAdc)
BE(sat)
MMBT2369A
MMBT2369A
MMBT2369A
MMBT2369A
0.7
—
—
—
—
—
—
—
0.85
1.02
1.15
1.60
C
B
(I = 10 mAdc, I = 1.0 mAdc, T = –55°C)
C
C
B
B
B
A
(I = 30 mAdc, I = 3.0 mAdc)
(I = 100 mAdc, I = 10 mAdc)
C
SMALL–SIGNAL CHARACTERISTICS
Output Capacitance
C
pF
—
obo
(V
CB
= 5.0 Vdc, I = 0, f = 1.0 MHz)
—
—
—
4.0
—
E
Small Signal CurrentGain
(I = 10 mAdc, V = 10 Vdc, f = 100 MHz)
h
fe
5.0
C
CE
SWITCHING CHARACTERISTICS
Storage Time
(I = I = I = 10 mAdc)
B1 B2
t
ns
ns
ns
s
—
—
—
5.0
8.0
10
13
12
18
C
Turn–On Time
t
t
on
off
(V
CC
= 3.0 Vdc, I = 10 mAdc, I = 3.0 mAdc)
B1
C
Turn–Off Time
(V
= 3.0 Vdc, I = 10 mAdc, I = 3.0 mAdc, I = 1.5 mAdc)
CC
C
B1
B2
3. Pulse Test: Pulse Width
300 s, Duty Cycle
2.0%.
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
SWITCHING TIME EQUIVALENT TEST CIRCUITS FOR 2N2369, 2N3227
270
Ω
270 Ω
t
t
1
1
3 V
+10.6 V
0
+10.75 V
0
–1.5 V
–9.15 V
< 1 ns
3.3 k
C * < 4 pF
s
3.3 k
C * < 4 pF
s
< 1 ns
PULSE WIDTH (t ) = 300 ns
1
PULSE WIDTH (t ) = 300 ns
1
DUTY CYCLE = 2%
DUTY CYCLE = 2%
Figure 1. t Circuit — 10 mA
on
Figure 3. t Circuit — 10 mA
off
95
Ω
95
Ω
t
t
1
1
10 V
10 V
+11.4 V
0
+10.8 V
–2 V
0
–8.6 V
1 k
C * < 12 pF
s
< 1 ns
1 k
C * < 12 pF
s
< 1 ns
1N916
PULSE WIDTH (t ) = 300 ns
1
PULSE WIDTH (t ) BETWEEN
1
DUTY CYCLE = 2%
10 AND 500
µs
DUTY CYCLE = 2%
Figure 2. t Circuit — 100 mA
on
Figure 4. t
off
Circuit — 100 mA
* Total shunt capacitance of test jig and connectors.
TO OSCILLOSCOPE
INPUT IMPEDANCE = 50
RISE TIME = 1 ns
TURN–ON WAVEFORMS
Ω
V
0
in
0.1 µF
220
Ω
10%
90%
V
out
TURN–OFF WAVEFORMS
V
3.3 kΩ
out
V
0
in
10%
t
V
on
in
3.3 k
50
Ω
0.0023
0.005
µ
µ
F
F
0.0023 µF
90%
V
PULSE GENERATOR
RISE TIME < 1 ns
50
Ω
out
0.005
µF
V
in
SOURCE IMPEDANCE = 50
PW 300 ns
DUTY CYCLE < 2%
V
V
= +12 V
BB
= –15 V
in
Ω
+
–
+
0.1
µ
F
0.1
µF
V
V
= 3 V
BB
CC
–
t
off
≥
Figure 5. Turn–On and Turn–Off Time Test Circuit
6
5
100
LIMIT
TYPICAL
T
= 25
°C
β
V
V
= 10
F
CC
OB
J
= 10 V
= 2 V
50
4
3
C
t
ib
f
t (V
r
= 3 V)
CC
C
ob
20
10
5
V
= 10 V
CC
t
r
2
t
s
t
d
1
0.1
2
0.2
0.5
1.0
2.0
5.0
10
1
2
5
10
20
50
100
REVERSE BIAS (VOLTS)
I
, COLLECTOR CURRENT (mA)
C
Figure 6. Junction Capacitance Variations
Figure 7. Typical Switching Times
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
500
Q ,
β = 10
F
V
= 10 V
T
CC
25°C
100
°
C
200
100
50
Q ,
β = 40
F
VALUES REFER TO
I = 10 mA TEST
C
T
270
t
1
3 V
10 pF MAX
+5 V
∆V
0
< 1 ns
C * < 4 pF
s
4.3 k
PULSE WIDTH (t ) = 5 µs
1
DUTY CYCLE = 2%
Q
, V = 10 V
CC
A
Q
, V = 3 V
CC
A
20
10
Figure 9. Q Test Circuit
T
1
2
5
10
20
50
100
I
, COLLECTOR CURRENT (mA)
C
Figure 8. Maximum Charge Data
980
t
1
10 V
C < C
TIME
+6 V
OPT
C = 0
0
–4 V
C
C
OPT
< 1 ns
500
C * < 3 pF
s
PULSE WIDTH (t ) = 300 ns
1
DUTY CYCLE = 2%
Figure 10. Turn–Off Waveform
Figure 11. Storage Time Equivalent Test Circuit
1.0
0.8
T
= 25°C
J
I
= 3 mA
I
= 10 mA
I
= 30 mA
I
= 50 mA
I = 100 mA
C
C
C
C
C
0.6
0.4
0.2
0.02
0.05
0.1
0.2
0.5
1
2
5
10
20
I
, BASE CURRENT (mA)
B
Figure 12. Maximum Collector Saturation Voltage Characteristics
4
Motorola Small–Signal Transistors, FETs and Diodes Device Data
200
100
50
T
= 125
°
C
J
V
= 1 V
CE
75°
C
C
25°
T
= 25
°
C and 75°C
J
–15
°
C
–55°C
20
1
2
5
10
, COLLECTOR CURRENT (mA)
20
50
100
I
C
Figure 13. Minimum Current Gain Characteristics
1.4
1.0
0.5
β
T
= 10
= 25°C
F
J
(25°C to 125°C)
1.2
1.0
0.8
θ
for V
CE(sat)
VC
MAX V
MIN V
0
BE(sat)
(–55°C to +25°C)
APPROXIMATE DEVIATION
FROM NOMINAL
–0.5
–55
0.15 mV/
0.4 mV/
°
C to +25
°
C
25
0.15 mV/
0.3 mV/°C
°C to 125°C
BE(sat)
θ
θ
±
°C
±
°C
VC
VB
(–55
°
C to +25
°C)
–1.0
–1.5
±
°C
±
0.6
0.4
0.2
(25°C to 125
°
C)
θ
for V
VB
BE(sat)
MAX V
–2.0
–2.5
CE(sat)
1
2
5
10
20
50
100
0
10
20
30
40
50
60
70
80
90
100
I
, COLLECTOR CURRENT (mA)
I , COLLECTOR CURRENT (mA)
C
C
Figure 14. Saturation Voltage Limits
Figure 15. Typical Temperature Coefficients
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
SOLDERING PRECAUTIONS
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
by T
, the maximum rated junction temperature of the
, the thermal resistance from the device junction to
J(max)
die, R
θJA
ambient, and the operating temperature, T . Using the
A
values provided on the data sheet for the SOT–23 package,
P
can be calculated as follows:
D
•
•
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
T
– T
A
J(max)
P
=
D
R
θJA
•
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T of 25°C, one can
A
calculate the power dissipation of the device which in this
case is 225 milliwatts.
•
•
•
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
150°C – 25°C
556°C/W
P
=
= 225 milliwatts
D
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad . Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
•
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
6
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PACKAGE DIMENSIONS
NOTES:
A
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
L
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
3
S
B
1
2
INCHES
MIN MAX
MILLIMETERS
DIM
A
B
C
D
G
H
J
MIN
2.80
1.20
0.89
0.37
1.78
0.013
0.085
0.45
0.89
2.10
0.45
MAX
3.04
1.40
1.11
0.50
2.04
0.100
0.177
0.60
1.02
2.50
0.60
V
G
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0180 0.0236
0.0350 0.0401
0.0830 0.0984
0.0177 0.0236
C
K
L
S
H
J
D
V
K
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
CASE 318–08
SOT–23 (TO–236AB)
ISSUE AE
Motorola Small–Signal Transistors, FETs and Diodes Device Data
7
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
andspecifically disclaims any and all liability, includingwithoutlimitationconsequentialorincidentaldamages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
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associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
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MMBT2369LT1/D
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